efm32pg1b_pac/
timer0.rs

1#[repr(C)]
2#[derive(Debug)]
3///Register block
4pub struct RegisterBlock {
5    ctrl: Ctrl,
6    cmd: Cmd,
7    status: Status,
8    ifl: Ifl,
9    ifs: Ifs,
10    ifc: Ifc,
11    ien: Ien,
12    top: Top,
13    topb: Topb,
14    cnt: Cnt,
15    _reserved10: [u8; 0x04],
16    lock: Lock,
17    routepen: Routepen,
18    routeloc0: Routeloc0,
19    _reserved13: [u8; 0x04],
20    routeloc2: Routeloc2,
21    _reserved14: [u8; 0x20],
22    cc0_ctrl: Cc0Ctrl,
23    cc0_ccv: Cc0Ccv,
24    cc0_ccvp: Cc0Ccvp,
25    cc0_ccvb: Cc0Ccvb,
26    cc1_ctrl: Cc1Ctrl,
27    cc1_ccv: Cc1Ccv,
28    cc1_ccvp: Cc1Ccvp,
29    cc1_ccvb: Cc1Ccvb,
30    cc2_ctrl: Cc2Ctrl,
31    cc2_ccv: Cc2Ccv,
32    cc2_ccvp: Cc2Ccvp,
33    cc2_ccvb: Cc2Ccvb,
34    cc3_ctrl: Cc3Ctrl,
35    cc3_ccv: Cc3Ccv,
36    cc3_ccvp: Cc3Ccvp,
37    cc3_ccvb: Cc3Ccvb,
38    dtctrl: Dtctrl,
39    dttime: Dttime,
40    dtfc: Dtfc,
41    dtogen: Dtogen,
42    dtfault: Dtfault,
43    dtfaultc: Dtfaultc,
44    dtlock: Dtlock,
45}
46impl RegisterBlock {
47    ///0x00 - Control Register
48    #[inline(always)]
49    pub const fn ctrl(&self) -> &Ctrl {
50        &self.ctrl
51    }
52    ///0x04 - Command Register
53    #[inline(always)]
54    pub const fn cmd(&self) -> &Cmd {
55        &self.cmd
56    }
57    ///0x08 - Status Register
58    #[inline(always)]
59    pub const fn status(&self) -> &Status {
60        &self.status
61    }
62    ///0x0c - Interrupt Flag Register
63    #[inline(always)]
64    pub const fn ifl(&self) -> &Ifl {
65        &self.ifl
66    }
67    ///0x10 - Interrupt Flag Set Register
68    #[inline(always)]
69    pub const fn ifs(&self) -> &Ifs {
70        &self.ifs
71    }
72    ///0x14 - Interrupt Flag Clear Register
73    #[inline(always)]
74    pub const fn ifc(&self) -> &Ifc {
75        &self.ifc
76    }
77    ///0x18 - Interrupt Enable Register
78    #[inline(always)]
79    pub const fn ien(&self) -> &Ien {
80        &self.ien
81    }
82    ///0x1c - Counter Top Value Register
83    #[inline(always)]
84    pub const fn top(&self) -> &Top {
85        &self.top
86    }
87    ///0x20 - Counter Top Value Buffer Register
88    #[inline(always)]
89    pub const fn topb(&self) -> &Topb {
90        &self.topb
91    }
92    ///0x24 - Counter Value Register
93    #[inline(always)]
94    pub const fn cnt(&self) -> &Cnt {
95        &self.cnt
96    }
97    ///0x2c - TIMER Configuration Lock Register
98    #[inline(always)]
99    pub const fn lock(&self) -> &Lock {
100        &self.lock
101    }
102    ///0x30 - I/O Routing Pin Enable Register
103    #[inline(always)]
104    pub const fn routepen(&self) -> &Routepen {
105        &self.routepen
106    }
107    ///0x34 - I/O Routing Location Register
108    #[inline(always)]
109    pub const fn routeloc0(&self) -> &Routeloc0 {
110        &self.routeloc0
111    }
112    ///0x3c - I/O Routing Location Register
113    #[inline(always)]
114    pub const fn routeloc2(&self) -> &Routeloc2 {
115        &self.routeloc2
116    }
117    ///0x60 - CC Channel Control Register
118    #[inline(always)]
119    pub const fn cc0_ctrl(&self) -> &Cc0Ctrl {
120        &self.cc0_ctrl
121    }
122    ///0x64 - CC Channel Value Register
123    #[inline(always)]
124    pub const fn cc0_ccv(&self) -> &Cc0Ccv {
125        &self.cc0_ccv
126    }
127    ///0x68 - CC Channel Value Peek Register
128    #[inline(always)]
129    pub const fn cc0_ccvp(&self) -> &Cc0Ccvp {
130        &self.cc0_ccvp
131    }
132    ///0x6c - CC Channel Buffer Register
133    #[inline(always)]
134    pub const fn cc0_ccvb(&self) -> &Cc0Ccvb {
135        &self.cc0_ccvb
136    }
137    ///0x70 - CC Channel Control Register
138    #[inline(always)]
139    pub const fn cc1_ctrl(&self) -> &Cc1Ctrl {
140        &self.cc1_ctrl
141    }
142    ///0x74 - CC Channel Value Register
143    #[inline(always)]
144    pub const fn cc1_ccv(&self) -> &Cc1Ccv {
145        &self.cc1_ccv
146    }
147    ///0x78 - CC Channel Value Peek Register
148    #[inline(always)]
149    pub const fn cc1_ccvp(&self) -> &Cc1Ccvp {
150        &self.cc1_ccvp
151    }
152    ///0x7c - CC Channel Buffer Register
153    #[inline(always)]
154    pub const fn cc1_ccvb(&self) -> &Cc1Ccvb {
155        &self.cc1_ccvb
156    }
157    ///0x80 - CC Channel Control Register
158    #[inline(always)]
159    pub const fn cc2_ctrl(&self) -> &Cc2Ctrl {
160        &self.cc2_ctrl
161    }
162    ///0x84 - CC Channel Value Register
163    #[inline(always)]
164    pub const fn cc2_ccv(&self) -> &Cc2Ccv {
165        &self.cc2_ccv
166    }
167    ///0x88 - CC Channel Value Peek Register
168    #[inline(always)]
169    pub const fn cc2_ccvp(&self) -> &Cc2Ccvp {
170        &self.cc2_ccvp
171    }
172    ///0x8c - CC Channel Buffer Register
173    #[inline(always)]
174    pub const fn cc2_ccvb(&self) -> &Cc2Ccvb {
175        &self.cc2_ccvb
176    }
177    ///0x90 - CC Channel Control Register
178    #[inline(always)]
179    pub const fn cc3_ctrl(&self) -> &Cc3Ctrl {
180        &self.cc3_ctrl
181    }
182    ///0x94 - CC Channel Value Register
183    #[inline(always)]
184    pub const fn cc3_ccv(&self) -> &Cc3Ccv {
185        &self.cc3_ccv
186    }
187    ///0x98 - CC Channel Value Peek Register
188    #[inline(always)]
189    pub const fn cc3_ccvp(&self) -> &Cc3Ccvp {
190        &self.cc3_ccvp
191    }
192    ///0x9c - CC Channel Buffer Register
193    #[inline(always)]
194    pub const fn cc3_ccvb(&self) -> &Cc3Ccvb {
195        &self.cc3_ccvb
196    }
197    ///0xa0 - DTI Control Register
198    #[inline(always)]
199    pub const fn dtctrl(&self) -> &Dtctrl {
200        &self.dtctrl
201    }
202    ///0xa4 - DTI Time Control Register
203    #[inline(always)]
204    pub const fn dttime(&self) -> &Dttime {
205        &self.dttime
206    }
207    ///0xa8 - DTI Fault Configuration Register
208    #[inline(always)]
209    pub const fn dtfc(&self) -> &Dtfc {
210        &self.dtfc
211    }
212    ///0xac - DTI Output Generation Enable Register
213    #[inline(always)]
214    pub const fn dtogen(&self) -> &Dtogen {
215        &self.dtogen
216    }
217    ///0xb0 - DTI Fault Register
218    #[inline(always)]
219    pub const fn dtfault(&self) -> &Dtfault {
220        &self.dtfault
221    }
222    ///0xb4 - DTI Fault Clear Register
223    #[inline(always)]
224    pub const fn dtfaultc(&self) -> &Dtfaultc {
225        &self.dtfaultc
226    }
227    ///0xb8 - DTI Configuration Lock Register
228    #[inline(always)]
229    pub const fn dtlock(&self) -> &Dtlock {
230        &self.dtlock
231    }
232}
233///CTRL (rw) register accessor: Control Register
234///
235///You can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
236///
237///For information about available fields see [`mod@ctrl`] module
238#[doc(alias = "CTRL")]
239pub type Ctrl = crate::Reg<ctrl::CTRLrs>;
240///Control Register
241pub mod ctrl;
242///CMD (w) register accessor: Command Register
243///
244///You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
245///
246///For information about available fields see [`mod@cmd`] module
247#[doc(alias = "CMD")]
248pub type Cmd = crate::Reg<cmd::CMDrs>;
249///Command Register
250pub mod cmd;
251///STATUS (r) register accessor: Status Register
252///
253///You can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
254///
255///For information about available fields see [`mod@status`] module
256#[doc(alias = "STATUS")]
257pub type Status = crate::Reg<status::STATUSrs>;
258///Status Register
259pub mod status;
260///IFL (r) register accessor: Interrupt Flag Register
261///
262///You can [`read`](crate::Reg::read) this register and get [`ifl::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
263///
264///For information about available fields see [`mod@ifl`] module
265#[doc(alias = "IFL")]
266pub type Ifl = crate::Reg<ifl::IFLrs>;
267///Interrupt Flag Register
268pub mod ifl;
269///IFS (w) register accessor: Interrupt Flag Set Register
270///
271///You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ifs::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
272///
273///For information about available fields see [`mod@ifs`] module
274#[doc(alias = "IFS")]
275pub type Ifs = crate::Reg<ifs::IFSrs>;
276///Interrupt Flag Set Register
277pub mod ifs;
278///IFC (w) register accessor: Interrupt Flag Clear Register
279///
280///You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ifc::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
281///
282///For information about available fields see [`mod@ifc`] module
283#[doc(alias = "IFC")]
284pub type Ifc = crate::Reg<ifc::IFCrs>;
285///Interrupt Flag Clear Register
286pub mod ifc;
287///IEN (rw) register accessor: Interrupt Enable Register
288///
289///You can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
290///
291///For information about available fields see [`mod@ien`] module
292#[doc(alias = "IEN")]
293pub type Ien = crate::Reg<ien::IENrs>;
294///Interrupt Enable Register
295pub mod ien;
296///TOP (rw) register accessor: Counter Top Value Register
297///
298///You can [`read`](crate::Reg::read) this register and get [`top::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`top::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
299///
300///For information about available fields see [`mod@top`] module
301#[doc(alias = "TOP")]
302pub type Top = crate::Reg<top::TOPrs>;
303///Counter Top Value Register
304pub mod top;
305///TOPB (rw) register accessor: Counter Top Value Buffer Register
306///
307///You can [`read`](crate::Reg::read) this register and get [`topb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`topb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
308///
309///For information about available fields see [`mod@topb`] module
310#[doc(alias = "TOPB")]
311pub type Topb = crate::Reg<topb::TOPBrs>;
312///Counter Top Value Buffer Register
313pub mod topb;
314///CNT (rw) register accessor: Counter Value Register
315///
316///You can [`read`](crate::Reg::read) this register and get [`cnt::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnt::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
317///
318///For information about available fields see [`mod@cnt`] module
319#[doc(alias = "CNT")]
320pub type Cnt = crate::Reg<cnt::CNTrs>;
321///Counter Value Register
322pub mod cnt;
323///LOCK (rw) register accessor: TIMER Configuration Lock Register
324///
325///You can [`read`](crate::Reg::read) this register and get [`lock::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
326///
327///For information about available fields see [`mod@lock`] module
328#[doc(alias = "LOCK")]
329pub type Lock = crate::Reg<lock::LOCKrs>;
330///TIMER Configuration Lock Register
331pub mod lock;
332///ROUTEPEN (rw) register accessor: I/O Routing Pin Enable Register
333///
334///You can [`read`](crate::Reg::read) this register and get [`routepen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`routepen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
335///
336///For information about available fields see [`mod@routepen`] module
337#[doc(alias = "ROUTEPEN")]
338pub type Routepen = crate::Reg<routepen::ROUTEPENrs>;
339///I/O Routing Pin Enable Register
340pub mod routepen;
341///ROUTELOC0 (rw) register accessor: I/O Routing Location Register
342///
343///You can [`read`](crate::Reg::read) this register and get [`routeloc0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`routeloc0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
344///
345///For information about available fields see [`mod@routeloc0`] module
346#[doc(alias = "ROUTELOC0")]
347pub type Routeloc0 = crate::Reg<routeloc0::ROUTELOC0rs>;
348///I/O Routing Location Register
349pub mod routeloc0;
350///ROUTELOC2 (rw) register accessor: I/O Routing Location Register
351///
352///You can [`read`](crate::Reg::read) this register and get [`routeloc2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`routeloc2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
353///
354///For information about available fields see [`mod@routeloc2`] module
355#[doc(alias = "ROUTELOC2")]
356pub type Routeloc2 = crate::Reg<routeloc2::ROUTELOC2rs>;
357///I/O Routing Location Register
358pub mod routeloc2;
359///CC0_CTRL (rw) register accessor: CC Channel Control Register
360///
361///You can [`read`](crate::Reg::read) this register and get [`cc0_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
362///
363///For information about available fields see [`mod@cc0_ctrl`] module
364#[doc(alias = "CC0_CTRL")]
365pub type Cc0Ctrl = crate::Reg<cc0_ctrl::CC0_CTRLrs>;
366///CC Channel Control Register
367pub mod cc0_ctrl;
368///CC0_CCV (rw) register accessor: CC Channel Value Register
369///
370///You can [`read`](crate::Reg::read) this register and get [`cc0_ccv::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_ccv::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
371///
372///<div class="warning">One or more dependent resources other than the current register are immediately affected by a read operation.</div>
373///
374///For information about available fields see [`mod@cc0_ccv`] module
375#[doc(alias = "CC0_CCV")]
376pub type Cc0Ccv = crate::Reg<cc0_ccv::CC0_CCVrs>;
377///CC Channel Value Register
378pub mod cc0_ccv;
379///CC0_CCVP (r) register accessor: CC Channel Value Peek Register
380///
381///You can [`read`](crate::Reg::read) this register and get [`cc0_ccvp::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
382///
383///For information about available fields see [`mod@cc0_ccvp`] module
384#[doc(alias = "CC0_CCVP")]
385pub type Cc0Ccvp = crate::Reg<cc0_ccvp::CC0_CCVPrs>;
386///CC Channel Value Peek Register
387pub mod cc0_ccvp;
388///CC0_CCVB (rw) register accessor: CC Channel Buffer Register
389///
390///You can [`read`](crate::Reg::read) this register and get [`cc0_ccvb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_ccvb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
391///
392///For information about available fields see [`mod@cc0_ccvb`] module
393#[doc(alias = "CC0_CCVB")]
394pub type Cc0Ccvb = crate::Reg<cc0_ccvb::CC0_CCVBrs>;
395///CC Channel Buffer Register
396pub mod cc0_ccvb;
397pub use cc0_ctrl as cc1_ctrl;
398pub use Cc0Ctrl as Cc1Ctrl;
399///CC1_CCV (rw) register accessor: CC Channel Value Register
400///
401///You can [`read`](crate::Reg::read) this register and get [`cc1_ccv::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_ccv::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
402///
403///<div class="warning">One or more dependent resources other than the current register are immediately affected by a read operation.</div>
404///
405///For information about available fields see [`mod@cc1_ccv`] module
406#[doc(alias = "CC1_CCV")]
407pub type Cc1Ccv = crate::Reg<cc1_ccv::CC1_CCVrs>;
408///CC Channel Value Register
409pub mod cc1_ccv;
410///CC1_CCVP (r) register accessor: CC Channel Value Peek Register
411///
412///You can [`read`](crate::Reg::read) this register and get [`cc1_ccvp::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
413///
414///For information about available fields see [`mod@cc1_ccvp`] module
415#[doc(alias = "CC1_CCVP")]
416pub type Cc1Ccvp = crate::Reg<cc1_ccvp::CC1_CCVPrs>;
417///CC Channel Value Peek Register
418pub mod cc1_ccvp;
419///CC1_CCVB (rw) register accessor: CC Channel Buffer Register
420///
421///You can [`read`](crate::Reg::read) this register and get [`cc1_ccvb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_ccvb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
422///
423///For information about available fields see [`mod@cc1_ccvb`] module
424#[doc(alias = "CC1_CCVB")]
425pub type Cc1Ccvb = crate::Reg<cc1_ccvb::CC1_CCVBrs>;
426///CC Channel Buffer Register
427pub mod cc1_ccvb;
428pub use cc0_ctrl as cc2_ctrl;
429pub use Cc0Ctrl as Cc2Ctrl;
430///CC2_CCV (rw) register accessor: CC Channel Value Register
431///
432///You can [`read`](crate::Reg::read) this register and get [`cc2_ccv::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_ccv::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
433///
434///<div class="warning">One or more dependent resources other than the current register are immediately affected by a read operation.</div>
435///
436///For information about available fields see [`mod@cc2_ccv`] module
437#[doc(alias = "CC2_CCV")]
438pub type Cc2Ccv = crate::Reg<cc2_ccv::CC2_CCVrs>;
439///CC Channel Value Register
440pub mod cc2_ccv;
441///CC2_CCVP (r) register accessor: CC Channel Value Peek Register
442///
443///You can [`read`](crate::Reg::read) this register and get [`cc2_ccvp::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
444///
445///For information about available fields see [`mod@cc2_ccvp`] module
446#[doc(alias = "CC2_CCVP")]
447pub type Cc2Ccvp = crate::Reg<cc2_ccvp::CC2_CCVPrs>;
448///CC Channel Value Peek Register
449pub mod cc2_ccvp;
450///CC2_CCVB (rw) register accessor: CC Channel Buffer Register
451///
452///You can [`read`](crate::Reg::read) this register and get [`cc2_ccvb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_ccvb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
453///
454///For information about available fields see [`mod@cc2_ccvb`] module
455#[doc(alias = "CC2_CCVB")]
456pub type Cc2Ccvb = crate::Reg<cc2_ccvb::CC2_CCVBrs>;
457///CC Channel Buffer Register
458pub mod cc2_ccvb;
459pub use cc0_ctrl as cc3_ctrl;
460pub use Cc0Ctrl as Cc3Ctrl;
461///CC3_CCV (rw) register accessor: CC Channel Value Register
462///
463///You can [`read`](crate::Reg::read) this register and get [`cc3_ccv::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc3_ccv::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
464///
465///<div class="warning">One or more dependent resources other than the current register are immediately affected by a read operation.</div>
466///
467///For information about available fields see [`mod@cc3_ccv`] module
468#[doc(alias = "CC3_CCV")]
469pub type Cc3Ccv = crate::Reg<cc3_ccv::CC3_CCVrs>;
470///CC Channel Value Register
471pub mod cc3_ccv;
472///CC3_CCVP (r) register accessor: CC Channel Value Peek Register
473///
474///You can [`read`](crate::Reg::read) this register and get [`cc3_ccvp::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
475///
476///For information about available fields see [`mod@cc3_ccvp`] module
477#[doc(alias = "CC3_CCVP")]
478pub type Cc3Ccvp = crate::Reg<cc3_ccvp::CC3_CCVPrs>;
479///CC Channel Value Peek Register
480pub mod cc3_ccvp;
481///CC3_CCVB (rw) register accessor: CC Channel Buffer Register
482///
483///You can [`read`](crate::Reg::read) this register and get [`cc3_ccvb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc3_ccvb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
484///
485///For information about available fields see [`mod@cc3_ccvb`] module
486#[doc(alias = "CC3_CCVB")]
487pub type Cc3Ccvb = crate::Reg<cc3_ccvb::CC3_CCVBrs>;
488///CC Channel Buffer Register
489pub mod cc3_ccvb;
490///DTCTRL (rw) register accessor: DTI Control Register
491///
492///You can [`read`](crate::Reg::read) this register and get [`dtctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
493///
494///For information about available fields see [`mod@dtctrl`] module
495#[doc(alias = "DTCTRL")]
496pub type Dtctrl = crate::Reg<dtctrl::DTCTRLrs>;
497///DTI Control Register
498pub mod dtctrl;
499///DTTIME (rw) register accessor: DTI Time Control Register
500///
501///You can [`read`](crate::Reg::read) this register and get [`dttime::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dttime::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
502///
503///For information about available fields see [`mod@dttime`] module
504#[doc(alias = "DTTIME")]
505pub type Dttime = crate::Reg<dttime::DTTIMErs>;
506///DTI Time Control Register
507pub mod dttime;
508///DTFC (rw) register accessor: DTI Fault Configuration Register
509///
510///You can [`read`](crate::Reg::read) this register and get [`dtfc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtfc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
511///
512///For information about available fields see [`mod@dtfc`] module
513#[doc(alias = "DTFC")]
514pub type Dtfc = crate::Reg<dtfc::DTFCrs>;
515///DTI Fault Configuration Register
516pub mod dtfc;
517///DTOGEN (rw) register accessor: DTI Output Generation Enable Register
518///
519///You can [`read`](crate::Reg::read) this register and get [`dtogen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtogen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
520///
521///For information about available fields see [`mod@dtogen`] module
522#[doc(alias = "DTOGEN")]
523pub type Dtogen = crate::Reg<dtogen::DTOGENrs>;
524///DTI Output Generation Enable Register
525pub mod dtogen;
526///DTFAULT (r) register accessor: DTI Fault Register
527///
528///You can [`read`](crate::Reg::read) this register and get [`dtfault::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
529///
530///For information about available fields see [`mod@dtfault`] module
531#[doc(alias = "DTFAULT")]
532pub type Dtfault = crate::Reg<dtfault::DTFAULTrs>;
533///DTI Fault Register
534pub mod dtfault;
535///DTFAULTC (w) register accessor: DTI Fault Clear Register
536///
537///You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtfaultc::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
538///
539///For information about available fields see [`mod@dtfaultc`] module
540#[doc(alias = "DTFAULTC")]
541pub type Dtfaultc = crate::Reg<dtfaultc::DTFAULTCrs>;
542///DTI Fault Clear Register
543pub mod dtfaultc;
544///DTLOCK (rw) register accessor: DTI Configuration Lock Register
545///
546///You can [`read`](crate::Reg::read) this register and get [`dtlock::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtlock::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
547///
548///For information about available fields see [`mod@dtlock`] module
549#[doc(alias = "DTLOCK")]
550pub type Dtlock = crate::Reg<dtlock::DTLOCKrs>;
551///DTI Configuration Lock Register
552pub mod dtlock;
efm32pg1b_pac/timer0.rs

efm32pg1b_pac/
timer0.rs
