efm32pg1b_pac/emu/
dcdcctrl.rs

1///Register `DCDCCTRL` reader
2pub type R = crate::R<DCDCCTRLrs>;
3///Register `DCDCCTRL` writer
4pub type W = crate::W<DCDCCTRLrs>;
5///Regulator Mode
6///
7///Value on reset: 0
8#[cfg_attr(feature = "defmt", derive(defmt::Format))]
9#[derive(Clone, Copy, Debug, PartialEq, Eq)]
10#[repr(u8)]
11pub enum DCDCMODE {
12    ///0: DCDC regulator is operating in bypass mode. Prior to configuring DCDCMODE=BYPASS, software must set EMU_DCDCCLIMCTRL.BYPLIMEN=1 to prevent excessive current between VREGVDD and DVDD supplies.
13    Bypass = 0,
14    ///1: DCDC regulator is operating in low noise mode.
15    Lownoise = 1,
16    ///2: DCDC regulator is operating in low power mode.
17    Lowpower = 2,
18    ///3: DCDC regulator is off and the bypass switch is off. Note: DVDD must be supplied externally
19    Off = 3,
20}
21impl From<DCDCMODE> for u8 {
22    #[inline(always)]
23    fn from(variant: DCDCMODE) -> Self {
24        variant as _
25    }
26}
27impl crate::FieldSpec for DCDCMODE {
28    type Ux = u8;
29}
30impl crate::IsEnum for DCDCMODE {}
31///Field `DCDCMODE` reader - Regulator Mode
32pub type DcdcmodeR = crate::FieldReader<DCDCMODE>;
33impl DcdcmodeR {
34    ///Get enumerated values variant
35    #[inline(always)]
36    pub const fn variant(&self) -> DCDCMODE {
37        match self.bits {
38            0 => DCDCMODE::Bypass,
39            1 => DCDCMODE::Lownoise,
40            2 => DCDCMODE::Lowpower,
41            3 => DCDCMODE::Off,
42            _ => unreachable!(),
43        }
44    }
45    ///DCDC regulator is operating in bypass mode. Prior to configuring DCDCMODE=BYPASS, software must set EMU_DCDCCLIMCTRL.BYPLIMEN=1 to prevent excessive current between VREGVDD and DVDD supplies.
46    #[inline(always)]
47    pub fn is_bypass(&self) -> bool {
48        *self == DCDCMODE::Bypass
49    }
50    ///DCDC regulator is operating in low noise mode.
51    #[inline(always)]
52    pub fn is_lownoise(&self) -> bool {
53        *self == DCDCMODE::Lownoise
54    }
55    ///DCDC regulator is operating in low power mode.
56    #[inline(always)]
57    pub fn is_lowpower(&self) -> bool {
58        *self == DCDCMODE::Lowpower
59    }
60    ///DCDC regulator is off and the bypass switch is off. Note: DVDD must be supplied externally
61    #[inline(always)]
62    pub fn is_off(&self) -> bool {
63        *self == DCDCMODE::Off
64    }
65}
66///Field `DCDCMODE` writer - Regulator Mode
67pub type DcdcmodeW<'a, REG> = crate::FieldWriter<'a, REG, 2, DCDCMODE, crate::Safe>;
68impl<'a, REG> DcdcmodeW<'a, REG>
69where
70    REG: crate::Writable + crate::RegisterSpec,
71    REG::Ux: From<u8>,
72{
73    ///DCDC regulator is operating in bypass mode. Prior to configuring DCDCMODE=BYPASS, software must set EMU_DCDCCLIMCTRL.BYPLIMEN=1 to prevent excessive current between VREGVDD and DVDD supplies.
74    #[inline(always)]
75    pub fn bypass(self) -> &'a mut crate::W<REG> {
76        self.variant(DCDCMODE::Bypass)
77    }
78    ///DCDC regulator is operating in low noise mode.
79    #[inline(always)]
80    pub fn lownoise(self) -> &'a mut crate::W<REG> {
81        self.variant(DCDCMODE::Lownoise)
82    }
83    ///DCDC regulator is operating in low power mode.
84    #[inline(always)]
85    pub fn lowpower(self) -> &'a mut crate::W<REG> {
86        self.variant(DCDCMODE::Lowpower)
87    }
88    ///DCDC regulator is off and the bypass switch is off. Note: DVDD must be supplied externally
89    #[inline(always)]
90    pub fn off(self) -> &'a mut crate::W<REG> {
91        self.variant(DCDCMODE::Off)
92    }
93}
94///Field `DCDCMODEEM23` reader - DCDC Mode EM23
95pub type Dcdcmodeem23R = crate::BitReader;
96///Field `DCDCMODEEM23` writer - DCDC Mode EM23
97pub type Dcdcmodeem23W<'a, REG> = crate::BitWriter<'a, REG>;
98///Field `DCDCMODEEM4` reader - DCDC Mode EM4H
99pub type Dcdcmodeem4R = crate::BitReader;
100///Field `DCDCMODEEM4` writer - DCDC Mode EM4H
101pub type Dcdcmodeem4W<'a, REG> = crate::BitWriter<'a, REG>;
102impl R {
103    ///Bits 0:1 - Regulator Mode
104    #[inline(always)]
105    pub fn dcdcmode(&self) -> DcdcmodeR {
106        DcdcmodeR::new((self.bits & 3) as u8)
107    }
108    ///Bit 4 - DCDC Mode EM23
109    #[inline(always)]
110    pub fn dcdcmodeem23(&self) -> Dcdcmodeem23R {
111        Dcdcmodeem23R::new(((self.bits >> 4) & 1) != 0)
112    }
113    ///Bit 5 - DCDC Mode EM4H
114    #[inline(always)]
115    pub fn dcdcmodeem4(&self) -> Dcdcmodeem4R {
116        Dcdcmodeem4R::new(((self.bits >> 5) & 1) != 0)
117    }
118}
119impl core::fmt::Debug for R {
120    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
121        f.debug_struct("DCDCCTRL")
122            .field("dcdcmode", &self.dcdcmode())
123            .field("dcdcmodeem23", &self.dcdcmodeem23())
124            .field("dcdcmodeem4", &self.dcdcmodeem4())
125            .finish()
126    }
127}
128impl W {
129    ///Bits 0:1 - Regulator Mode
130    #[inline(always)]
131    pub fn dcdcmode(&mut self) -> DcdcmodeW<'_, DCDCCTRLrs> {
132        DcdcmodeW::new(self, 0)
133    }
134    ///Bit 4 - DCDC Mode EM23
135    #[inline(always)]
136    pub fn dcdcmodeem23(&mut self) -> Dcdcmodeem23W<'_, DCDCCTRLrs> {
137        Dcdcmodeem23W::new(self, 4)
138    }
139    ///Bit 5 - DCDC Mode EM4H
140    #[inline(always)]
141    pub fn dcdcmodeem4(&mut self) -> Dcdcmodeem4W<'_, DCDCCTRLrs> {
142        Dcdcmodeem4W::new(self, 5)
143    }
144}
145///DCDC Control
146///
147///You can [`read`](crate::Reg::read) this register and get [`dcdcctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dcdcctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
148pub struct DCDCCTRLrs;
149impl crate::RegisterSpec for DCDCCTRLrs {
150    type Ux = u32;
151}
152///`read()` method returns [`dcdcctrl::R`](R) reader structure
153impl crate::Readable for DCDCCTRLrs {}
154///`write(|w| ..)` method takes [`dcdcctrl::W`](W) writer structure
155impl crate::Writable for DCDCCTRLrs {
156    type Safety = crate::Unsafe;
157}
158///`reset()` method sets DCDCCTRL to value 0x30
159impl crate::Resettable for DCDCCTRLrs {
160    const RESET_VALUE: u32 = 0x30;
161}
efm32pg1b_pac/emu/dcdcctrl.rs

efm32pg1b_pac/emu/
dcdcctrl.rs
