efm32pg1b_pac/cmu/
hfxoctrl.rs

1///Register `HFXOCTRL` reader
2pub type R = crate::R<HFXOCTRLrs>;
3///Register `HFXOCTRL` writer
4pub type W = crate::W<HFXOCTRLrs>;
5///Field `MODE` reader - HFXO Mode
6pub type ModeR = crate::BitReader;
7///Field `MODE` writer - HFXO Mode
8pub type ModeW<'a, REG> = crate::BitWriter<'a, REG>;
9///HFXO Automatic Peak Detection and Shunt Current Optimization Mode
10///
11///Value on reset: 0
12#[cfg_attr(feature = "defmt", derive(defmt::Format))]
13#[derive(Clone, Copy, Debug, PartialEq, Eq)]
14#[repr(u8)]
15pub enum PEAKDETSHUNTOPTMODE {
16    ///0: Automatic control of HFXO peak detection and shunt optimization sequences. CMU_CMD HFXOPEAKDETSTART and HFXOSHUNTOPTSTART can also be used.
17    Autocmd = 0,
18    ///1: CMU_CMD HFXOPEAKDETSTART and HFXOSHUNTOPTSTART can be used to trigger peak detection and shunt optimization sequences.
19    Cmd = 1,
20    ///2: CMU_HFXOSTEADYSTATECTRL IBTRIMXOCORE, REGISH, REGSELILOW, and PEAKDETEN are under full software control and are allowed to be changed once HFXO is ready.
21    Manual = 2,
22}
23impl From<PEAKDETSHUNTOPTMODE> for u8 {
24    #[inline(always)]
25    fn from(variant: PEAKDETSHUNTOPTMODE) -> Self {
26        variant as _
27    }
28}
29impl crate::FieldSpec for PEAKDETSHUNTOPTMODE {
30    type Ux = u8;
31}
32impl crate::IsEnum for PEAKDETSHUNTOPTMODE {}
33///Field `PEAKDETSHUNTOPTMODE` reader - HFXO Automatic Peak Detection and Shunt Current Optimization Mode
34pub type PeakdetshuntoptmodeR = crate::FieldReader<PEAKDETSHUNTOPTMODE>;
35impl PeakdetshuntoptmodeR {
36    ///Get enumerated values variant
37    #[inline(always)]
38    pub const fn variant(&self) -> Option<PEAKDETSHUNTOPTMODE> {
39        match self.bits {
40            0 => Some(PEAKDETSHUNTOPTMODE::Autocmd),
41            1 => Some(PEAKDETSHUNTOPTMODE::Cmd),
42            2 => Some(PEAKDETSHUNTOPTMODE::Manual),
43            _ => None,
44        }
45    }
46    ///Automatic control of HFXO peak detection and shunt optimization sequences. CMU_CMD HFXOPEAKDETSTART and HFXOSHUNTOPTSTART can also be used.
47    #[inline(always)]
48    pub fn is_autocmd(&self) -> bool {
49        *self == PEAKDETSHUNTOPTMODE::Autocmd
50    }
51    ///CMU_CMD HFXOPEAKDETSTART and HFXOSHUNTOPTSTART can be used to trigger peak detection and shunt optimization sequences.
52    #[inline(always)]
53    pub fn is_cmd(&self) -> bool {
54        *self == PEAKDETSHUNTOPTMODE::Cmd
55    }
56    ///CMU_HFXOSTEADYSTATECTRL IBTRIMXOCORE, REGISH, REGSELILOW, and PEAKDETEN are under full software control and are allowed to be changed once HFXO is ready.
57    #[inline(always)]
58    pub fn is_manual(&self) -> bool {
59        *self == PEAKDETSHUNTOPTMODE::Manual
60    }
61}
62///Field `PEAKDETSHUNTOPTMODE` writer - HFXO Automatic Peak Detection and Shunt Current Optimization Mode
63pub type PeakdetshuntoptmodeW<'a, REG> = crate::FieldWriter<'a, REG, 2, PEAKDETSHUNTOPTMODE>;
64impl<'a, REG> PeakdetshuntoptmodeW<'a, REG>
65where
66    REG: crate::Writable + crate::RegisterSpec,
67    REG::Ux: From<u8>,
68{
69    ///Automatic control of HFXO peak detection and shunt optimization sequences. CMU_CMD HFXOPEAKDETSTART and HFXOSHUNTOPTSTART can also be used.
70    #[inline(always)]
71    pub fn autocmd(self) -> &'a mut crate::W<REG> {
72        self.variant(PEAKDETSHUNTOPTMODE::Autocmd)
73    }
74    ///CMU_CMD HFXOPEAKDETSTART and HFXOSHUNTOPTSTART can be used to trigger peak detection and shunt optimization sequences.
75    #[inline(always)]
76    pub fn cmd(self) -> &'a mut crate::W<REG> {
77        self.variant(PEAKDETSHUNTOPTMODE::Cmd)
78    }
79    ///CMU_HFXOSTEADYSTATECTRL IBTRIMXOCORE, REGISH, REGSELILOW, and PEAKDETEN are under full software control and are allowed to be changed once HFXO is ready.
80    #[inline(always)]
81    pub fn manual(self) -> &'a mut crate::W<REG> {
82        self.variant(PEAKDETSHUNTOPTMODE::Manual)
83    }
84}
85///Field `LOWPOWER` reader - Low Power Mode Control
86pub type LowpowerR = crate::BitReader;
87///Field `LOWPOWER` writer - Low Power Mode Control
88pub type LowpowerW<'a, REG> = crate::BitWriter<'a, REG>;
89///Field `XTI2GND` reader - Clamp HFXTAL_N Pin to Ground When HFXO Oscillator is Off
90pub type Xti2gndR = crate::BitReader;
91///Field `XTI2GND` writer - Clamp HFXTAL_N Pin to Ground When HFXO Oscillator is Off
92pub type Xti2gndW<'a, REG> = crate::BitWriter<'a, REG>;
93///Field `XTO2GND` reader - Clamp HFXTAL_P Pin to Ground When HFXO Oscillator is Off
94pub type Xto2gndR = crate::BitReader;
95///Field `XTO2GND` writer - Clamp HFXTAL_P Pin to Ground When HFXO Oscillator is Off
96pub type Xto2gndW<'a, REG> = crate::BitWriter<'a, REG>;
97///HFXO Low Frequency Timeout
98///
99///Value on reset: 0
100#[cfg_attr(feature = "defmt", derive(defmt::Format))]
101#[derive(Clone, Copy, Debug, PartialEq, Eq)]
102#[repr(u8)]
103pub enum LFTIMEOUT {
104    ///0: Timeout period of 0 cycles (disabled)
105    _0cycles = 0,
106    ///1: Timeout period of 2 cycles
107    _2cycles = 1,
108    ///2: Timeout period of 4 cycles
109    _4cycles = 2,
110    ///3: Timeout period of 16 cycles
111    _16cycles = 3,
112    ///4: Timeout period of 32 cycles
113    _32cycles = 4,
114    ///5: Timeout period of 64 cycles
115    _64cycles = 5,
116    ///6: Timeout period of 1024 cycles
117    _1kcycles = 6,
118    ///7: Timeout period of 4096 cycles
119    _4kcycles = 7,
120}
121impl From<LFTIMEOUT> for u8 {
122    #[inline(always)]
123    fn from(variant: LFTIMEOUT) -> Self {
124        variant as _
125    }
126}
127impl crate::FieldSpec for LFTIMEOUT {
128    type Ux = u8;
129}
130impl crate::IsEnum for LFTIMEOUT {}
131///Field `LFTIMEOUT` reader - HFXO Low Frequency Timeout
132pub type LftimeoutR = crate::FieldReader<LFTIMEOUT>;
133impl LftimeoutR {
134    ///Get enumerated values variant
135    #[inline(always)]
136    pub const fn variant(&self) -> LFTIMEOUT {
137        match self.bits {
138            0 => LFTIMEOUT::_0cycles,
139            1 => LFTIMEOUT::_2cycles,
140            2 => LFTIMEOUT::_4cycles,
141            3 => LFTIMEOUT::_16cycles,
142            4 => LFTIMEOUT::_32cycles,
143            5 => LFTIMEOUT::_64cycles,
144            6 => LFTIMEOUT::_1kcycles,
145            7 => LFTIMEOUT::_4kcycles,
146            _ => unreachable!(),
147        }
148    }
149    ///Timeout period of 0 cycles (disabled)
150    #[inline(always)]
151    pub fn is_0cycles(&self) -> bool {
152        *self == LFTIMEOUT::_0cycles
153    }
154    ///Timeout period of 2 cycles
155    #[inline(always)]
156    pub fn is_2cycles(&self) -> bool {
157        *self == LFTIMEOUT::_2cycles
158    }
159    ///Timeout period of 4 cycles
160    #[inline(always)]
161    pub fn is_4cycles(&self) -> bool {
162        *self == LFTIMEOUT::_4cycles
163    }
164    ///Timeout period of 16 cycles
165    #[inline(always)]
166    pub fn is_16cycles(&self) -> bool {
167        *self == LFTIMEOUT::_16cycles
168    }
169    ///Timeout period of 32 cycles
170    #[inline(always)]
171    pub fn is_32cycles(&self) -> bool {
172        *self == LFTIMEOUT::_32cycles
173    }
174    ///Timeout period of 64 cycles
175    #[inline(always)]
176    pub fn is_64cycles(&self) -> bool {
177        *self == LFTIMEOUT::_64cycles
178    }
179    ///Timeout period of 1024 cycles
180    #[inline(always)]
181    pub fn is_1kcycles(&self) -> bool {
182        *self == LFTIMEOUT::_1kcycles
183    }
184    ///Timeout period of 4096 cycles
185    #[inline(always)]
186    pub fn is_4kcycles(&self) -> bool {
187        *self == LFTIMEOUT::_4kcycles
188    }
189}
190///Field `LFTIMEOUT` writer - HFXO Low Frequency Timeout
191pub type LftimeoutW<'a, REG> = crate::FieldWriter<'a, REG, 3, LFTIMEOUT, crate::Safe>;
192impl<'a, REG> LftimeoutW<'a, REG>
193where
194    REG: crate::Writable + crate::RegisterSpec,
195    REG::Ux: From<u8>,
196{
197    ///Timeout period of 0 cycles (disabled)
198    #[inline(always)]
199    pub fn _0cycles(self) -> &'a mut crate::W<REG> {
200        self.variant(LFTIMEOUT::_0cycles)
201    }
202    ///Timeout period of 2 cycles
203    #[inline(always)]
204    pub fn _2cycles(self) -> &'a mut crate::W<REG> {
205        self.variant(LFTIMEOUT::_2cycles)
206    }
207    ///Timeout period of 4 cycles
208    #[inline(always)]
209    pub fn _4cycles(self) -> &'a mut crate::W<REG> {
210        self.variant(LFTIMEOUT::_4cycles)
211    }
212    ///Timeout period of 16 cycles
213    #[inline(always)]
214    pub fn _16cycles(self) -> &'a mut crate::W<REG> {
215        self.variant(LFTIMEOUT::_16cycles)
216    }
217    ///Timeout period of 32 cycles
218    #[inline(always)]
219    pub fn _32cycles(self) -> &'a mut crate::W<REG> {
220        self.variant(LFTIMEOUT::_32cycles)
221    }
222    ///Timeout period of 64 cycles
223    #[inline(always)]
224    pub fn _64cycles(self) -> &'a mut crate::W<REG> {
225        self.variant(LFTIMEOUT::_64cycles)
226    }
227    ///Timeout period of 1024 cycles
228    #[inline(always)]
229    pub fn _1kcycles(self) -> &'a mut crate::W<REG> {
230        self.variant(LFTIMEOUT::_1kcycles)
231    }
232    ///Timeout period of 4096 cycles
233    #[inline(always)]
234    pub fn _4kcycles(self) -> &'a mut crate::W<REG> {
235        self.variant(LFTIMEOUT::_4kcycles)
236    }
237}
238///Field `AUTOSTARTEM0EM1` reader - Automatically Start of HFXO Upon EM0/EM1 Entry From EM2/EM3
239pub type Autostartem0em1R = crate::BitReader;
240///Field `AUTOSTARTEM0EM1` writer - Automatically Start of HFXO Upon EM0/EM1 Entry From EM2/EM3
241pub type Autostartem0em1W<'a, REG> = crate::BitWriter<'a, REG>;
242///Field `AUTOSTARTSELEM0EM1` reader - Automatically Start and Select of HFXO Upon EM0/EM1 Entry From EM2/EM3
243pub type Autostartselem0em1R = crate::BitReader;
244///Field `AUTOSTARTSELEM0EM1` writer - Automatically Start and Select of HFXO Upon EM0/EM1 Entry From EM2/EM3
245pub type Autostartselem0em1W<'a, REG> = crate::BitWriter<'a, REG>;
246impl R {
247    ///Bit 0 - HFXO Mode
248    #[inline(always)]
249    pub fn mode(&self) -> ModeR {
250        ModeR::new((self.bits & 1) != 0)
251    }
252    ///Bits 4:5 - HFXO Automatic Peak Detection and Shunt Current Optimization Mode
253    #[inline(always)]
254    pub fn peakdetshuntoptmode(&self) -> PeakdetshuntoptmodeR {
255        PeakdetshuntoptmodeR::new(((self.bits >> 4) & 3) as u8)
256    }
257    ///Bit 8 - Low Power Mode Control
258    #[inline(always)]
259    pub fn lowpower(&self) -> LowpowerR {
260        LowpowerR::new(((self.bits >> 8) & 1) != 0)
261    }
262    ///Bit 9 - Clamp HFXTAL_N Pin to Ground When HFXO Oscillator is Off
263    #[inline(always)]
264    pub fn xti2gnd(&self) -> Xti2gndR {
265        Xti2gndR::new(((self.bits >> 9) & 1) != 0)
266    }
267    ///Bit 10 - Clamp HFXTAL_P Pin to Ground When HFXO Oscillator is Off
268    #[inline(always)]
269    pub fn xto2gnd(&self) -> Xto2gndR {
270        Xto2gndR::new(((self.bits >> 10) & 1) != 0)
271    }
272    ///Bits 24:26 - HFXO Low Frequency Timeout
273    #[inline(always)]
274    pub fn lftimeout(&self) -> LftimeoutR {
275        LftimeoutR::new(((self.bits >> 24) & 7) as u8)
276    }
277    ///Bit 28 - Automatically Start of HFXO Upon EM0/EM1 Entry From EM2/EM3
278    #[inline(always)]
279    pub fn autostartem0em1(&self) -> Autostartem0em1R {
280        Autostartem0em1R::new(((self.bits >> 28) & 1) != 0)
281    }
282    ///Bit 29 - Automatically Start and Select of HFXO Upon EM0/EM1 Entry From EM2/EM3
283    #[inline(always)]
284    pub fn autostartselem0em1(&self) -> Autostartselem0em1R {
285        Autostartselem0em1R::new(((self.bits >> 29) & 1) != 0)
286    }
287}
288impl core::fmt::Debug for R {
289    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
290        f.debug_struct("HFXOCTRL")
291            .field("mode", &self.mode())
292            .field("peakdetshuntoptmode", &self.peakdetshuntoptmode())
293            .field("lowpower", &self.lowpower())
294            .field("xti2gnd", &self.xti2gnd())
295            .field("xto2gnd", &self.xto2gnd())
296            .field("lftimeout", &self.lftimeout())
297            .field("autostartem0em1", &self.autostartem0em1())
298            .field("autostartselem0em1", &self.autostartselem0em1())
299            .finish()
300    }
301}
302impl W {
303    ///Bit 0 - HFXO Mode
304    #[inline(always)]
305    pub fn mode(&mut self) -> ModeW<'_, HFXOCTRLrs> {
306        ModeW::new(self, 0)
307    }
308    ///Bits 4:5 - HFXO Automatic Peak Detection and Shunt Current Optimization Mode
309    #[inline(always)]
310    pub fn peakdetshuntoptmode(&mut self) -> PeakdetshuntoptmodeW<'_, HFXOCTRLrs> {
311        PeakdetshuntoptmodeW::new(self, 4)
312    }
313    ///Bit 8 - Low Power Mode Control
314    #[inline(always)]
315    pub fn lowpower(&mut self) -> LowpowerW<'_, HFXOCTRLrs> {
316        LowpowerW::new(self, 8)
317    }
318    ///Bit 9 - Clamp HFXTAL_N Pin to Ground When HFXO Oscillator is Off
319    #[inline(always)]
320    pub fn xti2gnd(&mut self) -> Xti2gndW<'_, HFXOCTRLrs> {
321        Xti2gndW::new(self, 9)
322    }
323    ///Bit 10 - Clamp HFXTAL_P Pin to Ground When HFXO Oscillator is Off
324    #[inline(always)]
325    pub fn xto2gnd(&mut self) -> Xto2gndW<'_, HFXOCTRLrs> {
326        Xto2gndW::new(self, 10)
327    }
328    ///Bits 24:26 - HFXO Low Frequency Timeout
329    #[inline(always)]
330    pub fn lftimeout(&mut self) -> LftimeoutW<'_, HFXOCTRLrs> {
331        LftimeoutW::new(self, 24)
332    }
333    ///Bit 28 - Automatically Start of HFXO Upon EM0/EM1 Entry From EM2/EM3
334    #[inline(always)]
335    pub fn autostartem0em1(&mut self) -> Autostartem0em1W<'_, HFXOCTRLrs> {
336        Autostartem0em1W::new(self, 28)
337    }
338    ///Bit 29 - Automatically Start and Select of HFXO Upon EM0/EM1 Entry From EM2/EM3
339    #[inline(always)]
340    pub fn autostartselem0em1(&mut self) -> Autostartselem0em1W<'_, HFXOCTRLrs> {
341        Autostartselem0em1W::new(self, 29)
342    }
343}
344///HFXO Control Register
345///
346///You can [`read`](crate::Reg::read) this register and get [`hfxoctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hfxoctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
347pub struct HFXOCTRLrs;
348impl crate::RegisterSpec for HFXOCTRLrs {
349    type Ux = u32;
350}
351///`read()` method returns [`hfxoctrl::R`](R) reader structure
352impl crate::Readable for HFXOCTRLrs {}
353///`write(|w| ..)` method takes [`hfxoctrl::W`](W) writer structure
354impl crate::Writable for HFXOCTRLrs {
355    type Safety = crate::Unsafe;
356}
357///`reset()` method sets HFXOCTRL to value 0
358impl crate::Resettable for HFXOCTRLrs {}
efm32pg1b_pac/cmu/hfxoctrl.rs

efm32pg1b_pac/cmu/
hfxoctrl.rs
