efm32pg1b_pac/ldma/
ch0_link.rs

1///Register `CH0_LINK` reader
2pub type R = crate::R<CH0_LINKrs>;
3///Register `CH0_LINK` writer
4pub type W = crate::W<CH0_LINKrs>;
5///Field `LINKMODE` reader - Link Structure Addressing Mode
6pub type LinkmodeR = crate::BitReader;
7///Field `LINK` reader - Link Next Structure
8pub type LinkR = crate::BitReader;
9///Field `LINK` writer - Link Next Structure
10pub type LinkW<'a, REG> = crate::BitWriter<'a, REG>;
11///Field `LINKADDR` reader - Link Structure Address
12pub type LinkaddrR = crate::FieldReader<u32>;
13///Field `LINKADDR` writer - Link Structure Address
14pub type LinkaddrW<'a, REG> = crate::FieldWriter<'a, REG, 30, u32>;
15impl R {
16    ///Bit 0 - Link Structure Addressing Mode
17    #[inline(always)]
18    pub fn linkmode(&self) -> LinkmodeR {
19        LinkmodeR::new((self.bits & 1) != 0)
20    }
21    ///Bit 1 - Link Next Structure
22    #[inline(always)]
23    pub fn link(&self) -> LinkR {
24        LinkR::new(((self.bits >> 1) & 1) != 0)
25    }
26    ///Bits 2:31 - Link Structure Address
27    #[inline(always)]
28    pub fn linkaddr(&self) -> LinkaddrR {
29        LinkaddrR::new((self.bits >> 2) & 0x3fff_ffff)
30    }
31}
32impl core::fmt::Debug for R {
33    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
34        f.debug_struct("CH0_LINK")
35            .field("linkmode", &self.linkmode())
36            .field("link", &self.link())
37            .field("linkaddr", &self.linkaddr())
38            .finish()
39    }
40}
41impl W {
42    ///Bit 1 - Link Next Structure
43    #[inline(always)]
44    pub fn link(&mut self) -> LinkW<CH0_LINKrs> {
45        LinkW::new(self, 1)
46    }
47    ///Bits 2:31 - Link Structure Address
48    #[inline(always)]
49    pub fn linkaddr(&mut self) -> LinkaddrW<CH0_LINKrs> {
50        LinkaddrW::new(self, 2)
51    }
52}
53///Channel Descriptor Link Structure Address Register
54///
55///You can [`read`](crate::Reg::read) this register and get [`ch0_link::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ch0_link::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
56pub struct CH0_LINKrs;
57impl crate::RegisterSpec for CH0_LINKrs {
58    type Ux = u32;
59}
60///`read()` method returns [`ch0_link::R`](R) reader structure
61impl crate::Readable for CH0_LINKrs {}
62///`write(|w| ..)` method takes [`ch0_link::W`](W) writer structure
63impl crate::Writable for CH0_LINKrs {
64    type Safety = crate::Unsafe;
65    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
66    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
67}
68///`reset()` method sets CH0_LINK to value 0
69impl crate::Resettable for CH0_LINKrs {
70    const RESET_VALUE: u32 = 0;
71}
efm32pg1b_pac/ldma/ch0_link.rs

efm32pg1b_pac/ldma/
ch0_link.rs
