efm32pg1b_pac/idac0/
aportreq.rs

1///Register `APORTREQ` reader
2pub type R = crate::R<APORTREQrs>;
3///Field `APORT1XREQ` reader - 1 If the APORT Bus Connected to APORT1X is Requested
4pub type Aport1xreqR = crate::BitReader;
5///Field `APORT1YREQ` reader - 1 If the Bus Connected to APORT1Y is Requested
6pub type Aport1yreqR = crate::BitReader;
7impl R {
8    ///Bit 2 - 1 If the APORT Bus Connected to APORT1X is Requested
9    #[inline(always)]
10    pub fn aport1xreq(&self) -> Aport1xreqR {
11        Aport1xreqR::new(((self.bits >> 2) & 1) != 0)
12    }
13    ///Bit 3 - 1 If the Bus Connected to APORT1Y is Requested
14    #[inline(always)]
15    pub fn aport1yreq(&self) -> Aport1yreqR {
16        Aport1yreqR::new(((self.bits >> 3) & 1) != 0)
17    }
18}
19impl core::fmt::Debug for R {
20    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
21        f.debug_struct("APORTREQ")
22            .field("aport1xreq", &self.aport1xreq())
23            .field("aport1yreq", &self.aport1yreq())
24            .finish()
25    }
26}
27///APORT Request Status Register
28///
29///You can [`read`](crate::Reg::read) this register and get [`aportreq::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api).
30pub struct APORTREQrs;
31impl crate::RegisterSpec for APORTREQrs {
32    type Ux = u32;
33}
34///`read()` method returns [`aportreq::R`](R) reader structure
35impl crate::Readable for APORTREQrs {}
36///`reset()` method sets APORTREQ to value 0
37impl crate::Resettable for APORTREQrs {
38    const RESET_VALUE: u32 = 0;
39}
efm32pg1b_pac/idac0/aportreq.rs

efm32pg1b_pac/idac0/
aportreq.rs
