efm32pg1b_pac/emu/
dcdclnvctrl.rs

1///Register `DCDCLNVCTRL` reader
2pub type R = crate::R<DCDCLNVCTRLrs>;
3///Register `DCDCLNVCTRL` writer
4pub type W = crate::W<DCDCLNVCTRLrs>;
5///Field `LNATT` reader - Low Noise Mode Feedback Attenuation
6pub type LnattR = crate::BitReader;
7///Field `LNATT` writer - Low Noise Mode Feedback Attenuation
8pub type LnattW<'a, REG> = crate::BitWriter<'a, REG>;
9///Field `LNVREF` reader - Low Noise Mode VREF Trim
10pub type LnvrefR = crate::FieldReader;
11///Field `LNVREF` writer - Low Noise Mode VREF Trim
12pub type LnvrefW<'a, REG> = crate::FieldWriter<'a, REG, 7>;
13impl R {
14    ///Bit 1 - Low Noise Mode Feedback Attenuation
15    #[inline(always)]
16    pub fn lnatt(&self) -> LnattR {
17        LnattR::new(((self.bits >> 1) & 1) != 0)
18    }
19    ///Bits 8:14 - Low Noise Mode VREF Trim
20    #[inline(always)]
21    pub fn lnvref(&self) -> LnvrefR {
22        LnvrefR::new(((self.bits >> 8) & 0x7f) as u8)
23    }
24}
25impl core::fmt::Debug for R {
26    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
27        f.debug_struct("DCDCLNVCTRL")
28            .field("lnatt", &self.lnatt())
29            .field("lnvref", &self.lnvref())
30            .finish()
31    }
32}
33impl W {
34    ///Bit 1 - Low Noise Mode Feedback Attenuation
35    #[inline(always)]
36    pub fn lnatt(&mut self) -> LnattW<DCDCLNVCTRLrs> {
37        LnattW::new(self, 1)
38    }
39    ///Bits 8:14 - Low Noise Mode VREF Trim
40    #[inline(always)]
41    pub fn lnvref(&mut self) -> LnvrefW<DCDCLNVCTRLrs> {
42        LnvrefW::new(self, 8)
43    }
44}
45///DCDC Low Noise Voltage Register
46///
47///You can [`read`](crate::Reg::read) this register and get [`dcdclnvctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dcdclnvctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
48pub struct DCDCLNVCTRLrs;
49impl crate::RegisterSpec for DCDCLNVCTRLrs {
50    type Ux = u32;
51}
52///`read()` method returns [`dcdclnvctrl::R`](R) reader structure
53impl crate::Readable for DCDCLNVCTRLrs {}
54///`write(|w| ..)` method takes [`dcdclnvctrl::W`](W) writer structure
55impl crate::Writable for DCDCLNVCTRLrs {
56    type Safety = crate::Unsafe;
57    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
58    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
59}
60///`reset()` method sets DCDCLNVCTRL to value 0x7100
61impl crate::Resettable for DCDCLNVCTRLrs {
62    const RESET_VALUE: u32 = 0x7100;
63}
efm32pg1b_pac/emu/dcdclnvctrl.rs

efm32pg1b_pac/emu/
dcdclnvctrl.rs
