efm32pg12b500_pac/vdac0/
cmd.rs1#[doc = "Register `CMD` writer"]
2pub struct W(crate::W<CMD_SPEC>);
3impl core::ops::Deref for W {
4 type Target = crate::W<CMD_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl core::ops::DerefMut for W {
11 #[inline(always)]
12 fn deref_mut(&mut self) -> &mut Self::Target {
13 &mut self.0
14 }
15}
16impl From<crate::W<CMD_SPEC>> for W {
17 #[inline(always)]
18 fn from(writer: crate::W<CMD_SPEC>) -> Self {
19 W(writer)
20 }
21}
22#[doc = "Field `CH0EN` writer - DAC Channel 0 Enable"]
23pub type CH0EN_W<'a> = crate::BitWriter<'a, u32, CMD_SPEC, bool, 0>;
24#[doc = "Field `CH0DIS` writer - DAC Channel 0 Disable"]
25pub type CH0DIS_W<'a> = crate::BitWriter<'a, u32, CMD_SPEC, bool, 1>;
26#[doc = "Field `CH1EN` writer - DAC Channel 1 Enable"]
27pub type CH1EN_W<'a> = crate::BitWriter<'a, u32, CMD_SPEC, bool, 2>;
28#[doc = "Field `CH1DIS` writer - DAC Channel 1 Disable"]
29pub type CH1DIS_W<'a> = crate::BitWriter<'a, u32, CMD_SPEC, bool, 3>;
30#[doc = "Field `OPA0EN` writer - OPA0 Enable"]
31pub type OPA0EN_W<'a> = crate::BitWriter<'a, u32, CMD_SPEC, bool, 16>;
32#[doc = "Field `OPA0DIS` writer - OPA0 Disable"]
33pub type OPA0DIS_W<'a> = crate::BitWriter<'a, u32, CMD_SPEC, bool, 17>;
34#[doc = "Field `OPA1EN` writer - OPA1 Enable"]
35pub type OPA1EN_W<'a> = crate::BitWriter<'a, u32, CMD_SPEC, bool, 18>;
36#[doc = "Field `OPA1DIS` writer - OPA1 Disable"]
37pub type OPA1DIS_W<'a> = crate::BitWriter<'a, u32, CMD_SPEC, bool, 19>;
38#[doc = "Field `OPA2EN` writer - OPA2 Enable"]
39pub type OPA2EN_W<'a> = crate::BitWriter<'a, u32, CMD_SPEC, bool, 20>;
40#[doc = "Field `OPA2DIS` writer - OPA2 Disable"]
41pub type OPA2DIS_W<'a> = crate::BitWriter<'a, u32, CMD_SPEC, bool, 21>;
42impl W {
43 #[doc = "Bit 0 - DAC Channel 0 Enable"]
44 #[inline(always)]
45 pub fn ch0en(&mut self) -> CH0EN_W {
46 CH0EN_W::new(self)
47 }
48 #[doc = "Bit 1 - DAC Channel 0 Disable"]
49 #[inline(always)]
50 pub fn ch0dis(&mut self) -> CH0DIS_W {
51 CH0DIS_W::new(self)
52 }
53 #[doc = "Bit 2 - DAC Channel 1 Enable"]
54 #[inline(always)]
55 pub fn ch1en(&mut self) -> CH1EN_W {
56 CH1EN_W::new(self)
57 }
58 #[doc = "Bit 3 - DAC Channel 1 Disable"]
59 #[inline(always)]
60 pub fn ch1dis(&mut self) -> CH1DIS_W {
61 CH1DIS_W::new(self)
62 }
63 #[doc = "Bit 16 - OPA0 Enable"]
64 #[inline(always)]
65 pub fn opa0en(&mut self) -> OPA0EN_W {
66 OPA0EN_W::new(self)
67 }
68 #[doc = "Bit 17 - OPA0 Disable"]
69 #[inline(always)]
70 pub fn opa0dis(&mut self) -> OPA0DIS_W {
71 OPA0DIS_W::new(self)
72 }
73 #[doc = "Bit 18 - OPA1 Enable"]
74 #[inline(always)]
75 pub fn opa1en(&mut self) -> OPA1EN_W {
76 OPA1EN_W::new(self)
77 }
78 #[doc = "Bit 19 - OPA1 Disable"]
79 #[inline(always)]
80 pub fn opa1dis(&mut self) -> OPA1DIS_W {
81 OPA1DIS_W::new(self)
82 }
83 #[doc = "Bit 20 - OPA2 Enable"]
84 #[inline(always)]
85 pub fn opa2en(&mut self) -> OPA2EN_W {
86 OPA2EN_W::new(self)
87 }
88 #[doc = "Bit 21 - OPA2 Disable"]
89 #[inline(always)]
90 pub fn opa2dis(&mut self) -> OPA2DIS_W {
91 OPA2DIS_W::new(self)
92 }
93 #[doc = "Writes raw bits to the register."]
94 #[inline(always)]
95 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
96 self.0.bits(bits);
97 self
98 }
99}
100#[doc = "Command Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"]
101pub struct CMD_SPEC;
102impl crate::RegisterSpec for CMD_SPEC {
103 type Ux = u32;
104}
105#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"]
106impl crate::Writable for CMD_SPEC {
107 type Writer = W;
108}
109#[doc = "`reset()` method sets CMD to value 0"]
110impl crate::Resettable for CMD_SPEC {
111 #[inline(always)]
112 fn reset_value() -> Self::Ux {
113 0
114 }
115}