efm32pg12b500_pac/adc0/
singlectrlx.rs

1#[doc = "Register `SINGLECTRLX` reader"]
2pub struct R(crate::R<SINGLECTRLX_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<SINGLECTRLX_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<SINGLECTRLX_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<SINGLECTRLX_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `SINGLECTRLX` writer"]
17pub struct W(crate::W<SINGLECTRLX_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<SINGLECTRLX_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<SINGLECTRLX_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<SINGLECTRLX_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Single Channel Reference Selection\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39#[repr(u8)]
40pub enum VREFSEL_A {
41    #[doc = "0: Internal 0.83V Bandgap reference"]
42    VBGR = 0,
43    #[doc = "1: Scaled AVDD: AVDD*(the VREF attenuation factor)"]
44    VDDXWATT = 1,
45    #[doc = "2: Scaled singled ended external Vref: ADCn_EXTP*(the VREF attenuation factor)"]
46    VREFPWATT = 2,
47    #[doc = "3: Raw single ended external Vref: ADCn_EXTP"]
48    VREFP = 3,
49    #[doc = "4: Special mode used to generate ENTROPY."]
50    VENTROPY = 4,
51    #[doc = "5: Scaled differential external Vref from : (ADCn_EXTP-ADCn_EXTN)*(the VREF attenuation factor)"]
52    VREFPNWATT = 5,
53    #[doc = "6: Raw differential external Vref from : (ADCn_EXTP-ADCn_EXTN)"]
54    VREFPN = 6,
55    #[doc = "7: Internal Bandgap reference at low setting 0.78V"]
56    VBGRLOW = 7,
57}
58impl From<VREFSEL_A> for u8 {
59    #[inline(always)]
60    fn from(variant: VREFSEL_A) -> Self {
61        variant as _
62    }
63}
64#[doc = "Field `VREFSEL` reader - Single Channel Reference Selection"]
65pub type VREFSEL_R = crate::FieldReader<u8, VREFSEL_A>;
66impl VREFSEL_R {
67    #[doc = "Get enumerated values variant"]
68    #[inline(always)]
69    pub fn variant(&self) -> VREFSEL_A {
70        match self.bits {
71            0 => VREFSEL_A::VBGR,
72            1 => VREFSEL_A::VDDXWATT,
73            2 => VREFSEL_A::VREFPWATT,
74            3 => VREFSEL_A::VREFP,
75            4 => VREFSEL_A::VENTROPY,
76            5 => VREFSEL_A::VREFPNWATT,
77            6 => VREFSEL_A::VREFPN,
78            7 => VREFSEL_A::VBGRLOW,
79            _ => unreachable!(),
80        }
81    }
82    #[doc = "Checks if the value of the field is `VBGR`"]
83    #[inline(always)]
84    pub fn is_vbgr(&self) -> bool {
85        *self == VREFSEL_A::VBGR
86    }
87    #[doc = "Checks if the value of the field is `VDDXWATT`"]
88    #[inline(always)]
89    pub fn is_vddxwatt(&self) -> bool {
90        *self == VREFSEL_A::VDDXWATT
91    }
92    #[doc = "Checks if the value of the field is `VREFPWATT`"]
93    #[inline(always)]
94    pub fn is_vrefpwatt(&self) -> bool {
95        *self == VREFSEL_A::VREFPWATT
96    }
97    #[doc = "Checks if the value of the field is `VREFP`"]
98    #[inline(always)]
99    pub fn is_vrefp(&self) -> bool {
100        *self == VREFSEL_A::VREFP
101    }
102    #[doc = "Checks if the value of the field is `VENTROPY`"]
103    #[inline(always)]
104    pub fn is_ventropy(&self) -> bool {
105        *self == VREFSEL_A::VENTROPY
106    }
107    #[doc = "Checks if the value of the field is `VREFPNWATT`"]
108    #[inline(always)]
109    pub fn is_vrefpnwatt(&self) -> bool {
110        *self == VREFSEL_A::VREFPNWATT
111    }
112    #[doc = "Checks if the value of the field is `VREFPN`"]
113    #[inline(always)]
114    pub fn is_vrefpn(&self) -> bool {
115        *self == VREFSEL_A::VREFPN
116    }
117    #[doc = "Checks if the value of the field is `VBGRLOW`"]
118    #[inline(always)]
119    pub fn is_vbgrlow(&self) -> bool {
120        *self == VREFSEL_A::VBGRLOW
121    }
122}
123#[doc = "Field `VREFSEL` writer - Single Channel Reference Selection"]
124pub type VREFSEL_W<'a> = crate::FieldWriterSafe<'a, u32, SINGLECTRLX_SPEC, u8, VREFSEL_A, 3, 0>;
125impl<'a> VREFSEL_W<'a> {
126    #[doc = "Internal 0.83V Bandgap reference"]
127    #[inline(always)]
128    pub fn vbgr(self) -> &'a mut W {
129        self.variant(VREFSEL_A::VBGR)
130    }
131    #[doc = "Scaled AVDD: AVDD*(the VREF attenuation factor)"]
132    #[inline(always)]
133    pub fn vddxwatt(self) -> &'a mut W {
134        self.variant(VREFSEL_A::VDDXWATT)
135    }
136    #[doc = "Scaled singled ended external Vref: ADCn_EXTP*(the VREF attenuation factor)"]
137    #[inline(always)]
138    pub fn vrefpwatt(self) -> &'a mut W {
139        self.variant(VREFSEL_A::VREFPWATT)
140    }
141    #[doc = "Raw single ended external Vref: ADCn_EXTP"]
142    #[inline(always)]
143    pub fn vrefp(self) -> &'a mut W {
144        self.variant(VREFSEL_A::VREFP)
145    }
146    #[doc = "Special mode used to generate ENTROPY."]
147    #[inline(always)]
148    pub fn ventropy(self) -> &'a mut W {
149        self.variant(VREFSEL_A::VENTROPY)
150    }
151    #[doc = "Scaled differential external Vref from : (ADCn_EXTP-ADCn_EXTN)*(the VREF attenuation factor)"]
152    #[inline(always)]
153    pub fn vrefpnwatt(self) -> &'a mut W {
154        self.variant(VREFSEL_A::VREFPNWATT)
155    }
156    #[doc = "Raw differential external Vref from : (ADCn_EXTP-ADCn_EXTN)"]
157    #[inline(always)]
158    pub fn vrefpn(self) -> &'a mut W {
159        self.variant(VREFSEL_A::VREFPN)
160    }
161    #[doc = "Internal Bandgap reference at low setting 0.78V"]
162    #[inline(always)]
163    pub fn vbgrlow(self) -> &'a mut W {
164        self.variant(VREFSEL_A::VBGRLOW)
165    }
166}
167#[doc = "Field `VREFATTFIX` reader - Enable Fixed Scaling on VREF"]
168pub type VREFATTFIX_R = crate::BitReader<bool>;
169#[doc = "Field `VREFATTFIX` writer - Enable Fixed Scaling on VREF"]
170pub type VREFATTFIX_W<'a> = crate::BitWriter<'a, u32, SINGLECTRLX_SPEC, bool, 3>;
171#[doc = "Field `VREFATT` reader - Code for VREF Attenuation Factor When VREFSEL is 1, 2 or 5"]
172pub type VREFATT_R = crate::FieldReader<u8, u8>;
173#[doc = "Field `VREFATT` writer - Code for VREF Attenuation Factor When VREFSEL is 1, 2 or 5"]
174pub type VREFATT_W<'a> = crate::FieldWriter<'a, u32, SINGLECTRLX_SPEC, u8, u8, 4, 4>;
175#[doc = "Field `VINATT` reader - Code for VIN Attenuation Factor"]
176pub type VINATT_R = crate::FieldReader<u8, u8>;
177#[doc = "Field `VINATT` writer - Code for VIN Attenuation Factor"]
178pub type VINATT_W<'a> = crate::FieldWriter<'a, u32, SINGLECTRLX_SPEC, u8, u8, 4, 8>;
179#[doc = "Field `DVL` reader - Single Channel DV Level Select"]
180pub type DVL_R = crate::FieldReader<u8, u8>;
181#[doc = "Field `DVL` writer - Single Channel DV Level Select"]
182pub type DVL_W<'a> = crate::FieldWriter<'a, u32, SINGLECTRLX_SPEC, u8, u8, 2, 12>;
183#[doc = "Field `FIFOOFACT` reader - Single Channel FIFO Overflow Action"]
184pub type FIFOOFACT_R = crate::BitReader<bool>;
185#[doc = "Field `FIFOOFACT` writer - Single Channel FIFO Overflow Action"]
186pub type FIFOOFACT_W<'a> = crate::BitWriter<'a, u32, SINGLECTRLX_SPEC, bool, 14>;
187#[doc = "Field `PRSMODE` reader - Single Channel PRS Trigger Mode"]
188pub type PRSMODE_R = crate::BitReader<bool>;
189#[doc = "Field `PRSMODE` writer - Single Channel PRS Trigger Mode"]
190pub type PRSMODE_W<'a> = crate::BitWriter<'a, u32, SINGLECTRLX_SPEC, bool, 16>;
191#[doc = "Single Channel PRS Trigger Select\n\nValue on reset: 0"]
192#[derive(Clone, Copy, Debug, PartialEq)]
193#[repr(u8)]
194pub enum PRSSEL_A {
195    #[doc = "0: PRS ch 0 triggers single channel"]
196    PRSCH0 = 0,
197    #[doc = "1: PRS ch 1 triggers single channel"]
198    PRSCH1 = 1,
199    #[doc = "2: PRS ch 2 triggers single channel"]
200    PRSCH2 = 2,
201    #[doc = "3: PRS ch 3 triggers single channel"]
202    PRSCH3 = 3,
203    #[doc = "4: PRS ch 4 triggers single channel"]
204    PRSCH4 = 4,
205    #[doc = "5: PRS ch 5 triggers single channel"]
206    PRSCH5 = 5,
207    #[doc = "6: PRS ch 6 triggers single channel"]
208    PRSCH6 = 6,
209    #[doc = "7: PRS ch 7 triggers single channel"]
210    PRSCH7 = 7,
211    #[doc = "8: PRS ch 8 triggers single channel"]
212    PRSCH8 = 8,
213    #[doc = "9: PRS ch 9 triggers single channel"]
214    PRSCH9 = 9,
215    #[doc = "10: PRS ch 10 triggers single channel"]
216    PRSCH10 = 10,
217    #[doc = "11: PRS ch 11 triggers single channel"]
218    PRSCH11 = 11,
219}
220impl From<PRSSEL_A> for u8 {
221    #[inline(always)]
222    fn from(variant: PRSSEL_A) -> Self {
223        variant as _
224    }
225}
226#[doc = "Field `PRSSEL` reader - Single Channel PRS Trigger Select"]
227pub type PRSSEL_R = crate::FieldReader<u8, PRSSEL_A>;
228impl PRSSEL_R {
229    #[doc = "Get enumerated values variant"]
230    #[inline(always)]
231    pub fn variant(&self) -> Option<PRSSEL_A> {
232        match self.bits {
233            0 => Some(PRSSEL_A::PRSCH0),
234            1 => Some(PRSSEL_A::PRSCH1),
235            2 => Some(PRSSEL_A::PRSCH2),
236            3 => Some(PRSSEL_A::PRSCH3),
237            4 => Some(PRSSEL_A::PRSCH4),
238            5 => Some(PRSSEL_A::PRSCH5),
239            6 => Some(PRSSEL_A::PRSCH6),
240            7 => Some(PRSSEL_A::PRSCH7),
241            8 => Some(PRSSEL_A::PRSCH8),
242            9 => Some(PRSSEL_A::PRSCH9),
243            10 => Some(PRSSEL_A::PRSCH10),
244            11 => Some(PRSSEL_A::PRSCH11),
245            _ => None,
246        }
247    }
248    #[doc = "Checks if the value of the field is `PRSCH0`"]
249    #[inline(always)]
250    pub fn is_prsch0(&self) -> bool {
251        *self == PRSSEL_A::PRSCH0
252    }
253    #[doc = "Checks if the value of the field is `PRSCH1`"]
254    #[inline(always)]
255    pub fn is_prsch1(&self) -> bool {
256        *self == PRSSEL_A::PRSCH1
257    }
258    #[doc = "Checks if the value of the field is `PRSCH2`"]
259    #[inline(always)]
260    pub fn is_prsch2(&self) -> bool {
261        *self == PRSSEL_A::PRSCH2
262    }
263    #[doc = "Checks if the value of the field is `PRSCH3`"]
264    #[inline(always)]
265    pub fn is_prsch3(&self) -> bool {
266        *self == PRSSEL_A::PRSCH3
267    }
268    #[doc = "Checks if the value of the field is `PRSCH4`"]
269    #[inline(always)]
270    pub fn is_prsch4(&self) -> bool {
271        *self == PRSSEL_A::PRSCH4
272    }
273    #[doc = "Checks if the value of the field is `PRSCH5`"]
274    #[inline(always)]
275    pub fn is_prsch5(&self) -> bool {
276        *self == PRSSEL_A::PRSCH5
277    }
278    #[doc = "Checks if the value of the field is `PRSCH6`"]
279    #[inline(always)]
280    pub fn is_prsch6(&self) -> bool {
281        *self == PRSSEL_A::PRSCH6
282    }
283    #[doc = "Checks if the value of the field is `PRSCH7`"]
284    #[inline(always)]
285    pub fn is_prsch7(&self) -> bool {
286        *self == PRSSEL_A::PRSCH7
287    }
288    #[doc = "Checks if the value of the field is `PRSCH8`"]
289    #[inline(always)]
290    pub fn is_prsch8(&self) -> bool {
291        *self == PRSSEL_A::PRSCH8
292    }
293    #[doc = "Checks if the value of the field is `PRSCH9`"]
294    #[inline(always)]
295    pub fn is_prsch9(&self) -> bool {
296        *self == PRSSEL_A::PRSCH9
297    }
298    #[doc = "Checks if the value of the field is `PRSCH10`"]
299    #[inline(always)]
300    pub fn is_prsch10(&self) -> bool {
301        *self == PRSSEL_A::PRSCH10
302    }
303    #[doc = "Checks if the value of the field is `PRSCH11`"]
304    #[inline(always)]
305    pub fn is_prsch11(&self) -> bool {
306        *self == PRSSEL_A::PRSCH11
307    }
308}
309#[doc = "Field `PRSSEL` writer - Single Channel PRS Trigger Select"]
310pub type PRSSEL_W<'a> = crate::FieldWriter<'a, u32, SINGLECTRLX_SPEC, u8, PRSSEL_A, 4, 17>;
311impl<'a> PRSSEL_W<'a> {
312    #[doc = "PRS ch 0 triggers single channel"]
313    #[inline(always)]
314    pub fn prsch0(self) -> &'a mut W {
315        self.variant(PRSSEL_A::PRSCH0)
316    }
317    #[doc = "PRS ch 1 triggers single channel"]
318    #[inline(always)]
319    pub fn prsch1(self) -> &'a mut W {
320        self.variant(PRSSEL_A::PRSCH1)
321    }
322    #[doc = "PRS ch 2 triggers single channel"]
323    #[inline(always)]
324    pub fn prsch2(self) -> &'a mut W {
325        self.variant(PRSSEL_A::PRSCH2)
326    }
327    #[doc = "PRS ch 3 triggers single channel"]
328    #[inline(always)]
329    pub fn prsch3(self) -> &'a mut W {
330        self.variant(PRSSEL_A::PRSCH3)
331    }
332    #[doc = "PRS ch 4 triggers single channel"]
333    #[inline(always)]
334    pub fn prsch4(self) -> &'a mut W {
335        self.variant(PRSSEL_A::PRSCH4)
336    }
337    #[doc = "PRS ch 5 triggers single channel"]
338    #[inline(always)]
339    pub fn prsch5(self) -> &'a mut W {
340        self.variant(PRSSEL_A::PRSCH5)
341    }
342    #[doc = "PRS ch 6 triggers single channel"]
343    #[inline(always)]
344    pub fn prsch6(self) -> &'a mut W {
345        self.variant(PRSSEL_A::PRSCH6)
346    }
347    #[doc = "PRS ch 7 triggers single channel"]
348    #[inline(always)]
349    pub fn prsch7(self) -> &'a mut W {
350        self.variant(PRSSEL_A::PRSCH7)
351    }
352    #[doc = "PRS ch 8 triggers single channel"]
353    #[inline(always)]
354    pub fn prsch8(self) -> &'a mut W {
355        self.variant(PRSSEL_A::PRSCH8)
356    }
357    #[doc = "PRS ch 9 triggers single channel"]
358    #[inline(always)]
359    pub fn prsch9(self) -> &'a mut W {
360        self.variant(PRSSEL_A::PRSCH9)
361    }
362    #[doc = "PRS ch 10 triggers single channel"]
363    #[inline(always)]
364    pub fn prsch10(self) -> &'a mut W {
365        self.variant(PRSSEL_A::PRSCH10)
366    }
367    #[doc = "PRS ch 11 triggers single channel"]
368    #[inline(always)]
369    pub fn prsch11(self) -> &'a mut W {
370        self.variant(PRSSEL_A::PRSCH11)
371    }
372}
373#[doc = "Field `CONVSTARTDELAY` reader - Delay Value for Next Conversion Start If CONVSTARTDELAYEN is Set"]
374pub type CONVSTARTDELAY_R = crate::FieldReader<u8, u8>;
375#[doc = "Field `CONVSTARTDELAY` writer - Delay Value for Next Conversion Start If CONVSTARTDELAYEN is Set"]
376pub type CONVSTARTDELAY_W<'a> = crate::FieldWriter<'a, u32, SINGLECTRLX_SPEC, u8, u8, 5, 22>;
377#[doc = "Field `CONVSTARTDELAYEN` reader - Enable Delaying Next Conversion Start"]
378pub type CONVSTARTDELAYEN_R = crate::BitReader<bool>;
379#[doc = "Field `CONVSTARTDELAYEN` writer - Enable Delaying Next Conversion Start"]
380pub type CONVSTARTDELAYEN_W<'a> = crate::BitWriter<'a, u32, SINGLECTRLX_SPEC, bool, 27>;
381#[doc = "REPDELAY Select for SINGLE REP Mode\n\nValue on reset: 0"]
382#[derive(Clone, Copy, Debug, PartialEq)]
383#[repr(u8)]
384pub enum REPDELAY_A {
385    #[doc = "0: No delay"]
386    NODELAY = 0,
387    #[doc = "1: 4 conversion clock cycles"]
388    _4CYCLES = 1,
389    #[doc = "2: 8 conversion clock cycles"]
390    _8CYCLES = 2,
391    #[doc = "3: 16 conversion clock cycles"]
392    _16CYCLES = 3,
393    #[doc = "4: 32 conversion clock cycles"]
394    _32CYCLES = 4,
395    #[doc = "5: 64 conversion clock cycles"]
396    _64CYCLES = 5,
397    #[doc = "6: 128 conversion clock cycles"]
398    _128CYCLES = 6,
399    #[doc = "7: 256 conversion clock cycles"]
400    _256CYCLES = 7,
401}
402impl From<REPDELAY_A> for u8 {
403    #[inline(always)]
404    fn from(variant: REPDELAY_A) -> Self {
405        variant as _
406    }
407}
408#[doc = "Field `REPDELAY` reader - REPDELAY Select for SINGLE REP Mode"]
409pub type REPDELAY_R = crate::FieldReader<u8, REPDELAY_A>;
410impl REPDELAY_R {
411    #[doc = "Get enumerated values variant"]
412    #[inline(always)]
413    pub fn variant(&self) -> REPDELAY_A {
414        match self.bits {
415            0 => REPDELAY_A::NODELAY,
416            1 => REPDELAY_A::_4CYCLES,
417            2 => REPDELAY_A::_8CYCLES,
418            3 => REPDELAY_A::_16CYCLES,
419            4 => REPDELAY_A::_32CYCLES,
420            5 => REPDELAY_A::_64CYCLES,
421            6 => REPDELAY_A::_128CYCLES,
422            7 => REPDELAY_A::_256CYCLES,
423            _ => unreachable!(),
424        }
425    }
426    #[doc = "Checks if the value of the field is `NODELAY`"]
427    #[inline(always)]
428    pub fn is_nodelay(&self) -> bool {
429        *self == REPDELAY_A::NODELAY
430    }
431    #[doc = "Checks if the value of the field is `_4CYCLES`"]
432    #[inline(always)]
433    pub fn is_4cycles(&self) -> bool {
434        *self == REPDELAY_A::_4CYCLES
435    }
436    #[doc = "Checks if the value of the field is `_8CYCLES`"]
437    #[inline(always)]
438    pub fn is_8cycles(&self) -> bool {
439        *self == REPDELAY_A::_8CYCLES
440    }
441    #[doc = "Checks if the value of the field is `_16CYCLES`"]
442    #[inline(always)]
443    pub fn is_16cycles(&self) -> bool {
444        *self == REPDELAY_A::_16CYCLES
445    }
446    #[doc = "Checks if the value of the field is `_32CYCLES`"]
447    #[inline(always)]
448    pub fn is_32cycles(&self) -> bool {
449        *self == REPDELAY_A::_32CYCLES
450    }
451    #[doc = "Checks if the value of the field is `_64CYCLES`"]
452    #[inline(always)]
453    pub fn is_64cycles(&self) -> bool {
454        *self == REPDELAY_A::_64CYCLES
455    }
456    #[doc = "Checks if the value of the field is `_128CYCLES`"]
457    #[inline(always)]
458    pub fn is_128cycles(&self) -> bool {
459        *self == REPDELAY_A::_128CYCLES
460    }
461    #[doc = "Checks if the value of the field is `_256CYCLES`"]
462    #[inline(always)]
463    pub fn is_256cycles(&self) -> bool {
464        *self == REPDELAY_A::_256CYCLES
465    }
466}
467#[doc = "Field `REPDELAY` writer - REPDELAY Select for SINGLE REP Mode"]
468pub type REPDELAY_W<'a> = crate::FieldWriterSafe<'a, u32, SINGLECTRLX_SPEC, u8, REPDELAY_A, 3, 29>;
469impl<'a> REPDELAY_W<'a> {
470    #[doc = "No delay"]
471    #[inline(always)]
472    pub fn nodelay(self) -> &'a mut W {
473        self.variant(REPDELAY_A::NODELAY)
474    }
475    #[doc = "4 conversion clock cycles"]
476    #[inline(always)]
477    pub fn _4cycles(self) -> &'a mut W {
478        self.variant(REPDELAY_A::_4CYCLES)
479    }
480    #[doc = "8 conversion clock cycles"]
481    #[inline(always)]
482    pub fn _8cycles(self) -> &'a mut W {
483        self.variant(REPDELAY_A::_8CYCLES)
484    }
485    #[doc = "16 conversion clock cycles"]
486    #[inline(always)]
487    pub fn _16cycles(self) -> &'a mut W {
488        self.variant(REPDELAY_A::_16CYCLES)
489    }
490    #[doc = "32 conversion clock cycles"]
491    #[inline(always)]
492    pub fn _32cycles(self) -> &'a mut W {
493        self.variant(REPDELAY_A::_32CYCLES)
494    }
495    #[doc = "64 conversion clock cycles"]
496    #[inline(always)]
497    pub fn _64cycles(self) -> &'a mut W {
498        self.variant(REPDELAY_A::_64CYCLES)
499    }
500    #[doc = "128 conversion clock cycles"]
501    #[inline(always)]
502    pub fn _128cycles(self) -> &'a mut W {
503        self.variant(REPDELAY_A::_128CYCLES)
504    }
505    #[doc = "256 conversion clock cycles"]
506    #[inline(always)]
507    pub fn _256cycles(self) -> &'a mut W {
508        self.variant(REPDELAY_A::_256CYCLES)
509    }
510}
511impl R {
512    #[doc = "Bits 0:2 - Single Channel Reference Selection"]
513    #[inline(always)]
514    pub fn vrefsel(&self) -> VREFSEL_R {
515        VREFSEL_R::new((self.bits & 7) as u8)
516    }
517    #[doc = "Bit 3 - Enable Fixed Scaling on VREF"]
518    #[inline(always)]
519    pub fn vrefattfix(&self) -> VREFATTFIX_R {
520        VREFATTFIX_R::new(((self.bits >> 3) & 1) != 0)
521    }
522    #[doc = "Bits 4:7 - Code for VREF Attenuation Factor When VREFSEL is 1, 2 or 5"]
523    #[inline(always)]
524    pub fn vrefatt(&self) -> VREFATT_R {
525        VREFATT_R::new(((self.bits >> 4) & 0x0f) as u8)
526    }
527    #[doc = "Bits 8:11 - Code for VIN Attenuation Factor"]
528    #[inline(always)]
529    pub fn vinatt(&self) -> VINATT_R {
530        VINATT_R::new(((self.bits >> 8) & 0x0f) as u8)
531    }
532    #[doc = "Bits 12:13 - Single Channel DV Level Select"]
533    #[inline(always)]
534    pub fn dvl(&self) -> DVL_R {
535        DVL_R::new(((self.bits >> 12) & 3) as u8)
536    }
537    #[doc = "Bit 14 - Single Channel FIFO Overflow Action"]
538    #[inline(always)]
539    pub fn fifoofact(&self) -> FIFOOFACT_R {
540        FIFOOFACT_R::new(((self.bits >> 14) & 1) != 0)
541    }
542    #[doc = "Bit 16 - Single Channel PRS Trigger Mode"]
543    #[inline(always)]
544    pub fn prsmode(&self) -> PRSMODE_R {
545        PRSMODE_R::new(((self.bits >> 16) & 1) != 0)
546    }
547    #[doc = "Bits 17:20 - Single Channel PRS Trigger Select"]
548    #[inline(always)]
549    pub fn prssel(&self) -> PRSSEL_R {
550        PRSSEL_R::new(((self.bits >> 17) & 0x0f) as u8)
551    }
552    #[doc = "Bits 22:26 - Delay Value for Next Conversion Start If CONVSTARTDELAYEN is Set"]
553    #[inline(always)]
554    pub fn convstartdelay(&self) -> CONVSTARTDELAY_R {
555        CONVSTARTDELAY_R::new(((self.bits >> 22) & 0x1f) as u8)
556    }
557    #[doc = "Bit 27 - Enable Delaying Next Conversion Start"]
558    #[inline(always)]
559    pub fn convstartdelayen(&self) -> CONVSTARTDELAYEN_R {
560        CONVSTARTDELAYEN_R::new(((self.bits >> 27) & 1) != 0)
561    }
562    #[doc = "Bits 29:31 - REPDELAY Select for SINGLE REP Mode"]
563    #[inline(always)]
564    pub fn repdelay(&self) -> REPDELAY_R {
565        REPDELAY_R::new(((self.bits >> 29) & 7) as u8)
566    }
567}
568impl W {
569    #[doc = "Bits 0:2 - Single Channel Reference Selection"]
570    #[inline(always)]
571    pub fn vrefsel(&mut self) -> VREFSEL_W {
572        VREFSEL_W::new(self)
573    }
574    #[doc = "Bit 3 - Enable Fixed Scaling on VREF"]
575    #[inline(always)]
576    pub fn vrefattfix(&mut self) -> VREFATTFIX_W {
577        VREFATTFIX_W::new(self)
578    }
579    #[doc = "Bits 4:7 - Code for VREF Attenuation Factor When VREFSEL is 1, 2 or 5"]
580    #[inline(always)]
581    pub fn vrefatt(&mut self) -> VREFATT_W {
582        VREFATT_W::new(self)
583    }
584    #[doc = "Bits 8:11 - Code for VIN Attenuation Factor"]
585    #[inline(always)]
586    pub fn vinatt(&mut self) -> VINATT_W {
587        VINATT_W::new(self)
588    }
589    #[doc = "Bits 12:13 - Single Channel DV Level Select"]
590    #[inline(always)]
591    pub fn dvl(&mut self) -> DVL_W {
592        DVL_W::new(self)
593    }
594    #[doc = "Bit 14 - Single Channel FIFO Overflow Action"]
595    #[inline(always)]
596    pub fn fifoofact(&mut self) -> FIFOOFACT_W {
597        FIFOOFACT_W::new(self)
598    }
599    #[doc = "Bit 16 - Single Channel PRS Trigger Mode"]
600    #[inline(always)]
601    pub fn prsmode(&mut self) -> PRSMODE_W {
602        PRSMODE_W::new(self)
603    }
604    #[doc = "Bits 17:20 - Single Channel PRS Trigger Select"]
605    #[inline(always)]
606    pub fn prssel(&mut self) -> PRSSEL_W {
607        PRSSEL_W::new(self)
608    }
609    #[doc = "Bits 22:26 - Delay Value for Next Conversion Start If CONVSTARTDELAYEN is Set"]
610    #[inline(always)]
611    pub fn convstartdelay(&mut self) -> CONVSTARTDELAY_W {
612        CONVSTARTDELAY_W::new(self)
613    }
614    #[doc = "Bit 27 - Enable Delaying Next Conversion Start"]
615    #[inline(always)]
616    pub fn convstartdelayen(&mut self) -> CONVSTARTDELAYEN_W {
617        CONVSTARTDELAYEN_W::new(self)
618    }
619    #[doc = "Bits 29:31 - REPDELAY Select for SINGLE REP Mode"]
620    #[inline(always)]
621    pub fn repdelay(&mut self) -> REPDELAY_W {
622        REPDELAY_W::new(self)
623    }
624    #[doc = "Writes raw bits to the register."]
625    #[inline(always)]
626    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
627        self.0.bits(bits);
628        self
629    }
630}
631#[doc = "Single Channel Control Register Continued\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [singlectrlx](index.html) module"]
632pub struct SINGLECTRLX_SPEC;
633impl crate::RegisterSpec for SINGLECTRLX_SPEC {
634    type Ux = u32;
635}
636#[doc = "`read()` method returns [singlectrlx::R](R) reader structure"]
637impl crate::Readable for SINGLECTRLX_SPEC {
638    type Reader = R;
639}
640#[doc = "`write(|w| ..)` method takes [singlectrlx::W](W) writer structure"]
641impl crate::Writable for SINGLECTRLX_SPEC {
642    type Writer = W;
643}
644#[doc = "`reset()` method sets SINGLECTRLX to value 0"]
645impl crate::Resettable for SINGLECTRLX_SPEC {
646    #[inline(always)]
647    fn reset_value() -> Self::Ux {
648        0
649    }
650}
efm32pg12b500_pac/adc0/singlectrlx.rs

efm32pg12b500_pac/adc0/
singlectrlx.rs
