efm32pg12b500_pac/vdac0/
ifs.rs

1#[doc = "Register `IFS` writer"]
2pub struct W(crate::W<IFS_SPEC>);
3impl core::ops::Deref for W {
4    type Target = crate::W<IFS_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl core::ops::DerefMut for W {
11    #[inline(always)]
12    fn deref_mut(&mut self) -> &mut Self::Target {
13        &mut self.0
14    }
15}
16impl From<crate::W<IFS_SPEC>> for W {
17    #[inline(always)]
18    fn from(writer: crate::W<IFS_SPEC>) -> Self {
19        W(writer)
20    }
21}
22#[doc = "Field `CH0CD` writer - Set CH0CD Interrupt Flag"]
23pub type CH0CD_W<'a> = crate::BitWriter<'a, u32, IFS_SPEC, bool, 0>;
24#[doc = "Field `CH1CD` writer - Set CH1CD Interrupt Flag"]
25pub type CH1CD_W<'a> = crate::BitWriter<'a, u32, IFS_SPEC, bool, 1>;
26#[doc = "Field `CH0OF` writer - Set CH0OF Interrupt Flag"]
27pub type CH0OF_W<'a> = crate::BitWriter<'a, u32, IFS_SPEC, bool, 2>;
28#[doc = "Field `CH1OF` writer - Set CH1OF Interrupt Flag"]
29pub type CH1OF_W<'a> = crate::BitWriter<'a, u32, IFS_SPEC, bool, 3>;
30#[doc = "Field `CH0UF` writer - Set CH0UF Interrupt Flag"]
31pub type CH0UF_W<'a> = crate::BitWriter<'a, u32, IFS_SPEC, bool, 4>;
32#[doc = "Field `CH1UF` writer - Set CH1UF Interrupt Flag"]
33pub type CH1UF_W<'a> = crate::BitWriter<'a, u32, IFS_SPEC, bool, 5>;
34#[doc = "Field `EM23ERR` writer - Set EM23ERR Interrupt Flag"]
35pub type EM23ERR_W<'a> = crate::BitWriter<'a, u32, IFS_SPEC, bool, 15>;
36#[doc = "Field `OPA0APORTCONFLICT` writer - Set OPA0APORTCONFLICT Interrupt Flag"]
37pub type OPA0APORTCONFLICT_W<'a> = crate::BitWriter<'a, u32, IFS_SPEC, bool, 16>;
38#[doc = "Field `OPA1APORTCONFLICT` writer - Set OPA1APORTCONFLICT Interrupt Flag"]
39pub type OPA1APORTCONFLICT_W<'a> = crate::BitWriter<'a, u32, IFS_SPEC, bool, 17>;
40#[doc = "Field `OPA2APORTCONFLICT` writer - Set OPA2APORTCONFLICT Interrupt Flag"]
41pub type OPA2APORTCONFLICT_W<'a> = crate::BitWriter<'a, u32, IFS_SPEC, bool, 18>;
42#[doc = "Field `OPA0PRSTIMEDERR` writer - Set OPA0PRSTIMEDERR Interrupt Flag"]
43pub type OPA0PRSTIMEDERR_W<'a> = crate::BitWriter<'a, u32, IFS_SPEC, bool, 20>;
44#[doc = "Field `OPA1PRSTIMEDERR` writer - Set OPA1PRSTIMEDERR Interrupt Flag"]
45pub type OPA1PRSTIMEDERR_W<'a> = crate::BitWriter<'a, u32, IFS_SPEC, bool, 21>;
46#[doc = "Field `OPA2PRSTIMEDERR` writer - Set OPA2PRSTIMEDERR Interrupt Flag"]
47pub type OPA2PRSTIMEDERR_W<'a> = crate::BitWriter<'a, u32, IFS_SPEC, bool, 22>;
48#[doc = "Field `OPA0OUTVALID` writer - Set OPA0OUTVALID Interrupt Flag"]
49pub type OPA0OUTVALID_W<'a> = crate::BitWriter<'a, u32, IFS_SPEC, bool, 28>;
50#[doc = "Field `OPA1OUTVALID` writer - Set OPA1OUTVALID Interrupt Flag"]
51pub type OPA1OUTVALID_W<'a> = crate::BitWriter<'a, u32, IFS_SPEC, bool, 29>;
52#[doc = "Field `OPA2OUTVALID` writer - Set OPA2OUTVALID Interrupt Flag"]
53pub type OPA2OUTVALID_W<'a> = crate::BitWriter<'a, u32, IFS_SPEC, bool, 30>;
54impl W {
55    #[doc = "Bit 0 - Set CH0CD Interrupt Flag"]
56    #[inline(always)]
57    pub fn ch0cd(&mut self) -> CH0CD_W {
58        CH0CD_W::new(self)
59    }
60    #[doc = "Bit 1 - Set CH1CD Interrupt Flag"]
61    #[inline(always)]
62    pub fn ch1cd(&mut self) -> CH1CD_W {
63        CH1CD_W::new(self)
64    }
65    #[doc = "Bit 2 - Set CH0OF Interrupt Flag"]
66    #[inline(always)]
67    pub fn ch0of(&mut self) -> CH0OF_W {
68        CH0OF_W::new(self)
69    }
70    #[doc = "Bit 3 - Set CH1OF Interrupt Flag"]
71    #[inline(always)]
72    pub fn ch1of(&mut self) -> CH1OF_W {
73        CH1OF_W::new(self)
74    }
75    #[doc = "Bit 4 - Set CH0UF Interrupt Flag"]
76    #[inline(always)]
77    pub fn ch0uf(&mut self) -> CH0UF_W {
78        CH0UF_W::new(self)
79    }
80    #[doc = "Bit 5 - Set CH1UF Interrupt Flag"]
81    #[inline(always)]
82    pub fn ch1uf(&mut self) -> CH1UF_W {
83        CH1UF_W::new(self)
84    }
85    #[doc = "Bit 15 - Set EM23ERR Interrupt Flag"]
86    #[inline(always)]
87    pub fn em23err(&mut self) -> EM23ERR_W {
88        EM23ERR_W::new(self)
89    }
90    #[doc = "Bit 16 - Set OPA0APORTCONFLICT Interrupt Flag"]
91    #[inline(always)]
92    pub fn opa0aportconflict(&mut self) -> OPA0APORTCONFLICT_W {
93        OPA0APORTCONFLICT_W::new(self)
94    }
95    #[doc = "Bit 17 - Set OPA1APORTCONFLICT Interrupt Flag"]
96    #[inline(always)]
97    pub fn opa1aportconflict(&mut self) -> OPA1APORTCONFLICT_W {
98        OPA1APORTCONFLICT_W::new(self)
99    }
100    #[doc = "Bit 18 - Set OPA2APORTCONFLICT Interrupt Flag"]
101    #[inline(always)]
102    pub fn opa2aportconflict(&mut self) -> OPA2APORTCONFLICT_W {
103        OPA2APORTCONFLICT_W::new(self)
104    }
105    #[doc = "Bit 20 - Set OPA0PRSTIMEDERR Interrupt Flag"]
106    #[inline(always)]
107    pub fn opa0prstimederr(&mut self) -> OPA0PRSTIMEDERR_W {
108        OPA0PRSTIMEDERR_W::new(self)
109    }
110    #[doc = "Bit 21 - Set OPA1PRSTIMEDERR Interrupt Flag"]
111    #[inline(always)]
112    pub fn opa1prstimederr(&mut self) -> OPA1PRSTIMEDERR_W {
113        OPA1PRSTIMEDERR_W::new(self)
114    }
115    #[doc = "Bit 22 - Set OPA2PRSTIMEDERR Interrupt Flag"]
116    #[inline(always)]
117    pub fn opa2prstimederr(&mut self) -> OPA2PRSTIMEDERR_W {
118        OPA2PRSTIMEDERR_W::new(self)
119    }
120    #[doc = "Bit 28 - Set OPA0OUTVALID Interrupt Flag"]
121    #[inline(always)]
122    pub fn opa0outvalid(&mut self) -> OPA0OUTVALID_W {
123        OPA0OUTVALID_W::new(self)
124    }
125    #[doc = "Bit 29 - Set OPA1OUTVALID Interrupt Flag"]
126    #[inline(always)]
127    pub fn opa1outvalid(&mut self) -> OPA1OUTVALID_W {
128        OPA1OUTVALID_W::new(self)
129    }
130    #[doc = "Bit 30 - Set OPA2OUTVALID Interrupt Flag"]
131    #[inline(always)]
132    pub fn opa2outvalid(&mut self) -> OPA2OUTVALID_W {
133        OPA2OUTVALID_W::new(self)
134    }
135    #[doc = "Writes raw bits to the register."]
136    #[inline(always)]
137    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
138        self.0.bits(bits);
139        self
140    }
141}
142#[doc = "Interrupt Flag Set Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ifs](index.html) module"]
143pub struct IFS_SPEC;
144impl crate::RegisterSpec for IFS_SPEC {
145    type Ux = u32;
146}
147#[doc = "`write(|w| ..)` method takes [ifs::W](W) writer structure"]
148impl crate::Writable for IFS_SPEC {
149    type Writer = W;
150}
151#[doc = "`reset()` method sets IFS to value 0"]
152impl crate::Resettable for IFS_SPEC {
153    #[inline(always)]
154    fn reset_value() -> Self::Ux {
155        0
156    }
157}
efm32pg12b500_pac/vdac0/ifs.rs

efm32pg12b500_pac/vdac0/
ifs.rs
