efm32pg12b500_pac/adc0/
scanctrlx.rs

1#[doc = "Register `SCANCTRLX` reader"]
2pub struct R(crate::R<SCANCTRLX_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<SCANCTRLX_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<SCANCTRLX_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<SCANCTRLX_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `SCANCTRLX` writer"]
17pub struct W(crate::W<SCANCTRLX_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<SCANCTRLX_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<SCANCTRLX_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<SCANCTRLX_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Scan Channel Reference Selection\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39#[repr(u8)]
40pub enum VREFSEL_A {
41    #[doc = "0: Internal 0.83V Bandgap reference"]
42    VBGR = 0,
43    #[doc = "1: Scaled AVDD: AVDD*(the VREF attenuation factor)"]
44    VDDXWATT = 1,
45    #[doc = "2: Scaled singled ended external Vref: ADCn_EXTP*(the VREF attenuation factor)"]
46    VREFPWATT = 2,
47    #[doc = "3: Raw single ended external Vref: ADCn_EXTP"]
48    VREFP = 3,
49    #[doc = "5: Scaled differential external Vref from : (ADCn_EXTP-ADCn_EXTN)*(the VREF attenuation factor)"]
50    VREFPNWATT = 5,
51    #[doc = "6: Raw differential external Vref from : (ADCn_EXTP-ADCn_EXTN)"]
52    VREFPN = 6,
53    #[doc = "7: Internal Bandgap reference at low setting 0.78V"]
54    VBGRLOW = 7,
55}
56impl From<VREFSEL_A> for u8 {
57    #[inline(always)]
58    fn from(variant: VREFSEL_A) -> Self {
59        variant as _
60    }
61}
62#[doc = "Field `VREFSEL` reader - Scan Channel Reference Selection"]
63pub type VREFSEL_R = crate::FieldReader<u8, VREFSEL_A>;
64impl VREFSEL_R {
65    #[doc = "Get enumerated values variant"]
66    #[inline(always)]
67    pub fn variant(&self) -> Option<VREFSEL_A> {
68        match self.bits {
69            0 => Some(VREFSEL_A::VBGR),
70            1 => Some(VREFSEL_A::VDDXWATT),
71            2 => Some(VREFSEL_A::VREFPWATT),
72            3 => Some(VREFSEL_A::VREFP),
73            5 => Some(VREFSEL_A::VREFPNWATT),
74            6 => Some(VREFSEL_A::VREFPN),
75            7 => Some(VREFSEL_A::VBGRLOW),
76            _ => None,
77        }
78    }
79    #[doc = "Checks if the value of the field is `VBGR`"]
80    #[inline(always)]
81    pub fn is_vbgr(&self) -> bool {
82        *self == VREFSEL_A::VBGR
83    }
84    #[doc = "Checks if the value of the field is `VDDXWATT`"]
85    #[inline(always)]
86    pub fn is_vddxwatt(&self) -> bool {
87        *self == VREFSEL_A::VDDXWATT
88    }
89    #[doc = "Checks if the value of the field is `VREFPWATT`"]
90    #[inline(always)]
91    pub fn is_vrefpwatt(&self) -> bool {
92        *self == VREFSEL_A::VREFPWATT
93    }
94    #[doc = "Checks if the value of the field is `VREFP`"]
95    #[inline(always)]
96    pub fn is_vrefp(&self) -> bool {
97        *self == VREFSEL_A::VREFP
98    }
99    #[doc = "Checks if the value of the field is `VREFPNWATT`"]
100    #[inline(always)]
101    pub fn is_vrefpnwatt(&self) -> bool {
102        *self == VREFSEL_A::VREFPNWATT
103    }
104    #[doc = "Checks if the value of the field is `VREFPN`"]
105    #[inline(always)]
106    pub fn is_vrefpn(&self) -> bool {
107        *self == VREFSEL_A::VREFPN
108    }
109    #[doc = "Checks if the value of the field is `VBGRLOW`"]
110    #[inline(always)]
111    pub fn is_vbgrlow(&self) -> bool {
112        *self == VREFSEL_A::VBGRLOW
113    }
114}
115#[doc = "Field `VREFSEL` writer - Scan Channel Reference Selection"]
116pub type VREFSEL_W<'a> = crate::FieldWriter<'a, u32, SCANCTRLX_SPEC, u8, VREFSEL_A, 3, 0>;
117impl<'a> VREFSEL_W<'a> {
118    #[doc = "Internal 0.83V Bandgap reference"]
119    #[inline(always)]
120    pub fn vbgr(self) -> &'a mut W {
121        self.variant(VREFSEL_A::VBGR)
122    }
123    #[doc = "Scaled AVDD: AVDD*(the VREF attenuation factor)"]
124    #[inline(always)]
125    pub fn vddxwatt(self) -> &'a mut W {
126        self.variant(VREFSEL_A::VDDXWATT)
127    }
128    #[doc = "Scaled singled ended external Vref: ADCn_EXTP*(the VREF attenuation factor)"]
129    #[inline(always)]
130    pub fn vrefpwatt(self) -> &'a mut W {
131        self.variant(VREFSEL_A::VREFPWATT)
132    }
133    #[doc = "Raw single ended external Vref: ADCn_EXTP"]
134    #[inline(always)]
135    pub fn vrefp(self) -> &'a mut W {
136        self.variant(VREFSEL_A::VREFP)
137    }
138    #[doc = "Scaled differential external Vref from : (ADCn_EXTP-ADCn_EXTN)*(the VREF attenuation factor)"]
139    #[inline(always)]
140    pub fn vrefpnwatt(self) -> &'a mut W {
141        self.variant(VREFSEL_A::VREFPNWATT)
142    }
143    #[doc = "Raw differential external Vref from : (ADCn_EXTP-ADCn_EXTN)"]
144    #[inline(always)]
145    pub fn vrefpn(self) -> &'a mut W {
146        self.variant(VREFSEL_A::VREFPN)
147    }
148    #[doc = "Internal Bandgap reference at low setting 0.78V"]
149    #[inline(always)]
150    pub fn vbgrlow(self) -> &'a mut W {
151        self.variant(VREFSEL_A::VBGRLOW)
152    }
153}
154#[doc = "Field `VREFATTFIX` reader - Enable Fixed Scaling on VREF"]
155pub type VREFATTFIX_R = crate::BitReader<bool>;
156#[doc = "Field `VREFATTFIX` writer - Enable Fixed Scaling on VREF"]
157pub type VREFATTFIX_W<'a> = crate::BitWriter<'a, u32, SCANCTRLX_SPEC, bool, 3>;
158#[doc = "Field `VREFATT` reader - Code for VREF Attenuation Factor When VREFSEL is 1, 2 or 5"]
159pub type VREFATT_R = crate::FieldReader<u8, u8>;
160#[doc = "Field `VREFATT` writer - Code for VREF Attenuation Factor When VREFSEL is 1, 2 or 5"]
161pub type VREFATT_W<'a> = crate::FieldWriter<'a, u32, SCANCTRLX_SPEC, u8, u8, 4, 4>;
162#[doc = "Field `VINATT` reader - Code for VIN Attenuation Factor"]
163pub type VINATT_R = crate::FieldReader<u8, u8>;
164#[doc = "Field `VINATT` writer - Code for VIN Attenuation Factor"]
165pub type VINATT_W<'a> = crate::FieldWriter<'a, u32, SCANCTRLX_SPEC, u8, u8, 4, 8>;
166#[doc = "Field `DVL` reader - Scan DV Level Select"]
167pub type DVL_R = crate::FieldReader<u8, u8>;
168#[doc = "Field `DVL` writer - Scan DV Level Select"]
169pub type DVL_W<'a> = crate::FieldWriter<'a, u32, SCANCTRLX_SPEC, u8, u8, 2, 12>;
170#[doc = "Field `FIFOOFACT` reader - Scan FIFO Overflow Action"]
171pub type FIFOOFACT_R = crate::BitReader<bool>;
172#[doc = "Field `FIFOOFACT` writer - Scan FIFO Overflow Action"]
173pub type FIFOOFACT_W<'a> = crate::BitWriter<'a, u32, SCANCTRLX_SPEC, bool, 14>;
174#[doc = "Field `PRSMODE` reader - Scan PRS Trigger Mode"]
175pub type PRSMODE_R = crate::BitReader<bool>;
176#[doc = "Field `PRSMODE` writer - Scan PRS Trigger Mode"]
177pub type PRSMODE_W<'a> = crate::BitWriter<'a, u32, SCANCTRLX_SPEC, bool, 16>;
178#[doc = "Scan Sequence PRS Trigger Select\n\nValue on reset: 0"]
179#[derive(Clone, Copy, Debug, PartialEq)]
180#[repr(u8)]
181pub enum PRSSEL_A {
182    #[doc = "0: PRS ch 0 triggers scan sequence"]
183    PRSCH0 = 0,
184    #[doc = "1: PRS ch 1 triggers scan sequence"]
185    PRSCH1 = 1,
186    #[doc = "2: PRS ch 2 triggers scan sequence"]
187    PRSCH2 = 2,
188    #[doc = "3: PRS ch 3 triggers scan sequence"]
189    PRSCH3 = 3,
190    #[doc = "4: PRS ch 4 triggers scan sequence"]
191    PRSCH4 = 4,
192    #[doc = "5: PRS ch 5 triggers scan sequence"]
193    PRSCH5 = 5,
194    #[doc = "6: PRS ch 6 triggers scan sequence"]
195    PRSCH6 = 6,
196    #[doc = "7: PRS ch 7 triggers scan sequence"]
197    PRSCH7 = 7,
198    #[doc = "8: PRS ch 8 triggers scan sequence"]
199    PRSCH8 = 8,
200    #[doc = "9: PRS ch 9 triggers scan sequence"]
201    PRSCH9 = 9,
202    #[doc = "10: PRS ch 10 triggers scan sequence"]
203    PRSCH10 = 10,
204    #[doc = "11: PRS ch 11 triggers scan sequence"]
205    PRSCH11 = 11,
206}
207impl From<PRSSEL_A> for u8 {
208    #[inline(always)]
209    fn from(variant: PRSSEL_A) -> Self {
210        variant as _
211    }
212}
213#[doc = "Field `PRSSEL` reader - Scan Sequence PRS Trigger Select"]
214pub type PRSSEL_R = crate::FieldReader<u8, PRSSEL_A>;
215impl PRSSEL_R {
216    #[doc = "Get enumerated values variant"]
217    #[inline(always)]
218    pub fn variant(&self) -> Option<PRSSEL_A> {
219        match self.bits {
220            0 => Some(PRSSEL_A::PRSCH0),
221            1 => Some(PRSSEL_A::PRSCH1),
222            2 => Some(PRSSEL_A::PRSCH2),
223            3 => Some(PRSSEL_A::PRSCH3),
224            4 => Some(PRSSEL_A::PRSCH4),
225            5 => Some(PRSSEL_A::PRSCH5),
226            6 => Some(PRSSEL_A::PRSCH6),
227            7 => Some(PRSSEL_A::PRSCH7),
228            8 => Some(PRSSEL_A::PRSCH8),
229            9 => Some(PRSSEL_A::PRSCH9),
230            10 => Some(PRSSEL_A::PRSCH10),
231            11 => Some(PRSSEL_A::PRSCH11),
232            _ => None,
233        }
234    }
235    #[doc = "Checks if the value of the field is `PRSCH0`"]
236    #[inline(always)]
237    pub fn is_prsch0(&self) -> bool {
238        *self == PRSSEL_A::PRSCH0
239    }
240    #[doc = "Checks if the value of the field is `PRSCH1`"]
241    #[inline(always)]
242    pub fn is_prsch1(&self) -> bool {
243        *self == PRSSEL_A::PRSCH1
244    }
245    #[doc = "Checks if the value of the field is `PRSCH2`"]
246    #[inline(always)]
247    pub fn is_prsch2(&self) -> bool {
248        *self == PRSSEL_A::PRSCH2
249    }
250    #[doc = "Checks if the value of the field is `PRSCH3`"]
251    #[inline(always)]
252    pub fn is_prsch3(&self) -> bool {
253        *self == PRSSEL_A::PRSCH3
254    }
255    #[doc = "Checks if the value of the field is `PRSCH4`"]
256    #[inline(always)]
257    pub fn is_prsch4(&self) -> bool {
258        *self == PRSSEL_A::PRSCH4
259    }
260    #[doc = "Checks if the value of the field is `PRSCH5`"]
261    #[inline(always)]
262    pub fn is_prsch5(&self) -> bool {
263        *self == PRSSEL_A::PRSCH5
264    }
265    #[doc = "Checks if the value of the field is `PRSCH6`"]
266    #[inline(always)]
267    pub fn is_prsch6(&self) -> bool {
268        *self == PRSSEL_A::PRSCH6
269    }
270    #[doc = "Checks if the value of the field is `PRSCH7`"]
271    #[inline(always)]
272    pub fn is_prsch7(&self) -> bool {
273        *self == PRSSEL_A::PRSCH7
274    }
275    #[doc = "Checks if the value of the field is `PRSCH8`"]
276    #[inline(always)]
277    pub fn is_prsch8(&self) -> bool {
278        *self == PRSSEL_A::PRSCH8
279    }
280    #[doc = "Checks if the value of the field is `PRSCH9`"]
281    #[inline(always)]
282    pub fn is_prsch9(&self) -> bool {
283        *self == PRSSEL_A::PRSCH9
284    }
285    #[doc = "Checks if the value of the field is `PRSCH10`"]
286    #[inline(always)]
287    pub fn is_prsch10(&self) -> bool {
288        *self == PRSSEL_A::PRSCH10
289    }
290    #[doc = "Checks if the value of the field is `PRSCH11`"]
291    #[inline(always)]
292    pub fn is_prsch11(&self) -> bool {
293        *self == PRSSEL_A::PRSCH11
294    }
295}
296#[doc = "Field `PRSSEL` writer - Scan Sequence PRS Trigger Select"]
297pub type PRSSEL_W<'a> = crate::FieldWriter<'a, u32, SCANCTRLX_SPEC, u8, PRSSEL_A, 4, 17>;
298impl<'a> PRSSEL_W<'a> {
299    #[doc = "PRS ch 0 triggers scan sequence"]
300    #[inline(always)]
301    pub fn prsch0(self) -> &'a mut W {
302        self.variant(PRSSEL_A::PRSCH0)
303    }
304    #[doc = "PRS ch 1 triggers scan sequence"]
305    #[inline(always)]
306    pub fn prsch1(self) -> &'a mut W {
307        self.variant(PRSSEL_A::PRSCH1)
308    }
309    #[doc = "PRS ch 2 triggers scan sequence"]
310    #[inline(always)]
311    pub fn prsch2(self) -> &'a mut W {
312        self.variant(PRSSEL_A::PRSCH2)
313    }
314    #[doc = "PRS ch 3 triggers scan sequence"]
315    #[inline(always)]
316    pub fn prsch3(self) -> &'a mut W {
317        self.variant(PRSSEL_A::PRSCH3)
318    }
319    #[doc = "PRS ch 4 triggers scan sequence"]
320    #[inline(always)]
321    pub fn prsch4(self) -> &'a mut W {
322        self.variant(PRSSEL_A::PRSCH4)
323    }
324    #[doc = "PRS ch 5 triggers scan sequence"]
325    #[inline(always)]
326    pub fn prsch5(self) -> &'a mut W {
327        self.variant(PRSSEL_A::PRSCH5)
328    }
329    #[doc = "PRS ch 6 triggers scan sequence"]
330    #[inline(always)]
331    pub fn prsch6(self) -> &'a mut W {
332        self.variant(PRSSEL_A::PRSCH6)
333    }
334    #[doc = "PRS ch 7 triggers scan sequence"]
335    #[inline(always)]
336    pub fn prsch7(self) -> &'a mut W {
337        self.variant(PRSSEL_A::PRSCH7)
338    }
339    #[doc = "PRS ch 8 triggers scan sequence"]
340    #[inline(always)]
341    pub fn prsch8(self) -> &'a mut W {
342        self.variant(PRSSEL_A::PRSCH8)
343    }
344    #[doc = "PRS ch 9 triggers scan sequence"]
345    #[inline(always)]
346    pub fn prsch9(self) -> &'a mut W {
347        self.variant(PRSSEL_A::PRSCH9)
348    }
349    #[doc = "PRS ch 10 triggers scan sequence"]
350    #[inline(always)]
351    pub fn prsch10(self) -> &'a mut W {
352        self.variant(PRSSEL_A::PRSCH10)
353    }
354    #[doc = "PRS ch 11 triggers scan sequence"]
355    #[inline(always)]
356    pub fn prsch11(self) -> &'a mut W {
357        self.variant(PRSSEL_A::PRSCH11)
358    }
359}
360#[doc = "Field `CONVSTARTDELAY` reader - Delay Next Conversion Start If CONVSTARTDELAYEN is Set"]
361pub type CONVSTARTDELAY_R = crate::FieldReader<u8, u8>;
362#[doc = "Field `CONVSTARTDELAY` writer - Delay Next Conversion Start If CONVSTARTDELAYEN is Set"]
363pub type CONVSTARTDELAY_W<'a> = crate::FieldWriter<'a, u32, SCANCTRLX_SPEC, u8, u8, 5, 22>;
364#[doc = "Field `CONVSTARTDELAYEN` reader - Enable Delaying Next Conversion Start"]
365pub type CONVSTARTDELAYEN_R = crate::BitReader<bool>;
366#[doc = "Field `CONVSTARTDELAYEN` writer - Enable Delaying Next Conversion Start"]
367pub type CONVSTARTDELAYEN_W<'a> = crate::BitWriter<'a, u32, SCANCTRLX_SPEC, bool, 27>;
368#[doc = "REPDELAY Select for SCAN REP Mode\n\nValue on reset: 0"]
369#[derive(Clone, Copy, Debug, PartialEq)]
370#[repr(u8)]
371pub enum REPDELAY_A {
372    #[doc = "0: No delay"]
373    NODELAY = 0,
374    #[doc = "1: 4 conversion clock cycles"]
375    _4CYCLES = 1,
376    #[doc = "2: 8 conversion clock cycles"]
377    _8CYCLES = 2,
378    #[doc = "3: 16 conversion clock cycles"]
379    _16CYCLES = 3,
380    #[doc = "4: 32 conversion clock cycles"]
381    _32CYCLES = 4,
382    #[doc = "5: 64 conversion clock cycles"]
383    _64CYCLES = 5,
384    #[doc = "6: 128 conversion clock cycles"]
385    _128CYCLES = 6,
386    #[doc = "7: 256 conversion clock cycles"]
387    _256CYCLES = 7,
388}
389impl From<REPDELAY_A> for u8 {
390    #[inline(always)]
391    fn from(variant: REPDELAY_A) -> Self {
392        variant as _
393    }
394}
395#[doc = "Field `REPDELAY` reader - REPDELAY Select for SCAN REP Mode"]
396pub type REPDELAY_R = crate::FieldReader<u8, REPDELAY_A>;
397impl REPDELAY_R {
398    #[doc = "Get enumerated values variant"]
399    #[inline(always)]
400    pub fn variant(&self) -> REPDELAY_A {
401        match self.bits {
402            0 => REPDELAY_A::NODELAY,
403            1 => REPDELAY_A::_4CYCLES,
404            2 => REPDELAY_A::_8CYCLES,
405            3 => REPDELAY_A::_16CYCLES,
406            4 => REPDELAY_A::_32CYCLES,
407            5 => REPDELAY_A::_64CYCLES,
408            6 => REPDELAY_A::_128CYCLES,
409            7 => REPDELAY_A::_256CYCLES,
410            _ => unreachable!(),
411        }
412    }
413    #[doc = "Checks if the value of the field is `NODELAY`"]
414    #[inline(always)]
415    pub fn is_nodelay(&self) -> bool {
416        *self == REPDELAY_A::NODELAY
417    }
418    #[doc = "Checks if the value of the field is `_4CYCLES`"]
419    #[inline(always)]
420    pub fn is_4cycles(&self) -> bool {
421        *self == REPDELAY_A::_4CYCLES
422    }
423    #[doc = "Checks if the value of the field is `_8CYCLES`"]
424    #[inline(always)]
425    pub fn is_8cycles(&self) -> bool {
426        *self == REPDELAY_A::_8CYCLES
427    }
428    #[doc = "Checks if the value of the field is `_16CYCLES`"]
429    #[inline(always)]
430    pub fn is_16cycles(&self) -> bool {
431        *self == REPDELAY_A::_16CYCLES
432    }
433    #[doc = "Checks if the value of the field is `_32CYCLES`"]
434    #[inline(always)]
435    pub fn is_32cycles(&self) -> bool {
436        *self == REPDELAY_A::_32CYCLES
437    }
438    #[doc = "Checks if the value of the field is `_64CYCLES`"]
439    #[inline(always)]
440    pub fn is_64cycles(&self) -> bool {
441        *self == REPDELAY_A::_64CYCLES
442    }
443    #[doc = "Checks if the value of the field is `_128CYCLES`"]
444    #[inline(always)]
445    pub fn is_128cycles(&self) -> bool {
446        *self == REPDELAY_A::_128CYCLES
447    }
448    #[doc = "Checks if the value of the field is `_256CYCLES`"]
449    #[inline(always)]
450    pub fn is_256cycles(&self) -> bool {
451        *self == REPDELAY_A::_256CYCLES
452    }
453}
454#[doc = "Field `REPDELAY` writer - REPDELAY Select for SCAN REP Mode"]
455pub type REPDELAY_W<'a> = crate::FieldWriterSafe<'a, u32, SCANCTRLX_SPEC, u8, REPDELAY_A, 3, 29>;
456impl<'a> REPDELAY_W<'a> {
457    #[doc = "No delay"]
458    #[inline(always)]
459    pub fn nodelay(self) -> &'a mut W {
460        self.variant(REPDELAY_A::NODELAY)
461    }
462    #[doc = "4 conversion clock cycles"]
463    #[inline(always)]
464    pub fn _4cycles(self) -> &'a mut W {
465        self.variant(REPDELAY_A::_4CYCLES)
466    }
467    #[doc = "8 conversion clock cycles"]
468    #[inline(always)]
469    pub fn _8cycles(self) -> &'a mut W {
470        self.variant(REPDELAY_A::_8CYCLES)
471    }
472    #[doc = "16 conversion clock cycles"]
473    #[inline(always)]
474    pub fn _16cycles(self) -> &'a mut W {
475        self.variant(REPDELAY_A::_16CYCLES)
476    }
477    #[doc = "32 conversion clock cycles"]
478    #[inline(always)]
479    pub fn _32cycles(self) -> &'a mut W {
480        self.variant(REPDELAY_A::_32CYCLES)
481    }
482    #[doc = "64 conversion clock cycles"]
483    #[inline(always)]
484    pub fn _64cycles(self) -> &'a mut W {
485        self.variant(REPDELAY_A::_64CYCLES)
486    }
487    #[doc = "128 conversion clock cycles"]
488    #[inline(always)]
489    pub fn _128cycles(self) -> &'a mut W {
490        self.variant(REPDELAY_A::_128CYCLES)
491    }
492    #[doc = "256 conversion clock cycles"]
493    #[inline(always)]
494    pub fn _256cycles(self) -> &'a mut W {
495        self.variant(REPDELAY_A::_256CYCLES)
496    }
497}
498impl R {
499    #[doc = "Bits 0:2 - Scan Channel Reference Selection"]
500    #[inline(always)]
501    pub fn vrefsel(&self) -> VREFSEL_R {
502        VREFSEL_R::new((self.bits & 7) as u8)
503    }
504    #[doc = "Bit 3 - Enable Fixed Scaling on VREF"]
505    #[inline(always)]
506    pub fn vrefattfix(&self) -> VREFATTFIX_R {
507        VREFATTFIX_R::new(((self.bits >> 3) & 1) != 0)
508    }
509    #[doc = "Bits 4:7 - Code for VREF Attenuation Factor When VREFSEL is 1, 2 or 5"]
510    #[inline(always)]
511    pub fn vrefatt(&self) -> VREFATT_R {
512        VREFATT_R::new(((self.bits >> 4) & 0x0f) as u8)
513    }
514    #[doc = "Bits 8:11 - Code for VIN Attenuation Factor"]
515    #[inline(always)]
516    pub fn vinatt(&self) -> VINATT_R {
517        VINATT_R::new(((self.bits >> 8) & 0x0f) as u8)
518    }
519    #[doc = "Bits 12:13 - Scan DV Level Select"]
520    #[inline(always)]
521    pub fn dvl(&self) -> DVL_R {
522        DVL_R::new(((self.bits >> 12) & 3) as u8)
523    }
524    #[doc = "Bit 14 - Scan FIFO Overflow Action"]
525    #[inline(always)]
526    pub fn fifoofact(&self) -> FIFOOFACT_R {
527        FIFOOFACT_R::new(((self.bits >> 14) & 1) != 0)
528    }
529    #[doc = "Bit 16 - Scan PRS Trigger Mode"]
530    #[inline(always)]
531    pub fn prsmode(&self) -> PRSMODE_R {
532        PRSMODE_R::new(((self.bits >> 16) & 1) != 0)
533    }
534    #[doc = "Bits 17:20 - Scan Sequence PRS Trigger Select"]
535    #[inline(always)]
536    pub fn prssel(&self) -> PRSSEL_R {
537        PRSSEL_R::new(((self.bits >> 17) & 0x0f) as u8)
538    }
539    #[doc = "Bits 22:26 - Delay Next Conversion Start If CONVSTARTDELAYEN is Set"]
540    #[inline(always)]
541    pub fn convstartdelay(&self) -> CONVSTARTDELAY_R {
542        CONVSTARTDELAY_R::new(((self.bits >> 22) & 0x1f) as u8)
543    }
544    #[doc = "Bit 27 - Enable Delaying Next Conversion Start"]
545    #[inline(always)]
546    pub fn convstartdelayen(&self) -> CONVSTARTDELAYEN_R {
547        CONVSTARTDELAYEN_R::new(((self.bits >> 27) & 1) != 0)
548    }
549    #[doc = "Bits 29:31 - REPDELAY Select for SCAN REP Mode"]
550    #[inline(always)]
551    pub fn repdelay(&self) -> REPDELAY_R {
552        REPDELAY_R::new(((self.bits >> 29) & 7) as u8)
553    }
554}
555impl W {
556    #[doc = "Bits 0:2 - Scan Channel Reference Selection"]
557    #[inline(always)]
558    pub fn vrefsel(&mut self) -> VREFSEL_W {
559        VREFSEL_W::new(self)
560    }
561    #[doc = "Bit 3 - Enable Fixed Scaling on VREF"]
562    #[inline(always)]
563    pub fn vrefattfix(&mut self) -> VREFATTFIX_W {
564        VREFATTFIX_W::new(self)
565    }
566    #[doc = "Bits 4:7 - Code for VREF Attenuation Factor When VREFSEL is 1, 2 or 5"]
567    #[inline(always)]
568    pub fn vrefatt(&mut self) -> VREFATT_W {
569        VREFATT_W::new(self)
570    }
571    #[doc = "Bits 8:11 - Code for VIN Attenuation Factor"]
572    #[inline(always)]
573    pub fn vinatt(&mut self) -> VINATT_W {
574        VINATT_W::new(self)
575    }
576    #[doc = "Bits 12:13 - Scan DV Level Select"]
577    #[inline(always)]
578    pub fn dvl(&mut self) -> DVL_W {
579        DVL_W::new(self)
580    }
581    #[doc = "Bit 14 - Scan FIFO Overflow Action"]
582    #[inline(always)]
583    pub fn fifoofact(&mut self) -> FIFOOFACT_W {
584        FIFOOFACT_W::new(self)
585    }
586    #[doc = "Bit 16 - Scan PRS Trigger Mode"]
587    #[inline(always)]
588    pub fn prsmode(&mut self) -> PRSMODE_W {
589        PRSMODE_W::new(self)
590    }
591    #[doc = "Bits 17:20 - Scan Sequence PRS Trigger Select"]
592    #[inline(always)]
593    pub fn prssel(&mut self) -> PRSSEL_W {
594        PRSSEL_W::new(self)
595    }
596    #[doc = "Bits 22:26 - Delay Next Conversion Start If CONVSTARTDELAYEN is Set"]
597    #[inline(always)]
598    pub fn convstartdelay(&mut self) -> CONVSTARTDELAY_W {
599        CONVSTARTDELAY_W::new(self)
600    }
601    #[doc = "Bit 27 - Enable Delaying Next Conversion Start"]
602    #[inline(always)]
603    pub fn convstartdelayen(&mut self) -> CONVSTARTDELAYEN_W {
604        CONVSTARTDELAYEN_W::new(self)
605    }
606    #[doc = "Bits 29:31 - REPDELAY Select for SCAN REP Mode"]
607    #[inline(always)]
608    pub fn repdelay(&mut self) -> REPDELAY_W {
609        REPDELAY_W::new(self)
610    }
611    #[doc = "Writes raw bits to the register."]
612    #[inline(always)]
613    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
614        self.0.bits(bits);
615        self
616    }
617}
618#[doc = "Scan Control Register Continued\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scanctrlx](index.html) module"]
619pub struct SCANCTRLX_SPEC;
620impl crate::RegisterSpec for SCANCTRLX_SPEC {
621    type Ux = u32;
622}
623#[doc = "`read()` method returns [scanctrlx::R](R) reader structure"]
624impl crate::Readable for SCANCTRLX_SPEC {
625    type Reader = R;
626}
627#[doc = "`write(|w| ..)` method takes [scanctrlx::W](W) writer structure"]
628impl crate::Writable for SCANCTRLX_SPEC {
629    type Writer = W;
630}
631#[doc = "`reset()` method sets SCANCTRLX to value 0"]
632impl crate::Resettable for SCANCTRLX_SPEC {
633    #[inline(always)]
634    fn reset_value() -> Self::Ux {
635        0
636    }
637}
efm32pg12b500_pac/adc0/scanctrlx.rs

efm32pg12b500_pac/adc0/
scanctrlx.rs
