[][src]Type Definition efm32pg12_pac::lesense::decctrl::R

type R = R<u32, DECCTRL>;

Reader of register DECCTRL

Methods

impl R[src]

pub fn disable(&self) -> DISABLE_R[src]

Bit 0 - Disable the Decoder

pub fn errchk(&self) -> ERRCHK_R[src]

Bit 1 - Enable Check of Current State

pub fn intmap(&self) -> INTMAP_R[src]

Bit 2 - Enable Decoder to Channel Interrupt Mapping

pub fn hystprs0(&self) -> HYSTPRS0_R[src]

Bit 3 - Enable Decoder Hysteresis on PRS0 Output

pub fn hystprs1(&self) -> HYSTPRS1_R[src]

Bit 4 - Enable Decoder Hysteresis on PRS1 Output

pub fn hystprs2(&self) -> HYSTPRS2_R[src]

Bit 5 - Enable Decoder Hysteresis on PRS2 Output

pub fn hystirq(&self) -> HYSTIRQ_R[src]

Bit 6 - Enable Decoder Hysteresis on Interrupt Requests

pub fn prscnt(&self) -> PRSCNT_R[src]

Bit 7 - Enable Count Mode on Decoder PRS Channels 0 and 1

pub fn input(&self) -> INPUT_R[src]

Bit 8 - LESENSE Decoder Input Configuration

pub fn prssel0(&self) -> PRSSEL0_R[src]

Bits 10:13 - LESENSE Decoder PRS Input 0 Configuration

pub fn prssel1(&self) -> PRSSEL1_R[src]

Bits 15:18 - LESENSE Decoder PRS Input 1 Configuration

pub fn prssel2(&self) -> PRSSEL2_R[src]

Bits 20:23 - LESENSE Decoder PRS Input 2 Configuration

pub fn prssel3(&self) -> PRSSEL3_R[src]

Bits 25:28 - LESENSE Decoder PRS Input 3 Configuration