efm32pg12_pac/vdac0/
opa1_ctrl.rs

1#[doc = "Reader of register OPA1_CTRL"]
2pub type R = crate::R<u32, super::OPA1_CTRL>;
3#[doc = "Writer for register OPA1_CTRL"]
4pub type W = crate::W<u32, super::OPA1_CTRL>;
5#[doc = "Register OPA1_CTRL `reset()`'s with value 0x0e"]
6impl crate::ResetValue for super::OPA1_CTRL {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0x0e
11    }
12}
13#[doc = "OPAx Operation Mode\n\nValue on reset: 2"]
14#[derive(Clone, Copy, Debug, PartialEq)]
15#[repr(u8)]
16pub enum DRIVESTRENGTH_A {
17    #[doc = "0: Lower accuracy with Low drive strength."]
18    _0 = 0,
19    #[doc = "1: Low accuracy with Low drive strength."]
20    _1 = 1,
21    #[doc = "2: High accuracy with High drive strength."]
22    _2 = 2,
23    #[doc = "3: Higher accuracy with High drive strength."]
24    _3 = 3,
25}
26impl From<DRIVESTRENGTH_A> for u8 {
27    #[inline(always)]
28    fn from(variant: DRIVESTRENGTH_A) -> Self {
29        variant as _
30    }
31}
32#[doc = "Reader of field `DRIVESTRENGTH`"]
33pub type DRIVESTRENGTH_R = crate::R<u8, DRIVESTRENGTH_A>;
34impl DRIVESTRENGTH_R {
35    #[doc = r"Get enumerated values variant"]
36    #[inline(always)]
37    pub fn variant(&self) -> DRIVESTRENGTH_A {
38        match self.bits {
39            0 => DRIVESTRENGTH_A::_0,
40            1 => DRIVESTRENGTH_A::_1,
41            2 => DRIVESTRENGTH_A::_2,
42            3 => DRIVESTRENGTH_A::_3,
43            _ => unreachable!(),
44        }
45    }
46    #[doc = "Checks if the value of the field is `_0`"]
47    #[inline(always)]
48    pub fn is_0(&self) -> bool {
49        *self == DRIVESTRENGTH_A::_0
50    }
51    #[doc = "Checks if the value of the field is `_1`"]
52    #[inline(always)]
53    pub fn is_1(&self) -> bool {
54        *self == DRIVESTRENGTH_A::_1
55    }
56    #[doc = "Checks if the value of the field is `_2`"]
57    #[inline(always)]
58    pub fn is_2(&self) -> bool {
59        *self == DRIVESTRENGTH_A::_2
60    }
61    #[doc = "Checks if the value of the field is `_3`"]
62    #[inline(always)]
63    pub fn is_3(&self) -> bool {
64        *self == DRIVESTRENGTH_A::_3
65    }
66}
67#[doc = "Write proxy for field `DRIVESTRENGTH`"]
68pub struct DRIVESTRENGTH_W<'a> {
69    w: &'a mut W,
70}
71impl<'a> DRIVESTRENGTH_W<'a> {
72    #[doc = r"Writes `variant` to the field"]
73    #[inline(always)]
74    pub fn variant(self, variant: DRIVESTRENGTH_A) -> &'a mut W {
75        {
76            self.bits(variant.into())
77        }
78    }
79    #[doc = "Lower accuracy with Low drive strength."]
80    #[inline(always)]
81    pub fn _0(self) -> &'a mut W {
82        self.variant(DRIVESTRENGTH_A::_0)
83    }
84    #[doc = "Low accuracy with Low drive strength."]
85    #[inline(always)]
86    pub fn _1(self) -> &'a mut W {
87        self.variant(DRIVESTRENGTH_A::_1)
88    }
89    #[doc = "High accuracy with High drive strength."]
90    #[inline(always)]
91    pub fn _2(self) -> &'a mut W {
92        self.variant(DRIVESTRENGTH_A::_2)
93    }
94    #[doc = "Higher accuracy with High drive strength."]
95    #[inline(always)]
96    pub fn _3(self) -> &'a mut W {
97        self.variant(DRIVESTRENGTH_A::_3)
98    }
99    #[doc = r"Writes raw bits to the field"]
100    #[inline(always)]
101    pub fn bits(self, value: u8) -> &'a mut W {
102        self.w.bits = (self.w.bits & !0x03) | ((value as u32) & 0x03);
103        self.w
104    }
105}
106#[doc = "Reader of field `INCBW`"]
107pub type INCBW_R = crate::R<bool, bool>;
108#[doc = "Write proxy for field `INCBW`"]
109pub struct INCBW_W<'a> {
110    w: &'a mut W,
111}
112impl<'a> INCBW_W<'a> {
113    #[doc = r"Sets the field bit"]
114    #[inline(always)]
115    pub fn set_bit(self) -> &'a mut W {
116        self.bit(true)
117    }
118    #[doc = r"Clears the field bit"]
119    #[inline(always)]
120    pub fn clear_bit(self) -> &'a mut W {
121        self.bit(false)
122    }
123    #[doc = r"Writes raw bits to the field"]
124    #[inline(always)]
125    pub fn bit(self, value: bool) -> &'a mut W {
126        self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
127        self.w
128    }
129}
130#[doc = "Reader of field `HCMDIS`"]
131pub type HCMDIS_R = crate::R<bool, bool>;
132#[doc = "Write proxy for field `HCMDIS`"]
133pub struct HCMDIS_W<'a> {
134    w: &'a mut W,
135}
136impl<'a> HCMDIS_W<'a> {
137    #[doc = r"Sets the field bit"]
138    #[inline(always)]
139    pub fn set_bit(self) -> &'a mut W {
140        self.bit(true)
141    }
142    #[doc = r"Clears the field bit"]
143    #[inline(always)]
144    pub fn clear_bit(self) -> &'a mut W {
145        self.bit(false)
146    }
147    #[doc = r"Writes raw bits to the field"]
148    #[inline(always)]
149    pub fn bit(self, value: bool) -> &'a mut W {
150        self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3);
151        self.w
152    }
153}
154#[doc = "Reader of field `OUTSCALE`"]
155pub type OUTSCALE_R = crate::R<bool, bool>;
156#[doc = "Write proxy for field `OUTSCALE`"]
157pub struct OUTSCALE_W<'a> {
158    w: &'a mut W,
159}
160impl<'a> OUTSCALE_W<'a> {
161    #[doc = r"Sets the field bit"]
162    #[inline(always)]
163    pub fn set_bit(self) -> &'a mut W {
164        self.bit(true)
165    }
166    #[doc = r"Clears the field bit"]
167    #[inline(always)]
168    pub fn clear_bit(self) -> &'a mut W {
169        self.bit(false)
170    }
171    #[doc = r"Writes raw bits to the field"]
172    #[inline(always)]
173    pub fn bit(self, value: bool) -> &'a mut W {
174        self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4);
175        self.w
176    }
177}
178#[doc = "Reader of field `PRSEN`"]
179pub type PRSEN_R = crate::R<bool, bool>;
180#[doc = "Write proxy for field `PRSEN`"]
181pub struct PRSEN_W<'a> {
182    w: &'a mut W,
183}
184impl<'a> PRSEN_W<'a> {
185    #[doc = r"Sets the field bit"]
186    #[inline(always)]
187    pub fn set_bit(self) -> &'a mut W {
188        self.bit(true)
189    }
190    #[doc = r"Clears the field bit"]
191    #[inline(always)]
192    pub fn clear_bit(self) -> &'a mut W {
193        self.bit(false)
194    }
195    #[doc = r"Writes raw bits to the field"]
196    #[inline(always)]
197    pub fn bit(self, value: bool) -> &'a mut W {
198        self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8);
199        self.w
200    }
201}
202#[doc = "Reader of field `PRSMODE`"]
203pub type PRSMODE_R = crate::R<bool, bool>;
204#[doc = "Write proxy for field `PRSMODE`"]
205pub struct PRSMODE_W<'a> {
206    w: &'a mut W,
207}
208impl<'a> PRSMODE_W<'a> {
209    #[doc = r"Sets the field bit"]
210    #[inline(always)]
211    pub fn set_bit(self) -> &'a mut W {
212        self.bit(true)
213    }
214    #[doc = r"Clears the field bit"]
215    #[inline(always)]
216    pub fn clear_bit(self) -> &'a mut W {
217        self.bit(false)
218    }
219    #[doc = r"Writes raw bits to the field"]
220    #[inline(always)]
221    pub fn bit(self, value: bool) -> &'a mut W {
222        self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9);
223        self.w
224    }
225}
226#[doc = "OPAx PRS Trigger Select\n\nValue on reset: 0"]
227#[derive(Clone, Copy, Debug, PartialEq)]
228#[repr(u8)]
229pub enum PRSSEL_A {
230    #[doc = "0: PRS ch 0 triggers OPA."]
231    PRSCH0 = 0,
232    #[doc = "1: PRS ch 1 triggers OPA."]
233    PRSCH1 = 1,
234    #[doc = "2: PRS ch 2 triggers OPA."]
235    PRSCH2 = 2,
236    #[doc = "3: PRS ch 3 triggers OPA."]
237    PRSCH3 = 3,
238    #[doc = "4: PRS ch 4 triggers OPA."]
239    PRSCH4 = 4,
240    #[doc = "5: PRS ch 5 triggers OPA."]
241    PRSCH5 = 5,
242    #[doc = "6: PRS ch 6 triggers OPA."]
243    PRSCH6 = 6,
244    #[doc = "7: PRS ch 7 triggers OPA."]
245    PRSCH7 = 7,
246    #[doc = "8: PRS ch 8 triggers OPA."]
247    PRSCH8 = 8,
248    #[doc = "9: PRS ch 9 triggers OPA."]
249    PRSCH9 = 9,
250    #[doc = "10: PRS ch 10 triggers OPA."]
251    PRSCH10 = 10,
252    #[doc = "11: PRS ch 11 triggers OPA."]
253    PRSCH11 = 11,
254}
255impl From<PRSSEL_A> for u8 {
256    #[inline(always)]
257    fn from(variant: PRSSEL_A) -> Self {
258        variant as _
259    }
260}
261#[doc = "Reader of field `PRSSEL`"]
262pub type PRSSEL_R = crate::R<u8, PRSSEL_A>;
263impl PRSSEL_R {
264    #[doc = r"Get enumerated values variant"]
265    #[inline(always)]
266    pub fn variant(&self) -> crate::Variant<u8, PRSSEL_A> {
267        use crate::Variant::*;
268        match self.bits {
269            0 => Val(PRSSEL_A::PRSCH0),
270            1 => Val(PRSSEL_A::PRSCH1),
271            2 => Val(PRSSEL_A::PRSCH2),
272            3 => Val(PRSSEL_A::PRSCH3),
273            4 => Val(PRSSEL_A::PRSCH4),
274            5 => Val(PRSSEL_A::PRSCH5),
275            6 => Val(PRSSEL_A::PRSCH6),
276            7 => Val(PRSSEL_A::PRSCH7),
277            8 => Val(PRSSEL_A::PRSCH8),
278            9 => Val(PRSSEL_A::PRSCH9),
279            10 => Val(PRSSEL_A::PRSCH10),
280            11 => Val(PRSSEL_A::PRSCH11),
281            i => Res(i),
282        }
283    }
284    #[doc = "Checks if the value of the field is `PRSCH0`"]
285    #[inline(always)]
286    pub fn is_prsch0(&self) -> bool {
287        *self == PRSSEL_A::PRSCH0
288    }
289    #[doc = "Checks if the value of the field is `PRSCH1`"]
290    #[inline(always)]
291    pub fn is_prsch1(&self) -> bool {
292        *self == PRSSEL_A::PRSCH1
293    }
294    #[doc = "Checks if the value of the field is `PRSCH2`"]
295    #[inline(always)]
296    pub fn is_prsch2(&self) -> bool {
297        *self == PRSSEL_A::PRSCH2
298    }
299    #[doc = "Checks if the value of the field is `PRSCH3`"]
300    #[inline(always)]
301    pub fn is_prsch3(&self) -> bool {
302        *self == PRSSEL_A::PRSCH3
303    }
304    #[doc = "Checks if the value of the field is `PRSCH4`"]
305    #[inline(always)]
306    pub fn is_prsch4(&self) -> bool {
307        *self == PRSSEL_A::PRSCH4
308    }
309    #[doc = "Checks if the value of the field is `PRSCH5`"]
310    #[inline(always)]
311    pub fn is_prsch5(&self) -> bool {
312        *self == PRSSEL_A::PRSCH5
313    }
314    #[doc = "Checks if the value of the field is `PRSCH6`"]
315    #[inline(always)]
316    pub fn is_prsch6(&self) -> bool {
317        *self == PRSSEL_A::PRSCH6
318    }
319    #[doc = "Checks if the value of the field is `PRSCH7`"]
320    #[inline(always)]
321    pub fn is_prsch7(&self) -> bool {
322        *self == PRSSEL_A::PRSCH7
323    }
324    #[doc = "Checks if the value of the field is `PRSCH8`"]
325    #[inline(always)]
326    pub fn is_prsch8(&self) -> bool {
327        *self == PRSSEL_A::PRSCH8
328    }
329    #[doc = "Checks if the value of the field is `PRSCH9`"]
330    #[inline(always)]
331    pub fn is_prsch9(&self) -> bool {
332        *self == PRSSEL_A::PRSCH9
333    }
334    #[doc = "Checks if the value of the field is `PRSCH10`"]
335    #[inline(always)]
336    pub fn is_prsch10(&self) -> bool {
337        *self == PRSSEL_A::PRSCH10
338    }
339    #[doc = "Checks if the value of the field is `PRSCH11`"]
340    #[inline(always)]
341    pub fn is_prsch11(&self) -> bool {
342        *self == PRSSEL_A::PRSCH11
343    }
344}
345#[doc = "Write proxy for field `PRSSEL`"]
346pub struct PRSSEL_W<'a> {
347    w: &'a mut W,
348}
349impl<'a> PRSSEL_W<'a> {
350    #[doc = r"Writes `variant` to the field"]
351    #[inline(always)]
352    pub fn variant(self, variant: PRSSEL_A) -> &'a mut W {
353        unsafe { self.bits(variant.into()) }
354    }
355    #[doc = "PRS ch 0 triggers OPA."]
356    #[inline(always)]
357    pub fn prsch0(self) -> &'a mut W {
358        self.variant(PRSSEL_A::PRSCH0)
359    }
360    #[doc = "PRS ch 1 triggers OPA."]
361    #[inline(always)]
362    pub fn prsch1(self) -> &'a mut W {
363        self.variant(PRSSEL_A::PRSCH1)
364    }
365    #[doc = "PRS ch 2 triggers OPA."]
366    #[inline(always)]
367    pub fn prsch2(self) -> &'a mut W {
368        self.variant(PRSSEL_A::PRSCH2)
369    }
370    #[doc = "PRS ch 3 triggers OPA."]
371    #[inline(always)]
372    pub fn prsch3(self) -> &'a mut W {
373        self.variant(PRSSEL_A::PRSCH3)
374    }
375    #[doc = "PRS ch 4 triggers OPA."]
376    #[inline(always)]
377    pub fn prsch4(self) -> &'a mut W {
378        self.variant(PRSSEL_A::PRSCH4)
379    }
380    #[doc = "PRS ch 5 triggers OPA."]
381    #[inline(always)]
382    pub fn prsch5(self) -> &'a mut W {
383        self.variant(PRSSEL_A::PRSCH5)
384    }
385    #[doc = "PRS ch 6 triggers OPA."]
386    #[inline(always)]
387    pub fn prsch6(self) -> &'a mut W {
388        self.variant(PRSSEL_A::PRSCH6)
389    }
390    #[doc = "PRS ch 7 triggers OPA."]
391    #[inline(always)]
392    pub fn prsch7(self) -> &'a mut W {
393        self.variant(PRSSEL_A::PRSCH7)
394    }
395    #[doc = "PRS ch 8 triggers OPA."]
396    #[inline(always)]
397    pub fn prsch8(self) -> &'a mut W {
398        self.variant(PRSSEL_A::PRSCH8)
399    }
400    #[doc = "PRS ch 9 triggers OPA."]
401    #[inline(always)]
402    pub fn prsch9(self) -> &'a mut W {
403        self.variant(PRSSEL_A::PRSCH9)
404    }
405    #[doc = "PRS ch 10 triggers OPA."]
406    #[inline(always)]
407    pub fn prsch10(self) -> &'a mut W {
408        self.variant(PRSSEL_A::PRSCH10)
409    }
410    #[doc = "PRS ch 11 triggers OPA."]
411    #[inline(always)]
412    pub fn prsch11(self) -> &'a mut W {
413        self.variant(PRSSEL_A::PRSCH11)
414    }
415    #[doc = r"Writes raw bits to the field"]
416    #[inline(always)]
417    pub unsafe fn bits(self, value: u8) -> &'a mut W {
418        self.w.bits = (self.w.bits & !(0x0f << 10)) | (((value as u32) & 0x0f) << 10);
419        self.w
420    }
421}
422#[doc = "Reader of field `PRSOUTMODE`"]
423pub type PRSOUTMODE_R = crate::R<bool, bool>;
424#[doc = "Write proxy for field `PRSOUTMODE`"]
425pub struct PRSOUTMODE_W<'a> {
426    w: &'a mut W,
427}
428impl<'a> PRSOUTMODE_W<'a> {
429    #[doc = r"Sets the field bit"]
430    #[inline(always)]
431    pub fn set_bit(self) -> &'a mut W {
432        self.bit(true)
433    }
434    #[doc = r"Clears the field bit"]
435    #[inline(always)]
436    pub fn clear_bit(self) -> &'a mut W {
437        self.bit(false)
438    }
439    #[doc = r"Writes raw bits to the field"]
440    #[inline(always)]
441    pub fn bit(self, value: bool) -> &'a mut W {
442        self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16);
443        self.w
444    }
445}
446#[doc = "Reader of field `APORTXMASTERDIS`"]
447pub type APORTXMASTERDIS_R = crate::R<bool, bool>;
448#[doc = "Write proxy for field `APORTXMASTERDIS`"]
449pub struct APORTXMASTERDIS_W<'a> {
450    w: &'a mut W,
451}
452impl<'a> APORTXMASTERDIS_W<'a> {
453    #[doc = r"Sets the field bit"]
454    #[inline(always)]
455    pub fn set_bit(self) -> &'a mut W {
456        self.bit(true)
457    }
458    #[doc = r"Clears the field bit"]
459    #[inline(always)]
460    pub fn clear_bit(self) -> &'a mut W {
461        self.bit(false)
462    }
463    #[doc = r"Writes raw bits to the field"]
464    #[inline(always)]
465    pub fn bit(self, value: bool) -> &'a mut W {
466        self.w.bits = (self.w.bits & !(0x01 << 20)) | (((value as u32) & 0x01) << 20);
467        self.w
468    }
469}
470#[doc = "Reader of field `APORTYMASTERDIS`"]
471pub type APORTYMASTERDIS_R = crate::R<bool, bool>;
472#[doc = "Write proxy for field `APORTYMASTERDIS`"]
473pub struct APORTYMASTERDIS_W<'a> {
474    w: &'a mut W,
475}
476impl<'a> APORTYMASTERDIS_W<'a> {
477    #[doc = r"Sets the field bit"]
478    #[inline(always)]
479    pub fn set_bit(self) -> &'a mut W {
480        self.bit(true)
481    }
482    #[doc = r"Clears the field bit"]
483    #[inline(always)]
484    pub fn clear_bit(self) -> &'a mut W {
485        self.bit(false)
486    }
487    #[doc = r"Writes raw bits to the field"]
488    #[inline(always)]
489    pub fn bit(self, value: bool) -> &'a mut W {
490        self.w.bits = (self.w.bits & !(0x01 << 21)) | (((value as u32) & 0x01) << 21);
491        self.w
492    }
493}
494impl R {
495    #[doc = "Bits 0:1 - OPAx Operation Mode"]
496    #[inline(always)]
497    pub fn drivestrength(&self) -> DRIVESTRENGTH_R {
498        DRIVESTRENGTH_R::new((self.bits & 0x03) as u8)
499    }
500    #[doc = "Bit 2 - OPAx Unity Gain Bandwidth Scale"]
501    #[inline(always)]
502    pub fn incbw(&self) -> INCBW_R {
503        INCBW_R::new(((self.bits >> 2) & 0x01) != 0)
504    }
505    #[doc = "Bit 3 - High Common Mode Disable"]
506    #[inline(always)]
507    pub fn hcmdis(&self) -> HCMDIS_R {
508        HCMDIS_R::new(((self.bits >> 3) & 0x01) != 0)
509    }
510    #[doc = "Bit 4 - Scale OPAx Output Driving Strength"]
511    #[inline(always)]
512    pub fn outscale(&self) -> OUTSCALE_R {
513        OUTSCALE_R::new(((self.bits >> 4) & 0x01) != 0)
514    }
515    #[doc = "Bit 8 - OPAx PRS Trigger Enable"]
516    #[inline(always)]
517    pub fn prsen(&self) -> PRSEN_R {
518        PRSEN_R::new(((self.bits >> 8) & 0x01) != 0)
519    }
520    #[doc = "Bit 9 - OPAx PRS Trigger Mode"]
521    #[inline(always)]
522    pub fn prsmode(&self) -> PRSMODE_R {
523        PRSMODE_R::new(((self.bits >> 9) & 0x01) != 0)
524    }
525    #[doc = "Bits 10:13 - OPAx PRS Trigger Select"]
526    #[inline(always)]
527    pub fn prssel(&self) -> PRSSEL_R {
528        PRSSEL_R::new(((self.bits >> 10) & 0x0f) as u8)
529    }
530    #[doc = "Bit 16 - OPAx PRS Output Select"]
531    #[inline(always)]
532    pub fn prsoutmode(&self) -> PRSOUTMODE_R {
533        PRSOUTMODE_R::new(((self.bits >> 16) & 0x01) != 0)
534    }
535    #[doc = "Bit 20 - APORT Bus Master Disable"]
536    #[inline(always)]
537    pub fn aportxmasterdis(&self) -> APORTXMASTERDIS_R {
538        APORTXMASTERDIS_R::new(((self.bits >> 20) & 0x01) != 0)
539    }
540    #[doc = "Bit 21 - APORT Bus Master Disable"]
541    #[inline(always)]
542    pub fn aportymasterdis(&self) -> APORTYMASTERDIS_R {
543        APORTYMASTERDIS_R::new(((self.bits >> 21) & 0x01) != 0)
544    }
545}
546impl W {
547    #[doc = "Bits 0:1 - OPAx Operation Mode"]
548    #[inline(always)]
549    pub fn drivestrength(&mut self) -> DRIVESTRENGTH_W {
550        DRIVESTRENGTH_W { w: self }
551    }
552    #[doc = "Bit 2 - OPAx Unity Gain Bandwidth Scale"]
553    #[inline(always)]
554    pub fn incbw(&mut self) -> INCBW_W {
555        INCBW_W { w: self }
556    }
557    #[doc = "Bit 3 - High Common Mode Disable"]
558    #[inline(always)]
559    pub fn hcmdis(&mut self) -> HCMDIS_W {
560        HCMDIS_W { w: self }
561    }
562    #[doc = "Bit 4 - Scale OPAx Output Driving Strength"]
563    #[inline(always)]
564    pub fn outscale(&mut self) -> OUTSCALE_W {
565        OUTSCALE_W { w: self }
566    }
567    #[doc = "Bit 8 - OPAx PRS Trigger Enable"]
568    #[inline(always)]
569    pub fn prsen(&mut self) -> PRSEN_W {
570        PRSEN_W { w: self }
571    }
572    #[doc = "Bit 9 - OPAx PRS Trigger Mode"]
573    #[inline(always)]
574    pub fn prsmode(&mut self) -> PRSMODE_W {
575        PRSMODE_W { w: self }
576    }
577    #[doc = "Bits 10:13 - OPAx PRS Trigger Select"]
578    #[inline(always)]
579    pub fn prssel(&mut self) -> PRSSEL_W {
580        PRSSEL_W { w: self }
581    }
582    #[doc = "Bit 16 - OPAx PRS Output Select"]
583    #[inline(always)]
584    pub fn prsoutmode(&mut self) -> PRSOUTMODE_W {
585        PRSOUTMODE_W { w: self }
586    }
587    #[doc = "Bit 20 - APORT Bus Master Disable"]
588    #[inline(always)]
589    pub fn aportxmasterdis(&mut self) -> APORTXMASTERDIS_W {
590        APORTXMASTERDIS_W { w: self }
591    }
592    #[doc = "Bit 21 - APORT Bus Master Disable"]
593    #[inline(always)]
594    pub fn aportymasterdis(&mut self) -> APORTYMASTERDIS_W {
595        APORTYMASTERDIS_W { w: self }
596    }
597}
efm32pg12_pac/vdac0/opa1_ctrl.rs

efm32pg12_pac/vdac0/
opa1_ctrl.rs
