efm32pg12_pac/usart0/
cmd.rs1#[doc = "Writer for register CMD"]
2pub type W = crate::W<u32, super::CMD>;
3#[doc = "Register CMD `reset()`'s with value 0"]
4impl crate::ResetValue for super::CMD {
5 type Type = u32;
6 #[inline(always)]
7 fn reset_value() -> Self::Type {
8 0
9 }
10}
11#[doc = "Write proxy for field `RXEN`"]
12pub struct RXEN_W<'a> {
13 w: &'a mut W,
14}
15impl<'a> RXEN_W<'a> {
16 #[doc = r"Sets the field bit"]
17 #[inline(always)]
18 pub fn set_bit(self) -> &'a mut W {
19 self.bit(true)
20 }
21 #[doc = r"Clears the field bit"]
22 #[inline(always)]
23 pub fn clear_bit(self) -> &'a mut W {
24 self.bit(false)
25 }
26 #[doc = r"Writes raw bits to the field"]
27 #[inline(always)]
28 pub fn bit(self, value: bool) -> &'a mut W {
29 self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
30 self.w
31 }
32}
33#[doc = "Write proxy for field `RXDIS`"]
34pub struct RXDIS_W<'a> {
35 w: &'a mut W,
36}
37impl<'a> RXDIS_W<'a> {
38 #[doc = r"Sets the field bit"]
39 #[inline(always)]
40 pub fn set_bit(self) -> &'a mut W {
41 self.bit(true)
42 }
43 #[doc = r"Clears the field bit"]
44 #[inline(always)]
45 pub fn clear_bit(self) -> &'a mut W {
46 self.bit(false)
47 }
48 #[doc = r"Writes raw bits to the field"]
49 #[inline(always)]
50 pub fn bit(self, value: bool) -> &'a mut W {
51 self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
52 self.w
53 }
54}
55#[doc = "Write proxy for field `TXEN`"]
56pub struct TXEN_W<'a> {
57 w: &'a mut W,
58}
59impl<'a> TXEN_W<'a> {
60 #[doc = r"Sets the field bit"]
61 #[inline(always)]
62 pub fn set_bit(self) -> &'a mut W {
63 self.bit(true)
64 }
65 #[doc = r"Clears the field bit"]
66 #[inline(always)]
67 pub fn clear_bit(self) -> &'a mut W {
68 self.bit(false)
69 }
70 #[doc = r"Writes raw bits to the field"]
71 #[inline(always)]
72 pub fn bit(self, value: bool) -> &'a mut W {
73 self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
74 self.w
75 }
76}
77#[doc = "Write proxy for field `TXDIS`"]
78pub struct TXDIS_W<'a> {
79 w: &'a mut W,
80}
81impl<'a> TXDIS_W<'a> {
82 #[doc = r"Sets the field bit"]
83 #[inline(always)]
84 pub fn set_bit(self) -> &'a mut W {
85 self.bit(true)
86 }
87 #[doc = r"Clears the field bit"]
88 #[inline(always)]
89 pub fn clear_bit(self) -> &'a mut W {
90 self.bit(false)
91 }
92 #[doc = r"Writes raw bits to the field"]
93 #[inline(always)]
94 pub fn bit(self, value: bool) -> &'a mut W {
95 self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3);
96 self.w
97 }
98}
99#[doc = "Write proxy for field `MASTEREN`"]
100pub struct MASTEREN_W<'a> {
101 w: &'a mut W,
102}
103impl<'a> MASTEREN_W<'a> {
104 #[doc = r"Sets the field bit"]
105 #[inline(always)]
106 pub fn set_bit(self) -> &'a mut W {
107 self.bit(true)
108 }
109 #[doc = r"Clears the field bit"]
110 #[inline(always)]
111 pub fn clear_bit(self) -> &'a mut W {
112 self.bit(false)
113 }
114 #[doc = r"Writes raw bits to the field"]
115 #[inline(always)]
116 pub fn bit(self, value: bool) -> &'a mut W {
117 self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4);
118 self.w
119 }
120}
121#[doc = "Write proxy for field `MASTERDIS`"]
122pub struct MASTERDIS_W<'a> {
123 w: &'a mut W,
124}
125impl<'a> MASTERDIS_W<'a> {
126 #[doc = r"Sets the field bit"]
127 #[inline(always)]
128 pub fn set_bit(self) -> &'a mut W {
129 self.bit(true)
130 }
131 #[doc = r"Clears the field bit"]
132 #[inline(always)]
133 pub fn clear_bit(self) -> &'a mut W {
134 self.bit(false)
135 }
136 #[doc = r"Writes raw bits to the field"]
137 #[inline(always)]
138 pub fn bit(self, value: bool) -> &'a mut W {
139 self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5);
140 self.w
141 }
142}
143#[doc = "Write proxy for field `RXBLOCKEN`"]
144pub struct RXBLOCKEN_W<'a> {
145 w: &'a mut W,
146}
147impl<'a> RXBLOCKEN_W<'a> {
148 #[doc = r"Sets the field bit"]
149 #[inline(always)]
150 pub fn set_bit(self) -> &'a mut W {
151 self.bit(true)
152 }
153 #[doc = r"Clears the field bit"]
154 #[inline(always)]
155 pub fn clear_bit(self) -> &'a mut W {
156 self.bit(false)
157 }
158 #[doc = r"Writes raw bits to the field"]
159 #[inline(always)]
160 pub fn bit(self, value: bool) -> &'a mut W {
161 self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u32) & 0x01) << 6);
162 self.w
163 }
164}
165#[doc = "Write proxy for field `RXBLOCKDIS`"]
166pub struct RXBLOCKDIS_W<'a> {
167 w: &'a mut W,
168}
169impl<'a> RXBLOCKDIS_W<'a> {
170 #[doc = r"Sets the field bit"]
171 #[inline(always)]
172 pub fn set_bit(self) -> &'a mut W {
173 self.bit(true)
174 }
175 #[doc = r"Clears the field bit"]
176 #[inline(always)]
177 pub fn clear_bit(self) -> &'a mut W {
178 self.bit(false)
179 }
180 #[doc = r"Writes raw bits to the field"]
181 #[inline(always)]
182 pub fn bit(self, value: bool) -> &'a mut W {
183 self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7);
184 self.w
185 }
186}
187#[doc = "Write proxy for field `TXTRIEN`"]
188pub struct TXTRIEN_W<'a> {
189 w: &'a mut W,
190}
191impl<'a> TXTRIEN_W<'a> {
192 #[doc = r"Sets the field bit"]
193 #[inline(always)]
194 pub fn set_bit(self) -> &'a mut W {
195 self.bit(true)
196 }
197 #[doc = r"Clears the field bit"]
198 #[inline(always)]
199 pub fn clear_bit(self) -> &'a mut W {
200 self.bit(false)
201 }
202 #[doc = r"Writes raw bits to the field"]
203 #[inline(always)]
204 pub fn bit(self, value: bool) -> &'a mut W {
205 self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8);
206 self.w
207 }
208}
209#[doc = "Write proxy for field `TXTRIDIS`"]
210pub struct TXTRIDIS_W<'a> {
211 w: &'a mut W,
212}
213impl<'a> TXTRIDIS_W<'a> {
214 #[doc = r"Sets the field bit"]
215 #[inline(always)]
216 pub fn set_bit(self) -> &'a mut W {
217 self.bit(true)
218 }
219 #[doc = r"Clears the field bit"]
220 #[inline(always)]
221 pub fn clear_bit(self) -> &'a mut W {
222 self.bit(false)
223 }
224 #[doc = r"Writes raw bits to the field"]
225 #[inline(always)]
226 pub fn bit(self, value: bool) -> &'a mut W {
227 self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9);
228 self.w
229 }
230}
231#[doc = "Write proxy for field `CLEARTX`"]
232pub struct CLEARTX_W<'a> {
233 w: &'a mut W,
234}
235impl<'a> CLEARTX_W<'a> {
236 #[doc = r"Sets the field bit"]
237 #[inline(always)]
238 pub fn set_bit(self) -> &'a mut W {
239 self.bit(true)
240 }
241 #[doc = r"Clears the field bit"]
242 #[inline(always)]
243 pub fn clear_bit(self) -> &'a mut W {
244 self.bit(false)
245 }
246 #[doc = r"Writes raw bits to the field"]
247 #[inline(always)]
248 pub fn bit(self, value: bool) -> &'a mut W {
249 self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10);
250 self.w
251 }
252}
253#[doc = "Write proxy for field `CLEARRX`"]
254pub struct CLEARRX_W<'a> {
255 w: &'a mut W,
256}
257impl<'a> CLEARRX_W<'a> {
258 #[doc = r"Sets the field bit"]
259 #[inline(always)]
260 pub fn set_bit(self) -> &'a mut W {
261 self.bit(true)
262 }
263 #[doc = r"Clears the field bit"]
264 #[inline(always)]
265 pub fn clear_bit(self) -> &'a mut W {
266 self.bit(false)
267 }
268 #[doc = r"Writes raw bits to the field"]
269 #[inline(always)]
270 pub fn bit(self, value: bool) -> &'a mut W {
271 self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11);
272 self.w
273 }
274}
275impl W {
276 #[doc = "Bit 0 - Receiver Enable"]
277 #[inline(always)]
278 pub fn rxen(&mut self) -> RXEN_W {
279 RXEN_W { w: self }
280 }
281 #[doc = "Bit 1 - Receiver Disable"]
282 #[inline(always)]
283 pub fn rxdis(&mut self) -> RXDIS_W {
284 RXDIS_W { w: self }
285 }
286 #[doc = "Bit 2 - Transmitter Enable"]
287 #[inline(always)]
288 pub fn txen(&mut self) -> TXEN_W {
289 TXEN_W { w: self }
290 }
291 #[doc = "Bit 3 - Transmitter Disable"]
292 #[inline(always)]
293 pub fn txdis(&mut self) -> TXDIS_W {
294 TXDIS_W { w: self }
295 }
296 #[doc = "Bit 4 - Master Enable"]
297 #[inline(always)]
298 pub fn masteren(&mut self) -> MASTEREN_W {
299 MASTEREN_W { w: self }
300 }
301 #[doc = "Bit 5 - Master Disable"]
302 #[inline(always)]
303 pub fn masterdis(&mut self) -> MASTERDIS_W {
304 MASTERDIS_W { w: self }
305 }
306 #[doc = "Bit 6 - Receiver Block Enable"]
307 #[inline(always)]
308 pub fn rxblocken(&mut self) -> RXBLOCKEN_W {
309 RXBLOCKEN_W { w: self }
310 }
311 #[doc = "Bit 7 - Receiver Block Disable"]
312 #[inline(always)]
313 pub fn rxblockdis(&mut self) -> RXBLOCKDIS_W {
314 RXBLOCKDIS_W { w: self }
315 }
316 #[doc = "Bit 8 - Transmitter Tristate Enable"]
317 #[inline(always)]
318 pub fn txtrien(&mut self) -> TXTRIEN_W {
319 TXTRIEN_W { w: self }
320 }
321 #[doc = "Bit 9 - Transmitter Tristate Disable"]
322 #[inline(always)]
323 pub fn txtridis(&mut self) -> TXTRIDIS_W {
324 TXTRIDIS_W { w: self }
325 }
326 #[doc = "Bit 10 - Clear TX"]
327 #[inline(always)]
328 pub fn cleartx(&mut self) -> CLEARTX_W {
329 CLEARTX_W { w: self }
330 }
331 #[doc = "Bit 11 - Clear RX"]
332 #[inline(always)]
333 pub fn clearrx(&mut self) -> CLEARRX_W {
334 CLEARRX_W { w: self }
335 }
336}