efm32pg12_pac/smu/
ppupatd0.rs

1#[doc = "Reader of register PPUPATD0"]
2pub type R = crate::R<u32, super::PPUPATD0>;
3#[doc = "Writer for register PPUPATD0"]
4pub type W = crate::W<u32, super::PPUPATD0>;
5#[doc = "Register PPUPATD0 `reset()`'s with value 0"]
6impl crate::ResetValue for super::PPUPATD0 {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "Reader of field `ACMP0`"]
14pub type ACMP0_R = crate::R<bool, bool>;
15#[doc = "Write proxy for field `ACMP0`"]
16pub struct ACMP0_W<'a> {
17    w: &'a mut W,
18}
19impl<'a> ACMP0_W<'a> {
20    #[doc = r"Sets the field bit"]
21    #[inline(always)]
22    pub fn set_bit(self) -> &'a mut W {
23        self.bit(true)
24    }
25    #[doc = r"Clears the field bit"]
26    #[inline(always)]
27    pub fn clear_bit(self) -> &'a mut W {
28        self.bit(false)
29    }
30    #[doc = r"Writes raw bits to the field"]
31    #[inline(always)]
32    pub fn bit(self, value: bool) -> &'a mut W {
33        self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
34        self.w
35    }
36}
37#[doc = "Reader of field `ACMP1`"]
38pub type ACMP1_R = crate::R<bool, bool>;
39#[doc = "Write proxy for field `ACMP1`"]
40pub struct ACMP1_W<'a> {
41    w: &'a mut W,
42}
43impl<'a> ACMP1_W<'a> {
44    #[doc = r"Sets the field bit"]
45    #[inline(always)]
46    pub fn set_bit(self) -> &'a mut W {
47        self.bit(true)
48    }
49    #[doc = r"Clears the field bit"]
50    #[inline(always)]
51    pub fn clear_bit(self) -> &'a mut W {
52        self.bit(false)
53    }
54    #[doc = r"Writes raw bits to the field"]
55    #[inline(always)]
56    pub fn bit(self, value: bool) -> &'a mut W {
57        self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
58        self.w
59    }
60}
61#[doc = "Reader of field `ADC0`"]
62pub type ADC0_R = crate::R<bool, bool>;
63#[doc = "Write proxy for field `ADC0`"]
64pub struct ADC0_W<'a> {
65    w: &'a mut W,
66}
67impl<'a> ADC0_W<'a> {
68    #[doc = r"Sets the field bit"]
69    #[inline(always)]
70    pub fn set_bit(self) -> &'a mut W {
71        self.bit(true)
72    }
73    #[doc = r"Clears the field bit"]
74    #[inline(always)]
75    pub fn clear_bit(self) -> &'a mut W {
76        self.bit(false)
77    }
78    #[doc = r"Writes raw bits to the field"]
79    #[inline(always)]
80    pub fn bit(self, value: bool) -> &'a mut W {
81        self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
82        self.w
83    }
84}
85#[doc = "Reader of field `CMU`"]
86pub type CMU_R = crate::R<bool, bool>;
87#[doc = "Write proxy for field `CMU`"]
88pub struct CMU_W<'a> {
89    w: &'a mut W,
90}
91impl<'a> CMU_W<'a> {
92    #[doc = r"Sets the field bit"]
93    #[inline(always)]
94    pub fn set_bit(self) -> &'a mut W {
95        self.bit(true)
96    }
97    #[doc = r"Clears the field bit"]
98    #[inline(always)]
99    pub fn clear_bit(self) -> &'a mut W {
100        self.bit(false)
101    }
102    #[doc = r"Writes raw bits to the field"]
103    #[inline(always)]
104    pub fn bit(self, value: bool) -> &'a mut W {
105        self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5);
106        self.w
107    }
108}
109#[doc = "Reader of field `CRYOTIMER`"]
110pub type CRYOTIMER_R = crate::R<bool, bool>;
111#[doc = "Write proxy for field `CRYOTIMER`"]
112pub struct CRYOTIMER_W<'a> {
113    w: &'a mut W,
114}
115impl<'a> CRYOTIMER_W<'a> {
116    #[doc = r"Sets the field bit"]
117    #[inline(always)]
118    pub fn set_bit(self) -> &'a mut W {
119        self.bit(true)
120    }
121    #[doc = r"Clears the field bit"]
122    #[inline(always)]
123    pub fn clear_bit(self) -> &'a mut W {
124        self.bit(false)
125    }
126    #[doc = r"Writes raw bits to the field"]
127    #[inline(always)]
128    pub fn bit(self, value: bool) -> &'a mut W {
129        self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7);
130        self.w
131    }
132}
133#[doc = "Reader of field `CRYPTO0`"]
134pub type CRYPTO0_R = crate::R<bool, bool>;
135#[doc = "Write proxy for field `CRYPTO0`"]
136pub struct CRYPTO0_W<'a> {
137    w: &'a mut W,
138}
139impl<'a> CRYPTO0_W<'a> {
140    #[doc = r"Sets the field bit"]
141    #[inline(always)]
142    pub fn set_bit(self) -> &'a mut W {
143        self.bit(true)
144    }
145    #[doc = r"Clears the field bit"]
146    #[inline(always)]
147    pub fn clear_bit(self) -> &'a mut W {
148        self.bit(false)
149    }
150    #[doc = r"Writes raw bits to the field"]
151    #[inline(always)]
152    pub fn bit(self, value: bool) -> &'a mut W {
153        self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8);
154        self.w
155    }
156}
157#[doc = "Reader of field `CRYPTO1`"]
158pub type CRYPTO1_R = crate::R<bool, bool>;
159#[doc = "Write proxy for field `CRYPTO1`"]
160pub struct CRYPTO1_W<'a> {
161    w: &'a mut W,
162}
163impl<'a> CRYPTO1_W<'a> {
164    #[doc = r"Sets the field bit"]
165    #[inline(always)]
166    pub fn set_bit(self) -> &'a mut W {
167        self.bit(true)
168    }
169    #[doc = r"Clears the field bit"]
170    #[inline(always)]
171    pub fn clear_bit(self) -> &'a mut W {
172        self.bit(false)
173    }
174    #[doc = r"Writes raw bits to the field"]
175    #[inline(always)]
176    pub fn bit(self, value: bool) -> &'a mut W {
177        self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9);
178        self.w
179    }
180}
181#[doc = "Reader of field `CSEN`"]
182pub type CSEN_R = crate::R<bool, bool>;
183#[doc = "Write proxy for field `CSEN`"]
184pub struct CSEN_W<'a> {
185    w: &'a mut W,
186}
187impl<'a> CSEN_W<'a> {
188    #[doc = r"Sets the field bit"]
189    #[inline(always)]
190    pub fn set_bit(self) -> &'a mut W {
191        self.bit(true)
192    }
193    #[doc = r"Clears the field bit"]
194    #[inline(always)]
195    pub fn clear_bit(self) -> &'a mut W {
196        self.bit(false)
197    }
198    #[doc = r"Writes raw bits to the field"]
199    #[inline(always)]
200    pub fn bit(self, value: bool) -> &'a mut W {
201        self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10);
202        self.w
203    }
204}
205#[doc = "Reader of field `VDAC0`"]
206pub type VDAC0_R = crate::R<bool, bool>;
207#[doc = "Write proxy for field `VDAC0`"]
208pub struct VDAC0_W<'a> {
209    w: &'a mut W,
210}
211impl<'a> VDAC0_W<'a> {
212    #[doc = r"Sets the field bit"]
213    #[inline(always)]
214    pub fn set_bit(self) -> &'a mut W {
215        self.bit(true)
216    }
217    #[doc = r"Clears the field bit"]
218    #[inline(always)]
219    pub fn clear_bit(self) -> &'a mut W {
220        self.bit(false)
221    }
222    #[doc = r"Writes raw bits to the field"]
223    #[inline(always)]
224    pub fn bit(self, value: bool) -> &'a mut W {
225        self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11);
226        self.w
227    }
228}
229#[doc = "Reader of field `PRS`"]
230pub type PRS_R = crate::R<bool, bool>;
231#[doc = "Write proxy for field `PRS`"]
232pub struct PRS_W<'a> {
233    w: &'a mut W,
234}
235impl<'a> PRS_W<'a> {
236    #[doc = r"Sets the field bit"]
237    #[inline(always)]
238    pub fn set_bit(self) -> &'a mut W {
239        self.bit(true)
240    }
241    #[doc = r"Clears the field bit"]
242    #[inline(always)]
243    pub fn clear_bit(self) -> &'a mut W {
244        self.bit(false)
245    }
246    #[doc = r"Writes raw bits to the field"]
247    #[inline(always)]
248    pub fn bit(self, value: bool) -> &'a mut W {
249        self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u32) & 0x01) << 12);
250        self.w
251    }
252}
253#[doc = "Reader of field `EMU`"]
254pub type EMU_R = crate::R<bool, bool>;
255#[doc = "Write proxy for field `EMU`"]
256pub struct EMU_W<'a> {
257    w: &'a mut W,
258}
259impl<'a> EMU_W<'a> {
260    #[doc = r"Sets the field bit"]
261    #[inline(always)]
262    pub fn set_bit(self) -> &'a mut W {
263        self.bit(true)
264    }
265    #[doc = r"Clears the field bit"]
266    #[inline(always)]
267    pub fn clear_bit(self) -> &'a mut W {
268        self.bit(false)
269    }
270    #[doc = r"Writes raw bits to the field"]
271    #[inline(always)]
272    pub fn bit(self, value: bool) -> &'a mut W {
273        self.w.bits = (self.w.bits & !(0x01 << 13)) | (((value as u32) & 0x01) << 13);
274        self.w
275    }
276}
277#[doc = "Reader of field `FPUEH`"]
278pub type FPUEH_R = crate::R<bool, bool>;
279#[doc = "Write proxy for field `FPUEH`"]
280pub struct FPUEH_W<'a> {
281    w: &'a mut W,
282}
283impl<'a> FPUEH_W<'a> {
284    #[doc = r"Sets the field bit"]
285    #[inline(always)]
286    pub fn set_bit(self) -> &'a mut W {
287        self.bit(true)
288    }
289    #[doc = r"Clears the field bit"]
290    #[inline(always)]
291    pub fn clear_bit(self) -> &'a mut W {
292        self.bit(false)
293    }
294    #[doc = r"Writes raw bits to the field"]
295    #[inline(always)]
296    pub fn bit(self, value: bool) -> &'a mut W {
297        self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14);
298        self.w
299    }
300}
301#[doc = "Reader of field `GPCRC`"]
302pub type GPCRC_R = crate::R<bool, bool>;
303#[doc = "Write proxy for field `GPCRC`"]
304pub struct GPCRC_W<'a> {
305    w: &'a mut W,
306}
307impl<'a> GPCRC_W<'a> {
308    #[doc = r"Sets the field bit"]
309    #[inline(always)]
310    pub fn set_bit(self) -> &'a mut W {
311        self.bit(true)
312    }
313    #[doc = r"Clears the field bit"]
314    #[inline(always)]
315    pub fn clear_bit(self) -> &'a mut W {
316        self.bit(false)
317    }
318    #[doc = r"Writes raw bits to the field"]
319    #[inline(always)]
320    pub fn bit(self, value: bool) -> &'a mut W {
321        self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16);
322        self.w
323    }
324}
325#[doc = "Reader of field `GPIO`"]
326pub type GPIO_R = crate::R<bool, bool>;
327#[doc = "Write proxy for field `GPIO`"]
328pub struct GPIO_W<'a> {
329    w: &'a mut W,
330}
331impl<'a> GPIO_W<'a> {
332    #[doc = r"Sets the field bit"]
333    #[inline(always)]
334    pub fn set_bit(self) -> &'a mut W {
335        self.bit(true)
336    }
337    #[doc = r"Clears the field bit"]
338    #[inline(always)]
339    pub fn clear_bit(self) -> &'a mut W {
340        self.bit(false)
341    }
342    #[doc = r"Writes raw bits to the field"]
343    #[inline(always)]
344    pub fn bit(self, value: bool) -> &'a mut W {
345        self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17);
346        self.w
347    }
348}
349#[doc = "Reader of field `I2C0`"]
350pub type I2C0_R = crate::R<bool, bool>;
351#[doc = "Write proxy for field `I2C0`"]
352pub struct I2C0_W<'a> {
353    w: &'a mut W,
354}
355impl<'a> I2C0_W<'a> {
356    #[doc = r"Sets the field bit"]
357    #[inline(always)]
358    pub fn set_bit(self) -> &'a mut W {
359        self.bit(true)
360    }
361    #[doc = r"Clears the field bit"]
362    #[inline(always)]
363    pub fn clear_bit(self) -> &'a mut W {
364        self.bit(false)
365    }
366    #[doc = r"Writes raw bits to the field"]
367    #[inline(always)]
368    pub fn bit(self, value: bool) -> &'a mut W {
369        self.w.bits = (self.w.bits & !(0x01 << 18)) | (((value as u32) & 0x01) << 18);
370        self.w
371    }
372}
373#[doc = "Reader of field `I2C1`"]
374pub type I2C1_R = crate::R<bool, bool>;
375#[doc = "Write proxy for field `I2C1`"]
376pub struct I2C1_W<'a> {
377    w: &'a mut W,
378}
379impl<'a> I2C1_W<'a> {
380    #[doc = r"Sets the field bit"]
381    #[inline(always)]
382    pub fn set_bit(self) -> &'a mut W {
383        self.bit(true)
384    }
385    #[doc = r"Clears the field bit"]
386    #[inline(always)]
387    pub fn clear_bit(self) -> &'a mut W {
388        self.bit(false)
389    }
390    #[doc = r"Writes raw bits to the field"]
391    #[inline(always)]
392    pub fn bit(self, value: bool) -> &'a mut W {
393        self.w.bits = (self.w.bits & !(0x01 << 19)) | (((value as u32) & 0x01) << 19);
394        self.w
395    }
396}
397#[doc = "Reader of field `IDAC0`"]
398pub type IDAC0_R = crate::R<bool, bool>;
399#[doc = "Write proxy for field `IDAC0`"]
400pub struct IDAC0_W<'a> {
401    w: &'a mut W,
402}
403impl<'a> IDAC0_W<'a> {
404    #[doc = r"Sets the field bit"]
405    #[inline(always)]
406    pub fn set_bit(self) -> &'a mut W {
407        self.bit(true)
408    }
409    #[doc = r"Clears the field bit"]
410    #[inline(always)]
411    pub fn clear_bit(self) -> &'a mut W {
412        self.bit(false)
413    }
414    #[doc = r"Writes raw bits to the field"]
415    #[inline(always)]
416    pub fn bit(self, value: bool) -> &'a mut W {
417        self.w.bits = (self.w.bits & !(0x01 << 20)) | (((value as u32) & 0x01) << 20);
418        self.w
419    }
420}
421#[doc = "Reader of field `MSC`"]
422pub type MSC_R = crate::R<bool, bool>;
423#[doc = "Write proxy for field `MSC`"]
424pub struct MSC_W<'a> {
425    w: &'a mut W,
426}
427impl<'a> MSC_W<'a> {
428    #[doc = r"Sets the field bit"]
429    #[inline(always)]
430    pub fn set_bit(self) -> &'a mut W {
431        self.bit(true)
432    }
433    #[doc = r"Clears the field bit"]
434    #[inline(always)]
435    pub fn clear_bit(self) -> &'a mut W {
436        self.bit(false)
437    }
438    #[doc = r"Writes raw bits to the field"]
439    #[inline(always)]
440    pub fn bit(self, value: bool) -> &'a mut W {
441        self.w.bits = (self.w.bits & !(0x01 << 21)) | (((value as u32) & 0x01) << 21);
442        self.w
443    }
444}
445#[doc = "Reader of field `LDMA`"]
446pub type LDMA_R = crate::R<bool, bool>;
447#[doc = "Write proxy for field `LDMA`"]
448pub struct LDMA_W<'a> {
449    w: &'a mut W,
450}
451impl<'a> LDMA_W<'a> {
452    #[doc = r"Sets the field bit"]
453    #[inline(always)]
454    pub fn set_bit(self) -> &'a mut W {
455        self.bit(true)
456    }
457    #[doc = r"Clears the field bit"]
458    #[inline(always)]
459    pub fn clear_bit(self) -> &'a mut W {
460        self.bit(false)
461    }
462    #[doc = r"Writes raw bits to the field"]
463    #[inline(always)]
464    pub fn bit(self, value: bool) -> &'a mut W {
465        self.w.bits = (self.w.bits & !(0x01 << 22)) | (((value as u32) & 0x01) << 22);
466        self.w
467    }
468}
469#[doc = "Reader of field `LESENSE`"]
470pub type LESENSE_R = crate::R<bool, bool>;
471#[doc = "Write proxy for field `LESENSE`"]
472pub struct LESENSE_W<'a> {
473    w: &'a mut W,
474}
475impl<'a> LESENSE_W<'a> {
476    #[doc = r"Sets the field bit"]
477    #[inline(always)]
478    pub fn set_bit(self) -> &'a mut W {
479        self.bit(true)
480    }
481    #[doc = r"Clears the field bit"]
482    #[inline(always)]
483    pub fn clear_bit(self) -> &'a mut W {
484        self.bit(false)
485    }
486    #[doc = r"Writes raw bits to the field"]
487    #[inline(always)]
488    pub fn bit(self, value: bool) -> &'a mut W {
489        self.w.bits = (self.w.bits & !(0x01 << 23)) | (((value as u32) & 0x01) << 23);
490        self.w
491    }
492}
493#[doc = "Reader of field `LETIMER0`"]
494pub type LETIMER0_R = crate::R<bool, bool>;
495#[doc = "Write proxy for field `LETIMER0`"]
496pub struct LETIMER0_W<'a> {
497    w: &'a mut W,
498}
499impl<'a> LETIMER0_W<'a> {
500    #[doc = r"Sets the field bit"]
501    #[inline(always)]
502    pub fn set_bit(self) -> &'a mut W {
503        self.bit(true)
504    }
505    #[doc = r"Clears the field bit"]
506    #[inline(always)]
507    pub fn clear_bit(self) -> &'a mut W {
508        self.bit(false)
509    }
510    #[doc = r"Writes raw bits to the field"]
511    #[inline(always)]
512    pub fn bit(self, value: bool) -> &'a mut W {
513        self.w.bits = (self.w.bits & !(0x01 << 24)) | (((value as u32) & 0x01) << 24);
514        self.w
515    }
516}
517#[doc = "Reader of field `LEUART0`"]
518pub type LEUART0_R = crate::R<bool, bool>;
519#[doc = "Write proxy for field `LEUART0`"]
520pub struct LEUART0_W<'a> {
521    w: &'a mut W,
522}
523impl<'a> LEUART0_W<'a> {
524    #[doc = r"Sets the field bit"]
525    #[inline(always)]
526    pub fn set_bit(self) -> &'a mut W {
527        self.bit(true)
528    }
529    #[doc = r"Clears the field bit"]
530    #[inline(always)]
531    pub fn clear_bit(self) -> &'a mut W {
532        self.bit(false)
533    }
534    #[doc = r"Writes raw bits to the field"]
535    #[inline(always)]
536    pub fn bit(self, value: bool) -> &'a mut W {
537        self.w.bits = (self.w.bits & !(0x01 << 25)) | (((value as u32) & 0x01) << 25);
538        self.w
539    }
540}
541#[doc = "Reader of field `PCNT0`"]
542pub type PCNT0_R = crate::R<bool, bool>;
543#[doc = "Write proxy for field `PCNT0`"]
544pub struct PCNT0_W<'a> {
545    w: &'a mut W,
546}
547impl<'a> PCNT0_W<'a> {
548    #[doc = r"Sets the field bit"]
549    #[inline(always)]
550    pub fn set_bit(self) -> &'a mut W {
551        self.bit(true)
552    }
553    #[doc = r"Clears the field bit"]
554    #[inline(always)]
555    pub fn clear_bit(self) -> &'a mut W {
556        self.bit(false)
557    }
558    #[doc = r"Writes raw bits to the field"]
559    #[inline(always)]
560    pub fn bit(self, value: bool) -> &'a mut W {
561        self.w.bits = (self.w.bits & !(0x01 << 27)) | (((value as u32) & 0x01) << 27);
562        self.w
563    }
564}
565#[doc = "Reader of field `PCNT1`"]
566pub type PCNT1_R = crate::R<bool, bool>;
567#[doc = "Write proxy for field `PCNT1`"]
568pub struct PCNT1_W<'a> {
569    w: &'a mut W,
570}
571impl<'a> PCNT1_W<'a> {
572    #[doc = r"Sets the field bit"]
573    #[inline(always)]
574    pub fn set_bit(self) -> &'a mut W {
575        self.bit(true)
576    }
577    #[doc = r"Clears the field bit"]
578    #[inline(always)]
579    pub fn clear_bit(self) -> &'a mut W {
580        self.bit(false)
581    }
582    #[doc = r"Writes raw bits to the field"]
583    #[inline(always)]
584    pub fn bit(self, value: bool) -> &'a mut W {
585        self.w.bits = (self.w.bits & !(0x01 << 28)) | (((value as u32) & 0x01) << 28);
586        self.w
587    }
588}
589#[doc = "Reader of field `PCNT2`"]
590pub type PCNT2_R = crate::R<bool, bool>;
591#[doc = "Write proxy for field `PCNT2`"]
592pub struct PCNT2_W<'a> {
593    w: &'a mut W,
594}
595impl<'a> PCNT2_W<'a> {
596    #[doc = r"Sets the field bit"]
597    #[inline(always)]
598    pub fn set_bit(self) -> &'a mut W {
599        self.bit(true)
600    }
601    #[doc = r"Clears the field bit"]
602    #[inline(always)]
603    pub fn clear_bit(self) -> &'a mut W {
604        self.bit(false)
605    }
606    #[doc = r"Writes raw bits to the field"]
607    #[inline(always)]
608    pub fn bit(self, value: bool) -> &'a mut W {
609        self.w.bits = (self.w.bits & !(0x01 << 29)) | (((value as u32) & 0x01) << 29);
610        self.w
611    }
612}
613impl R {
614    #[doc = "Bit 0 - Analog Comparator 0 access control bit"]
615    #[inline(always)]
616    pub fn acmp0(&self) -> ACMP0_R {
617        ACMP0_R::new((self.bits & 0x01) != 0)
618    }
619    #[doc = "Bit 1 - Analog Comparator 1 access control bit"]
620    #[inline(always)]
621    pub fn acmp1(&self) -> ACMP1_R {
622        ACMP1_R::new(((self.bits >> 1) & 0x01) != 0)
623    }
624    #[doc = "Bit 2 - Analog to Digital Converter 0 access control bit"]
625    #[inline(always)]
626    pub fn adc0(&self) -> ADC0_R {
627        ADC0_R::new(((self.bits >> 2) & 0x01) != 0)
628    }
629    #[doc = "Bit 5 - Clock Management Unit access control bit"]
630    #[inline(always)]
631    pub fn cmu(&self) -> CMU_R {
632        CMU_R::new(((self.bits >> 5) & 0x01) != 0)
633    }
634    #[doc = "Bit 7 - CRYOTIMER access control bit"]
635    #[inline(always)]
636    pub fn cryotimer(&self) -> CRYOTIMER_R {
637        CRYOTIMER_R::new(((self.bits >> 7) & 0x01) != 0)
638    }
639    #[doc = "Bit 8 - Advanced Encryption Standard Accelerator 0 access control bit"]
640    #[inline(always)]
641    pub fn crypto0(&self) -> CRYPTO0_R {
642        CRYPTO0_R::new(((self.bits >> 8) & 0x01) != 0)
643    }
644    #[doc = "Bit 9 - Advanced Encryption Standard Accelerator 1 access control bit"]
645    #[inline(always)]
646    pub fn crypto1(&self) -> CRYPTO1_R {
647        CRYPTO1_R::new(((self.bits >> 9) & 0x01) != 0)
648    }
649    #[doc = "Bit 10 - Capacitive touch sense module access control bit"]
650    #[inline(always)]
651    pub fn csen(&self) -> CSEN_R {
652        CSEN_R::new(((self.bits >> 10) & 0x01) != 0)
653    }
654    #[doc = "Bit 11 - Digital to Analog Converter 0 access control bit"]
655    #[inline(always)]
656    pub fn vdac0(&self) -> VDAC0_R {
657        VDAC0_R::new(((self.bits >> 11) & 0x01) != 0)
658    }
659    #[doc = "Bit 12 - Peripheral Reflex System access control bit"]
660    #[inline(always)]
661    pub fn prs(&self) -> PRS_R {
662        PRS_R::new(((self.bits >> 12) & 0x01) != 0)
663    }
664    #[doc = "Bit 13 - Energy Management Unit access control bit"]
665    #[inline(always)]
666    pub fn emu(&self) -> EMU_R {
667        EMU_R::new(((self.bits >> 13) & 0x01) != 0)
668    }
669    #[doc = "Bit 14 - FPU Exception Handler access control bit"]
670    #[inline(always)]
671    pub fn fpueh(&self) -> FPUEH_R {
672        FPUEH_R::new(((self.bits >> 14) & 0x01) != 0)
673    }
674    #[doc = "Bit 16 - General Purpose CRC access control bit"]
675    #[inline(always)]
676    pub fn gpcrc(&self) -> GPCRC_R {
677        GPCRC_R::new(((self.bits >> 16) & 0x01) != 0)
678    }
679    #[doc = "Bit 17 - General purpose Input/Output access control bit"]
680    #[inline(always)]
681    pub fn gpio(&self) -> GPIO_R {
682        GPIO_R::new(((self.bits >> 17) & 0x01) != 0)
683    }
684    #[doc = "Bit 18 - I2C 0 access control bit"]
685    #[inline(always)]
686    pub fn i2c0(&self) -> I2C0_R {
687        I2C0_R::new(((self.bits >> 18) & 0x01) != 0)
688    }
689    #[doc = "Bit 19 - I2C 1 access control bit"]
690    #[inline(always)]
691    pub fn i2c1(&self) -> I2C1_R {
692        I2C1_R::new(((self.bits >> 19) & 0x01) != 0)
693    }
694    #[doc = "Bit 20 - Current Digital to Analog Converter 0 access control bit"]
695    #[inline(always)]
696    pub fn idac0(&self) -> IDAC0_R {
697        IDAC0_R::new(((self.bits >> 20) & 0x01) != 0)
698    }
699    #[doc = "Bit 21 - Memory System Controller access control bit"]
700    #[inline(always)]
701    pub fn msc(&self) -> MSC_R {
702        MSC_R::new(((self.bits >> 21) & 0x01) != 0)
703    }
704    #[doc = "Bit 22 - Linked Direct Memory Access Controller access control bit"]
705    #[inline(always)]
706    pub fn ldma(&self) -> LDMA_R {
707        LDMA_R::new(((self.bits >> 22) & 0x01) != 0)
708    }
709    #[doc = "Bit 23 - Low Energy Sensor Interface access control bit"]
710    #[inline(always)]
711    pub fn lesense(&self) -> LESENSE_R {
712        LESENSE_R::new(((self.bits >> 23) & 0x01) != 0)
713    }
714    #[doc = "Bit 24 - Low Energy Timer 0 access control bit"]
715    #[inline(always)]
716    pub fn letimer0(&self) -> LETIMER0_R {
717        LETIMER0_R::new(((self.bits >> 24) & 0x01) != 0)
718    }
719    #[doc = "Bit 25 - Low Energy UART 0 access control bit"]
720    #[inline(always)]
721    pub fn leuart0(&self) -> LEUART0_R {
722        LEUART0_R::new(((self.bits >> 25) & 0x01) != 0)
723    }
724    #[doc = "Bit 27 - Pulse Counter 0 access control bit"]
725    #[inline(always)]
726    pub fn pcnt0(&self) -> PCNT0_R {
727        PCNT0_R::new(((self.bits >> 27) & 0x01) != 0)
728    }
729    #[doc = "Bit 28 - Pulse Counter 1 access control bit"]
730    #[inline(always)]
731    pub fn pcnt1(&self) -> PCNT1_R {
732        PCNT1_R::new(((self.bits >> 28) & 0x01) != 0)
733    }
734    #[doc = "Bit 29 - Pulse Counter 2 access control bit"]
735    #[inline(always)]
736    pub fn pcnt2(&self) -> PCNT2_R {
737        PCNT2_R::new(((self.bits >> 29) & 0x01) != 0)
738    }
739}
740impl W {
741    #[doc = "Bit 0 - Analog Comparator 0 access control bit"]
742    #[inline(always)]
743    pub fn acmp0(&mut self) -> ACMP0_W {
744        ACMP0_W { w: self }
745    }
746    #[doc = "Bit 1 - Analog Comparator 1 access control bit"]
747    #[inline(always)]
748    pub fn acmp1(&mut self) -> ACMP1_W {
749        ACMP1_W { w: self }
750    }
751    #[doc = "Bit 2 - Analog to Digital Converter 0 access control bit"]
752    #[inline(always)]
753    pub fn adc0(&mut self) -> ADC0_W {
754        ADC0_W { w: self }
755    }
756    #[doc = "Bit 5 - Clock Management Unit access control bit"]
757    #[inline(always)]
758    pub fn cmu(&mut self) -> CMU_W {
759        CMU_W { w: self }
760    }
761    #[doc = "Bit 7 - CRYOTIMER access control bit"]
762    #[inline(always)]
763    pub fn cryotimer(&mut self) -> CRYOTIMER_W {
764        CRYOTIMER_W { w: self }
765    }
766    #[doc = "Bit 8 - Advanced Encryption Standard Accelerator 0 access control bit"]
767    #[inline(always)]
768    pub fn crypto0(&mut self) -> CRYPTO0_W {
769        CRYPTO0_W { w: self }
770    }
771    #[doc = "Bit 9 - Advanced Encryption Standard Accelerator 1 access control bit"]
772    #[inline(always)]
773    pub fn crypto1(&mut self) -> CRYPTO1_W {
774        CRYPTO1_W { w: self }
775    }
776    #[doc = "Bit 10 - Capacitive touch sense module access control bit"]
777    #[inline(always)]
778    pub fn csen(&mut self) -> CSEN_W {
779        CSEN_W { w: self }
780    }
781    #[doc = "Bit 11 - Digital to Analog Converter 0 access control bit"]
782    #[inline(always)]
783    pub fn vdac0(&mut self) -> VDAC0_W {
784        VDAC0_W { w: self }
785    }
786    #[doc = "Bit 12 - Peripheral Reflex System access control bit"]
787    #[inline(always)]
788    pub fn prs(&mut self) -> PRS_W {
789        PRS_W { w: self }
790    }
791    #[doc = "Bit 13 - Energy Management Unit access control bit"]
792    #[inline(always)]
793    pub fn emu(&mut self) -> EMU_W {
794        EMU_W { w: self }
795    }
796    #[doc = "Bit 14 - FPU Exception Handler access control bit"]
797    #[inline(always)]
798    pub fn fpueh(&mut self) -> FPUEH_W {
799        FPUEH_W { w: self }
800    }
801    #[doc = "Bit 16 - General Purpose CRC access control bit"]
802    #[inline(always)]
803    pub fn gpcrc(&mut self) -> GPCRC_W {
804        GPCRC_W { w: self }
805    }
806    #[doc = "Bit 17 - General purpose Input/Output access control bit"]
807    #[inline(always)]
808    pub fn gpio(&mut self) -> GPIO_W {
809        GPIO_W { w: self }
810    }
811    #[doc = "Bit 18 - I2C 0 access control bit"]
812    #[inline(always)]
813    pub fn i2c0(&mut self) -> I2C0_W {
814        I2C0_W { w: self }
815    }
816    #[doc = "Bit 19 - I2C 1 access control bit"]
817    #[inline(always)]
818    pub fn i2c1(&mut self) -> I2C1_W {
819        I2C1_W { w: self }
820    }
821    #[doc = "Bit 20 - Current Digital to Analog Converter 0 access control bit"]
822    #[inline(always)]
823    pub fn idac0(&mut self) -> IDAC0_W {
824        IDAC0_W { w: self }
825    }
826    #[doc = "Bit 21 - Memory System Controller access control bit"]
827    #[inline(always)]
828    pub fn msc(&mut self) -> MSC_W {
829        MSC_W { w: self }
830    }
831    #[doc = "Bit 22 - Linked Direct Memory Access Controller access control bit"]
832    #[inline(always)]
833    pub fn ldma(&mut self) -> LDMA_W {
834        LDMA_W { w: self }
835    }
836    #[doc = "Bit 23 - Low Energy Sensor Interface access control bit"]
837    #[inline(always)]
838    pub fn lesense(&mut self) -> LESENSE_W {
839        LESENSE_W { w: self }
840    }
841    #[doc = "Bit 24 - Low Energy Timer 0 access control bit"]
842    #[inline(always)]
843    pub fn letimer0(&mut self) -> LETIMER0_W {
844        LETIMER0_W { w: self }
845    }
846    #[doc = "Bit 25 - Low Energy UART 0 access control bit"]
847    #[inline(always)]
848    pub fn leuart0(&mut self) -> LEUART0_W {
849        LEUART0_W { w: self }
850    }
851    #[doc = "Bit 27 - Pulse Counter 0 access control bit"]
852    #[inline(always)]
853    pub fn pcnt0(&mut self) -> PCNT0_W {
854        PCNT0_W { w: self }
855    }
856    #[doc = "Bit 28 - Pulse Counter 1 access control bit"]
857    #[inline(always)]
858    pub fn pcnt1(&mut self) -> PCNT1_W {
859        PCNT1_W { w: self }
860    }
861    #[doc = "Bit 29 - Pulse Counter 2 access control bit"]
862    #[inline(always)]
863    pub fn pcnt2(&mut self) -> PCNT2_W {
864        PCNT2_W { w: self }
865    }
866}
efm32pg12_pac/smu/ppupatd0.rs

efm32pg12_pac/smu/
ppupatd0.rs
