efm32pg12_pac/msc/
writectrl.rs

1#[doc = "Reader of register WRITECTRL"]
2pub type R = crate::R<u32, super::WRITECTRL>;
3#[doc = "Writer for register WRITECTRL"]
4pub type W = crate::W<u32, super::WRITECTRL>;
5#[doc = "Register WRITECTRL `reset()`'s with value 0"]
6impl crate::ResetValue for super::WRITECTRL {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "Reader of field `WREN`"]
14pub type WREN_R = crate::R<bool, bool>;
15#[doc = "Write proxy for field `WREN`"]
16pub struct WREN_W<'a> {
17    w: &'a mut W,
18}
19impl<'a> WREN_W<'a> {
20    #[doc = r"Sets the field bit"]
21    #[inline(always)]
22    pub fn set_bit(self) -> &'a mut W {
23        self.bit(true)
24    }
25    #[doc = r"Clears the field bit"]
26    #[inline(always)]
27    pub fn clear_bit(self) -> &'a mut W {
28        self.bit(false)
29    }
30    #[doc = r"Writes raw bits to the field"]
31    #[inline(always)]
32    pub fn bit(self, value: bool) -> &'a mut W {
33        self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
34        self.w
35    }
36}
37#[doc = "Reader of field `IRQERASEABORT`"]
38pub type IRQERASEABORT_R = crate::R<bool, bool>;
39#[doc = "Write proxy for field `IRQERASEABORT`"]
40pub struct IRQERASEABORT_W<'a> {
41    w: &'a mut W,
42}
43impl<'a> IRQERASEABORT_W<'a> {
44    #[doc = r"Sets the field bit"]
45    #[inline(always)]
46    pub fn set_bit(self) -> &'a mut W {
47        self.bit(true)
48    }
49    #[doc = r"Clears the field bit"]
50    #[inline(always)]
51    pub fn clear_bit(self) -> &'a mut W {
52        self.bit(false)
53    }
54    #[doc = r"Writes raw bits to the field"]
55    #[inline(always)]
56    pub fn bit(self, value: bool) -> &'a mut W {
57        self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
58        self.w
59    }
60}
61#[doc = "Reader of field `RWWEN`"]
62pub type RWWEN_R = crate::R<bool, bool>;
63#[doc = "Write proxy for field `RWWEN`"]
64pub struct RWWEN_W<'a> {
65    w: &'a mut W,
66}
67impl<'a> RWWEN_W<'a> {
68    #[doc = r"Sets the field bit"]
69    #[inline(always)]
70    pub fn set_bit(self) -> &'a mut W {
71        self.bit(true)
72    }
73    #[doc = r"Clears the field bit"]
74    #[inline(always)]
75    pub fn clear_bit(self) -> &'a mut W {
76        self.bit(false)
77    }
78    #[doc = r"Writes raw bits to the field"]
79    #[inline(always)]
80    pub fn bit(self, value: bool) -> &'a mut W {
81        self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5);
82        self.w
83    }
84}
85impl R {
86    #[doc = "Bit 0 - Enable Write/Erase Controller"]
87    #[inline(always)]
88    pub fn wren(&self) -> WREN_R {
89        WREN_R::new((self.bits & 0x01) != 0)
90    }
91    #[doc = "Bit 1 - Abort Page Erase on Interrupt"]
92    #[inline(always)]
93    pub fn irqeraseabort(&self) -> IRQERASEABORT_R {
94        IRQERASEABORT_R::new(((self.bits >> 1) & 0x01) != 0)
95    }
96    #[doc = "Bit 5 - Read-While-Write Enable"]
97    #[inline(always)]
98    pub fn rwwen(&self) -> RWWEN_R {
99        RWWEN_R::new(((self.bits >> 5) & 0x01) != 0)
100    }
101}
102impl W {
103    #[doc = "Bit 0 - Enable Write/Erase Controller"]
104    #[inline(always)]
105    pub fn wren(&mut self) -> WREN_W {
106        WREN_W { w: self }
107    }
108    #[doc = "Bit 1 - Abort Page Erase on Interrupt"]
109    #[inline(always)]
110    pub fn irqeraseabort(&mut self) -> IRQERASEABORT_W {
111        IRQERASEABORT_W { w: self }
112    }
113    #[doc = "Bit 5 - Read-While-Write Enable"]
114    #[inline(always)]
115    pub fn rwwen(&mut self) -> RWWEN_W {
116        RWWEN_W { w: self }
117    }
118}
efm32pg12_pac/msc/writectrl.rs

efm32pg12_pac/msc/
writectrl.rs
