efm32pg12_pac/leuart0/
pulsectrl.rs

1#[doc = "Reader of register PULSECTRL"]
2pub type R = crate::R<u32, super::PULSECTRL>;
3#[doc = "Writer for register PULSECTRL"]
4pub type W = crate::W<u32, super::PULSECTRL>;
5#[doc = "Register PULSECTRL `reset()`'s with value 0"]
6impl crate::ResetValue for super::PULSECTRL {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "Reader of field `PULSEW`"]
14pub type PULSEW_R = crate::R<u8, u8>;
15#[doc = "Write proxy for field `PULSEW`"]
16pub struct PULSEW_W<'a> {
17    w: &'a mut W,
18}
19impl<'a> PULSEW_W<'a> {
20    #[doc = r"Writes raw bits to the field"]
21    #[inline(always)]
22    pub unsafe fn bits(self, value: u8) -> &'a mut W {
23        self.w.bits = (self.w.bits & !0x0f) | ((value as u32) & 0x0f);
24        self.w
25    }
26}
27#[doc = "Reader of field `PULSEEN`"]
28pub type PULSEEN_R = crate::R<bool, bool>;
29#[doc = "Write proxy for field `PULSEEN`"]
30pub struct PULSEEN_W<'a> {
31    w: &'a mut W,
32}
33impl<'a> PULSEEN_W<'a> {
34    #[doc = r"Sets the field bit"]
35    #[inline(always)]
36    pub fn set_bit(self) -> &'a mut W {
37        self.bit(true)
38    }
39    #[doc = r"Clears the field bit"]
40    #[inline(always)]
41    pub fn clear_bit(self) -> &'a mut W {
42        self.bit(false)
43    }
44    #[doc = r"Writes raw bits to the field"]
45    #[inline(always)]
46    pub fn bit(self, value: bool) -> &'a mut W {
47        self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4);
48        self.w
49    }
50}
51#[doc = "Reader of field `PULSEFILT`"]
52pub type PULSEFILT_R = crate::R<bool, bool>;
53#[doc = "Write proxy for field `PULSEFILT`"]
54pub struct PULSEFILT_W<'a> {
55    w: &'a mut W,
56}
57impl<'a> PULSEFILT_W<'a> {
58    #[doc = r"Sets the field bit"]
59    #[inline(always)]
60    pub fn set_bit(self) -> &'a mut W {
61        self.bit(true)
62    }
63    #[doc = r"Clears the field bit"]
64    #[inline(always)]
65    pub fn clear_bit(self) -> &'a mut W {
66        self.bit(false)
67    }
68    #[doc = r"Writes raw bits to the field"]
69    #[inline(always)]
70    pub fn bit(self, value: bool) -> &'a mut W {
71        self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5);
72        self.w
73    }
74}
75impl R {
76    #[doc = "Bits 0:3 - Pulse Width"]
77    #[inline(always)]
78    pub fn pulsew(&self) -> PULSEW_R {
79        PULSEW_R::new((self.bits & 0x0f) as u8)
80    }
81    #[doc = "Bit 4 - Pulse Generator/Extender Enable"]
82    #[inline(always)]
83    pub fn pulseen(&self) -> PULSEEN_R {
84        PULSEEN_R::new(((self.bits >> 4) & 0x01) != 0)
85    }
86    #[doc = "Bit 5 - Pulse Filter"]
87    #[inline(always)]
88    pub fn pulsefilt(&self) -> PULSEFILT_R {
89        PULSEFILT_R::new(((self.bits >> 5) & 0x01) != 0)
90    }
91}
92impl W {
93    #[doc = "Bits 0:3 - Pulse Width"]
94    #[inline(always)]
95    pub fn pulsew(&mut self) -> PULSEW_W {
96        PULSEW_W { w: self }
97    }
98    #[doc = "Bit 4 - Pulse Generator/Extender Enable"]
99    #[inline(always)]
100    pub fn pulseen(&mut self) -> PULSEEN_W {
101        PULSEEN_W { w: self }
102    }
103    #[doc = "Bit 5 - Pulse Filter"]
104    #[inline(always)]
105    pub fn pulsefilt(&mut self) -> PULSEFILT_W {
106        PULSEFILT_W { w: self }
107    }
108}
efm32pg12_pac/leuart0/pulsectrl.rs

efm32pg12_pac/leuart0/
pulsectrl.rs
