efm32pg12_pac/leuart0/
ctrl.rs

1#[doc = "Reader of register CTRL"]
2pub type R = crate::R<u32, super::CTRL>;
3#[doc = "Writer for register CTRL"]
4pub type W = crate::W<u32, super::CTRL>;
5#[doc = "Register CTRL `reset()`'s with value 0"]
6impl crate::ResetValue for super::CTRL {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "Reader of field `AUTOTRI`"]
14pub type AUTOTRI_R = crate::R<bool, bool>;
15#[doc = "Write proxy for field `AUTOTRI`"]
16pub struct AUTOTRI_W<'a> {
17    w: &'a mut W,
18}
19impl<'a> AUTOTRI_W<'a> {
20    #[doc = r"Sets the field bit"]
21    #[inline(always)]
22    pub fn set_bit(self) -> &'a mut W {
23        self.bit(true)
24    }
25    #[doc = r"Clears the field bit"]
26    #[inline(always)]
27    pub fn clear_bit(self) -> &'a mut W {
28        self.bit(false)
29    }
30    #[doc = r"Writes raw bits to the field"]
31    #[inline(always)]
32    pub fn bit(self, value: bool) -> &'a mut W {
33        self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
34        self.w
35    }
36}
37#[doc = "Reader of field `DATABITS`"]
38pub type DATABITS_R = crate::R<bool, bool>;
39#[doc = "Write proxy for field `DATABITS`"]
40pub struct DATABITS_W<'a> {
41    w: &'a mut W,
42}
43impl<'a> DATABITS_W<'a> {
44    #[doc = r"Sets the field bit"]
45    #[inline(always)]
46    pub fn set_bit(self) -> &'a mut W {
47        self.bit(true)
48    }
49    #[doc = r"Clears the field bit"]
50    #[inline(always)]
51    pub fn clear_bit(self) -> &'a mut W {
52        self.bit(false)
53    }
54    #[doc = r"Writes raw bits to the field"]
55    #[inline(always)]
56    pub fn bit(self, value: bool) -> &'a mut W {
57        self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
58        self.w
59    }
60}
61#[doc = "Parity-Bit Mode\n\nValue on reset: 0"]
62#[derive(Clone, Copy, Debug, PartialEq)]
63#[repr(u8)]
64pub enum PARITY_A {
65    #[doc = "0: Parity bits are not used"]
66    NONE = 0,
67    #[doc = "2: Even parity are used. Parity bits are automatically generated and checked by hardware."]
68    EVEN = 2,
69    #[doc = "3: Odd parity is used. Parity bits are automatically generated and checked by hardware."]
70    ODD = 3,
71}
72impl From<PARITY_A> for u8 {
73    #[inline(always)]
74    fn from(variant: PARITY_A) -> Self {
75        variant as _
76    }
77}
78#[doc = "Reader of field `PARITY`"]
79pub type PARITY_R = crate::R<u8, PARITY_A>;
80impl PARITY_R {
81    #[doc = r"Get enumerated values variant"]
82    #[inline(always)]
83    pub fn variant(&self) -> crate::Variant<u8, PARITY_A> {
84        use crate::Variant::*;
85        match self.bits {
86            0 => Val(PARITY_A::NONE),
87            2 => Val(PARITY_A::EVEN),
88            3 => Val(PARITY_A::ODD),
89            i => Res(i),
90        }
91    }
92    #[doc = "Checks if the value of the field is `NONE`"]
93    #[inline(always)]
94    pub fn is_none(&self) -> bool {
95        *self == PARITY_A::NONE
96    }
97    #[doc = "Checks if the value of the field is `EVEN`"]
98    #[inline(always)]
99    pub fn is_even(&self) -> bool {
100        *self == PARITY_A::EVEN
101    }
102    #[doc = "Checks if the value of the field is `ODD`"]
103    #[inline(always)]
104    pub fn is_odd(&self) -> bool {
105        *self == PARITY_A::ODD
106    }
107}
108#[doc = "Write proxy for field `PARITY`"]
109pub struct PARITY_W<'a> {
110    w: &'a mut W,
111}
112impl<'a> PARITY_W<'a> {
113    #[doc = r"Writes `variant` to the field"]
114    #[inline(always)]
115    pub fn variant(self, variant: PARITY_A) -> &'a mut W {
116        unsafe { self.bits(variant.into()) }
117    }
118    #[doc = "Parity bits are not used"]
119    #[inline(always)]
120    pub fn none(self) -> &'a mut W {
121        self.variant(PARITY_A::NONE)
122    }
123    #[doc = "Even parity are used. Parity bits are automatically generated and checked by hardware."]
124    #[inline(always)]
125    pub fn even(self) -> &'a mut W {
126        self.variant(PARITY_A::EVEN)
127    }
128    #[doc = "Odd parity is used. Parity bits are automatically generated and checked by hardware."]
129    #[inline(always)]
130    pub fn odd(self) -> &'a mut W {
131        self.variant(PARITY_A::ODD)
132    }
133    #[doc = r"Writes raw bits to the field"]
134    #[inline(always)]
135    pub unsafe fn bits(self, value: u8) -> &'a mut W {
136        self.w.bits = (self.w.bits & !(0x03 << 2)) | (((value as u32) & 0x03) << 2);
137        self.w
138    }
139}
140#[doc = "Reader of field `STOPBITS`"]
141pub type STOPBITS_R = crate::R<bool, bool>;
142#[doc = "Write proxy for field `STOPBITS`"]
143pub struct STOPBITS_W<'a> {
144    w: &'a mut W,
145}
146impl<'a> STOPBITS_W<'a> {
147    #[doc = r"Sets the field bit"]
148    #[inline(always)]
149    pub fn set_bit(self) -> &'a mut W {
150        self.bit(true)
151    }
152    #[doc = r"Clears the field bit"]
153    #[inline(always)]
154    pub fn clear_bit(self) -> &'a mut W {
155        self.bit(false)
156    }
157    #[doc = r"Writes raw bits to the field"]
158    #[inline(always)]
159    pub fn bit(self, value: bool) -> &'a mut W {
160        self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4);
161        self.w
162    }
163}
164#[doc = "Reader of field `INV`"]
165pub type INV_R = crate::R<bool, bool>;
166#[doc = "Write proxy for field `INV`"]
167pub struct INV_W<'a> {
168    w: &'a mut W,
169}
170impl<'a> INV_W<'a> {
171    #[doc = r"Sets the field bit"]
172    #[inline(always)]
173    pub fn set_bit(self) -> &'a mut W {
174        self.bit(true)
175    }
176    #[doc = r"Clears the field bit"]
177    #[inline(always)]
178    pub fn clear_bit(self) -> &'a mut W {
179        self.bit(false)
180    }
181    #[doc = r"Writes raw bits to the field"]
182    #[inline(always)]
183    pub fn bit(self, value: bool) -> &'a mut W {
184        self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5);
185        self.w
186    }
187}
188#[doc = "Reader of field `ERRSDMA`"]
189pub type ERRSDMA_R = crate::R<bool, bool>;
190#[doc = "Write proxy for field `ERRSDMA`"]
191pub struct ERRSDMA_W<'a> {
192    w: &'a mut W,
193}
194impl<'a> ERRSDMA_W<'a> {
195    #[doc = r"Sets the field bit"]
196    #[inline(always)]
197    pub fn set_bit(self) -> &'a mut W {
198        self.bit(true)
199    }
200    #[doc = r"Clears the field bit"]
201    #[inline(always)]
202    pub fn clear_bit(self) -> &'a mut W {
203        self.bit(false)
204    }
205    #[doc = r"Writes raw bits to the field"]
206    #[inline(always)]
207    pub fn bit(self, value: bool) -> &'a mut W {
208        self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u32) & 0x01) << 6);
209        self.w
210    }
211}
212#[doc = "Reader of field `LOOPBK`"]
213pub type LOOPBK_R = crate::R<bool, bool>;
214#[doc = "Write proxy for field `LOOPBK`"]
215pub struct LOOPBK_W<'a> {
216    w: &'a mut W,
217}
218impl<'a> LOOPBK_W<'a> {
219    #[doc = r"Sets the field bit"]
220    #[inline(always)]
221    pub fn set_bit(self) -> &'a mut W {
222        self.bit(true)
223    }
224    #[doc = r"Clears the field bit"]
225    #[inline(always)]
226    pub fn clear_bit(self) -> &'a mut W {
227        self.bit(false)
228    }
229    #[doc = r"Writes raw bits to the field"]
230    #[inline(always)]
231    pub fn bit(self, value: bool) -> &'a mut W {
232        self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7);
233        self.w
234    }
235}
236#[doc = "Reader of field `SFUBRX`"]
237pub type SFUBRX_R = crate::R<bool, bool>;
238#[doc = "Write proxy for field `SFUBRX`"]
239pub struct SFUBRX_W<'a> {
240    w: &'a mut W,
241}
242impl<'a> SFUBRX_W<'a> {
243    #[doc = r"Sets the field bit"]
244    #[inline(always)]
245    pub fn set_bit(self) -> &'a mut W {
246        self.bit(true)
247    }
248    #[doc = r"Clears the field bit"]
249    #[inline(always)]
250    pub fn clear_bit(self) -> &'a mut W {
251        self.bit(false)
252    }
253    #[doc = r"Writes raw bits to the field"]
254    #[inline(always)]
255    pub fn bit(self, value: bool) -> &'a mut W {
256        self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8);
257        self.w
258    }
259}
260#[doc = "Reader of field `MPM`"]
261pub type MPM_R = crate::R<bool, bool>;
262#[doc = "Write proxy for field `MPM`"]
263pub struct MPM_W<'a> {
264    w: &'a mut W,
265}
266impl<'a> MPM_W<'a> {
267    #[doc = r"Sets the field bit"]
268    #[inline(always)]
269    pub fn set_bit(self) -> &'a mut W {
270        self.bit(true)
271    }
272    #[doc = r"Clears the field bit"]
273    #[inline(always)]
274    pub fn clear_bit(self) -> &'a mut W {
275        self.bit(false)
276    }
277    #[doc = r"Writes raw bits to the field"]
278    #[inline(always)]
279    pub fn bit(self, value: bool) -> &'a mut W {
280        self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9);
281        self.w
282    }
283}
284#[doc = "Reader of field `MPAB`"]
285pub type MPAB_R = crate::R<bool, bool>;
286#[doc = "Write proxy for field `MPAB`"]
287pub struct MPAB_W<'a> {
288    w: &'a mut W,
289}
290impl<'a> MPAB_W<'a> {
291    #[doc = r"Sets the field bit"]
292    #[inline(always)]
293    pub fn set_bit(self) -> &'a mut W {
294        self.bit(true)
295    }
296    #[doc = r"Clears the field bit"]
297    #[inline(always)]
298    pub fn clear_bit(self) -> &'a mut W {
299        self.bit(false)
300    }
301    #[doc = r"Writes raw bits to the field"]
302    #[inline(always)]
303    pub fn bit(self, value: bool) -> &'a mut W {
304        self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10);
305        self.w
306    }
307}
308#[doc = "Reader of field `BIT8DV`"]
309pub type BIT8DV_R = crate::R<bool, bool>;
310#[doc = "Write proxy for field `BIT8DV`"]
311pub struct BIT8DV_W<'a> {
312    w: &'a mut W,
313}
314impl<'a> BIT8DV_W<'a> {
315    #[doc = r"Sets the field bit"]
316    #[inline(always)]
317    pub fn set_bit(self) -> &'a mut W {
318        self.bit(true)
319    }
320    #[doc = r"Clears the field bit"]
321    #[inline(always)]
322    pub fn clear_bit(self) -> &'a mut W {
323        self.bit(false)
324    }
325    #[doc = r"Writes raw bits to the field"]
326    #[inline(always)]
327    pub fn bit(self, value: bool) -> &'a mut W {
328        self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11);
329        self.w
330    }
331}
332#[doc = "Reader of field `RXDMAWU`"]
333pub type RXDMAWU_R = crate::R<bool, bool>;
334#[doc = "Write proxy for field `RXDMAWU`"]
335pub struct RXDMAWU_W<'a> {
336    w: &'a mut W,
337}
338impl<'a> RXDMAWU_W<'a> {
339    #[doc = r"Sets the field bit"]
340    #[inline(always)]
341    pub fn set_bit(self) -> &'a mut W {
342        self.bit(true)
343    }
344    #[doc = r"Clears the field bit"]
345    #[inline(always)]
346    pub fn clear_bit(self) -> &'a mut W {
347        self.bit(false)
348    }
349    #[doc = r"Writes raw bits to the field"]
350    #[inline(always)]
351    pub fn bit(self, value: bool) -> &'a mut W {
352        self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u32) & 0x01) << 12);
353        self.w
354    }
355}
356#[doc = "Reader of field `TXDMAWU`"]
357pub type TXDMAWU_R = crate::R<bool, bool>;
358#[doc = "Write proxy for field `TXDMAWU`"]
359pub struct TXDMAWU_W<'a> {
360    w: &'a mut W,
361}
362impl<'a> TXDMAWU_W<'a> {
363    #[doc = r"Sets the field bit"]
364    #[inline(always)]
365    pub fn set_bit(self) -> &'a mut W {
366        self.bit(true)
367    }
368    #[doc = r"Clears the field bit"]
369    #[inline(always)]
370    pub fn clear_bit(self) -> &'a mut W {
371        self.bit(false)
372    }
373    #[doc = r"Writes raw bits to the field"]
374    #[inline(always)]
375    pub fn bit(self, value: bool) -> &'a mut W {
376        self.w.bits = (self.w.bits & !(0x01 << 13)) | (((value as u32) & 0x01) << 13);
377        self.w
378    }
379}
380#[doc = "TX Delay Transmission\n\nValue on reset: 0"]
381#[derive(Clone, Copy, Debug, PartialEq)]
382#[repr(u8)]
383pub enum TXDELAY_A {
384    #[doc = "0: Frames are transmitted immediately"]
385    NONE = 0,
386    #[doc = "1: Transmission of new frames are delayed by a single bit period"]
387    SINGLE = 1,
388    #[doc = "2: Transmission of new frames are delayed by two bit periods"]
389    DOUBLE = 2,
390    #[doc = "3: Transmission of new frames are delayed by three bit periods"]
391    TRIPLE = 3,
392}
393impl From<TXDELAY_A> for u8 {
394    #[inline(always)]
395    fn from(variant: TXDELAY_A) -> Self {
396        variant as _
397    }
398}
399#[doc = "Reader of field `TXDELAY`"]
400pub type TXDELAY_R = crate::R<u8, TXDELAY_A>;
401impl TXDELAY_R {
402    #[doc = r"Get enumerated values variant"]
403    #[inline(always)]
404    pub fn variant(&self) -> TXDELAY_A {
405        match self.bits {
406            0 => TXDELAY_A::NONE,
407            1 => TXDELAY_A::SINGLE,
408            2 => TXDELAY_A::DOUBLE,
409            3 => TXDELAY_A::TRIPLE,
410            _ => unreachable!(),
411        }
412    }
413    #[doc = "Checks if the value of the field is `NONE`"]
414    #[inline(always)]
415    pub fn is_none(&self) -> bool {
416        *self == TXDELAY_A::NONE
417    }
418    #[doc = "Checks if the value of the field is `SINGLE`"]
419    #[inline(always)]
420    pub fn is_single(&self) -> bool {
421        *self == TXDELAY_A::SINGLE
422    }
423    #[doc = "Checks if the value of the field is `DOUBLE`"]
424    #[inline(always)]
425    pub fn is_double(&self) -> bool {
426        *self == TXDELAY_A::DOUBLE
427    }
428    #[doc = "Checks if the value of the field is `TRIPLE`"]
429    #[inline(always)]
430    pub fn is_triple(&self) -> bool {
431        *self == TXDELAY_A::TRIPLE
432    }
433}
434#[doc = "Write proxy for field `TXDELAY`"]
435pub struct TXDELAY_W<'a> {
436    w: &'a mut W,
437}
438impl<'a> TXDELAY_W<'a> {
439    #[doc = r"Writes `variant` to the field"]
440    #[inline(always)]
441    pub fn variant(self, variant: TXDELAY_A) -> &'a mut W {
442        {
443            self.bits(variant.into())
444        }
445    }
446    #[doc = "Frames are transmitted immediately"]
447    #[inline(always)]
448    pub fn none(self) -> &'a mut W {
449        self.variant(TXDELAY_A::NONE)
450    }
451    #[doc = "Transmission of new frames are delayed by a single bit period"]
452    #[inline(always)]
453    pub fn single(self) -> &'a mut W {
454        self.variant(TXDELAY_A::SINGLE)
455    }
456    #[doc = "Transmission of new frames are delayed by two bit periods"]
457    #[inline(always)]
458    pub fn double(self) -> &'a mut W {
459        self.variant(TXDELAY_A::DOUBLE)
460    }
461    #[doc = "Transmission of new frames are delayed by three bit periods"]
462    #[inline(always)]
463    pub fn triple(self) -> &'a mut W {
464        self.variant(TXDELAY_A::TRIPLE)
465    }
466    #[doc = r"Writes raw bits to the field"]
467    #[inline(always)]
468    pub fn bits(self, value: u8) -> &'a mut W {
469        self.w.bits = (self.w.bits & !(0x03 << 14)) | (((value as u32) & 0x03) << 14);
470        self.w
471    }
472}
473impl R {
474    #[doc = "Bit 0 - Automatic Transmitter Tristate"]
475    #[inline(always)]
476    pub fn autotri(&self) -> AUTOTRI_R {
477        AUTOTRI_R::new((self.bits & 0x01) != 0)
478    }
479    #[doc = "Bit 1 - Data-Bit Mode"]
480    #[inline(always)]
481    pub fn databits(&self) -> DATABITS_R {
482        DATABITS_R::new(((self.bits >> 1) & 0x01) != 0)
483    }
484    #[doc = "Bits 2:3 - Parity-Bit Mode"]
485    #[inline(always)]
486    pub fn parity(&self) -> PARITY_R {
487        PARITY_R::new(((self.bits >> 2) & 0x03) as u8)
488    }
489    #[doc = "Bit 4 - Stop-Bit Mode"]
490    #[inline(always)]
491    pub fn stopbits(&self) -> STOPBITS_R {
492        STOPBITS_R::new(((self.bits >> 4) & 0x01) != 0)
493    }
494    #[doc = "Bit 5 - Invert Input and Output"]
495    #[inline(always)]
496    pub fn inv(&self) -> INV_R {
497        INV_R::new(((self.bits >> 5) & 0x01) != 0)
498    }
499    #[doc = "Bit 6 - Clear RX DMA on Error"]
500    #[inline(always)]
501    pub fn errsdma(&self) -> ERRSDMA_R {
502        ERRSDMA_R::new(((self.bits >> 6) & 0x01) != 0)
503    }
504    #[doc = "Bit 7 - Loopback Enable"]
505    #[inline(always)]
506    pub fn loopbk(&self) -> LOOPBK_R {
507        LOOPBK_R::new(((self.bits >> 7) & 0x01) != 0)
508    }
509    #[doc = "Bit 8 - Start-Frame UnBlock RX"]
510    #[inline(always)]
511    pub fn sfubrx(&self) -> SFUBRX_R {
512        SFUBRX_R::new(((self.bits >> 8) & 0x01) != 0)
513    }
514    #[doc = "Bit 9 - Multi-Processor Mode"]
515    #[inline(always)]
516    pub fn mpm(&self) -> MPM_R {
517        MPM_R::new(((self.bits >> 9) & 0x01) != 0)
518    }
519    #[doc = "Bit 10 - Multi-Processor Address-Bit"]
520    #[inline(always)]
521    pub fn mpab(&self) -> MPAB_R {
522        MPAB_R::new(((self.bits >> 10) & 0x01) != 0)
523    }
524    #[doc = "Bit 11 - Bit 8 Default Value"]
525    #[inline(always)]
526    pub fn bit8dv(&self) -> BIT8DV_R {
527        BIT8DV_R::new(((self.bits >> 11) & 0x01) != 0)
528    }
529    #[doc = "Bit 12 - RX DMA Wakeup"]
530    #[inline(always)]
531    pub fn rxdmawu(&self) -> RXDMAWU_R {
532        RXDMAWU_R::new(((self.bits >> 12) & 0x01) != 0)
533    }
534    #[doc = "Bit 13 - TX DMA Wakeup"]
535    #[inline(always)]
536    pub fn txdmawu(&self) -> TXDMAWU_R {
537        TXDMAWU_R::new(((self.bits >> 13) & 0x01) != 0)
538    }
539    #[doc = "Bits 14:15 - TX Delay Transmission"]
540    #[inline(always)]
541    pub fn txdelay(&self) -> TXDELAY_R {
542        TXDELAY_R::new(((self.bits >> 14) & 0x03) as u8)
543    }
544}
545impl W {
546    #[doc = "Bit 0 - Automatic Transmitter Tristate"]
547    #[inline(always)]
548    pub fn autotri(&mut self) -> AUTOTRI_W {
549        AUTOTRI_W { w: self }
550    }
551    #[doc = "Bit 1 - Data-Bit Mode"]
552    #[inline(always)]
553    pub fn databits(&mut self) -> DATABITS_W {
554        DATABITS_W { w: self }
555    }
556    #[doc = "Bits 2:3 - Parity-Bit Mode"]
557    #[inline(always)]
558    pub fn parity(&mut self) -> PARITY_W {
559        PARITY_W { w: self }
560    }
561    #[doc = "Bit 4 - Stop-Bit Mode"]
562    #[inline(always)]
563    pub fn stopbits(&mut self) -> STOPBITS_W {
564        STOPBITS_W { w: self }
565    }
566    #[doc = "Bit 5 - Invert Input and Output"]
567    #[inline(always)]
568    pub fn inv(&mut self) -> INV_W {
569        INV_W { w: self }
570    }
571    #[doc = "Bit 6 - Clear RX DMA on Error"]
572    #[inline(always)]
573    pub fn errsdma(&mut self) -> ERRSDMA_W {
574        ERRSDMA_W { w: self }
575    }
576    #[doc = "Bit 7 - Loopback Enable"]
577    #[inline(always)]
578    pub fn loopbk(&mut self) -> LOOPBK_W {
579        LOOPBK_W { w: self }
580    }
581    #[doc = "Bit 8 - Start-Frame UnBlock RX"]
582    #[inline(always)]
583    pub fn sfubrx(&mut self) -> SFUBRX_W {
584        SFUBRX_W { w: self }
585    }
586    #[doc = "Bit 9 - Multi-Processor Mode"]
587    #[inline(always)]
588    pub fn mpm(&mut self) -> MPM_W {
589        MPM_W { w: self }
590    }
591    #[doc = "Bit 10 - Multi-Processor Address-Bit"]
592    #[inline(always)]
593    pub fn mpab(&mut self) -> MPAB_W {
594        MPAB_W { w: self }
595    }
596    #[doc = "Bit 11 - Bit 8 Default Value"]
597    #[inline(always)]
598    pub fn bit8dv(&mut self) -> BIT8DV_W {
599        BIT8DV_W { w: self }
600    }
601    #[doc = "Bit 12 - RX DMA Wakeup"]
602    #[inline(always)]
603    pub fn rxdmawu(&mut self) -> RXDMAWU_W {
604        RXDMAWU_W { w: self }
605    }
606    #[doc = "Bit 13 - TX DMA Wakeup"]
607    #[inline(always)]
608    pub fn txdmawu(&mut self) -> TXDMAWU_W {
609        TXDMAWU_W { w: self }
610    }
611    #[doc = "Bits 14:15 - TX Delay Transmission"]
612    #[inline(always)]
613    pub fn txdelay(&mut self) -> TXDELAY_W {
614        TXDELAY_W { w: self }
615    }
616}
efm32pg12_pac/leuart0/ctrl.rs

efm32pg12_pac/leuart0/
ctrl.rs
