efm32pg12_pac/ldma/
linkload.rs

1#[doc = "Writer for register LINKLOAD"]
2pub type W = crate::W<u32, super::LINKLOAD>;
3#[doc = "Register LINKLOAD `reset()`'s with value 0"]
4impl crate::ResetValue for super::LINKLOAD {
5    type Type = u32;
6    #[inline(always)]
7    fn reset_value() -> Self::Type {
8        0
9    }
10}
11#[doc = "Write proxy for field `LINKLOAD`"]
12pub struct LINKLOAD_W<'a> {
13    w: &'a mut W,
14}
15impl<'a> LINKLOAD_W<'a> {
16    #[doc = r"Writes raw bits to the field"]
17    #[inline(always)]
18    pub unsafe fn bits(self, value: u8) -> &'a mut W {
19        self.w.bits = (self.w.bits & !0xff) | ((value as u32) & 0xff);
20        self.w
21    }
22}
23impl W {
24    #[doc = "Bits 0:7 - DMA Link Loads"]
25    #[inline(always)]
26    pub fn linkload(&mut self) -> LINKLOAD_W {
27        LINKLOAD_W { w: self }
28    }
29}