efm32pg12_pac/ldma/
ch5_dst.rs

1#[doc = "Reader of register CH5_DST"]
2pub type R = crate::R<u32, super::CH5_DST>;
3#[doc = "Writer for register CH5_DST"]
4pub type W = crate::W<u32, super::CH5_DST>;
5#[doc = "Register CH5_DST `reset()`'s with value 0"]
6impl crate::ResetValue for super::CH5_DST {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "Reader of field `DSTADDR`"]
14pub type DSTADDR_R = crate::R<u32, u32>;
15#[doc = "Write proxy for field `DSTADDR`"]
16pub struct DSTADDR_W<'a> {
17    w: &'a mut W,
18}
19impl<'a> DSTADDR_W<'a> {
20    #[doc = r"Writes raw bits to the field"]
21    #[inline(always)]
22    pub unsafe fn bits(self, value: u32) -> &'a mut W {
23        self.w.bits = (self.w.bits & !0xffff_ffff) | ((value as u32) & 0xffff_ffff);
24        self.w
25    }
26}
27impl R {
28    #[doc = "Bits 0:31 - Destination Data Address"]
29    #[inline(always)]
30    pub fn dstaddr(&self) -> DSTADDR_R {
31        DSTADDR_R::new((self.bits & 0xffff_ffff) as u32)
32    }
33}
34impl W {
35    #[doc = "Bits 0:31 - Destination Data Address"]
36    #[inline(always)]
37    pub fn dstaddr(&mut self) -> DSTADDR_W {
38        DSTADDR_W { w: self }
39    }
40}
efm32pg12_pac/ldma/ch5_dst.rs

efm32pg12_pac/ldma/
ch5_dst.rs
