efm32pg12_pac/gpio/
pd_ctrl.rs1#[doc = "Reader of register PD_CTRL"]
2pub type R = crate::R<u32, super::PD_CTRL>;
3#[doc = "Writer for register PD_CTRL"]
4pub type W = crate::W<u32, super::PD_CTRL>;
5#[doc = "Register PD_CTRL `reset()`'s with value 0x0050_0050"]
6impl crate::ResetValue for super::PD_CTRL {
7 type Type = u32;
8 #[inline(always)]
9 fn reset_value() -> Self::Type {
10 0x0050_0050
11 }
12}
13#[doc = "Reader of field `DRIVESTRENGTH`"]
14pub type DRIVESTRENGTH_R = crate::R<bool, bool>;
15#[doc = "Write proxy for field `DRIVESTRENGTH`"]
16pub struct DRIVESTRENGTH_W<'a> {
17 w: &'a mut W,
18}
19impl<'a> DRIVESTRENGTH_W<'a> {
20 #[doc = r"Sets the field bit"]
21 #[inline(always)]
22 pub fn set_bit(self) -> &'a mut W {
23 self.bit(true)
24 }
25 #[doc = r"Clears the field bit"]
26 #[inline(always)]
27 pub fn clear_bit(self) -> &'a mut W {
28 self.bit(false)
29 }
30 #[doc = r"Writes raw bits to the field"]
31 #[inline(always)]
32 pub fn bit(self, value: bool) -> &'a mut W {
33 self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
34 self.w
35 }
36}
37#[doc = "Reader of field `SLEWRATE`"]
38pub type SLEWRATE_R = crate::R<u8, u8>;
39#[doc = "Write proxy for field `SLEWRATE`"]
40pub struct SLEWRATE_W<'a> {
41 w: &'a mut W,
42}
43impl<'a> SLEWRATE_W<'a> {
44 #[doc = r"Writes raw bits to the field"]
45 #[inline(always)]
46 pub unsafe fn bits(self, value: u8) -> &'a mut W {
47 self.w.bits = (self.w.bits & !(0x07 << 4)) | (((value as u32) & 0x07) << 4);
48 self.w
49 }
50}
51#[doc = "Reader of field `DINDIS`"]
52pub type DINDIS_R = crate::R<bool, bool>;
53#[doc = "Write proxy for field `DINDIS`"]
54pub struct DINDIS_W<'a> {
55 w: &'a mut W,
56}
57impl<'a> DINDIS_W<'a> {
58 #[doc = r"Sets the field bit"]
59 #[inline(always)]
60 pub fn set_bit(self) -> &'a mut W {
61 self.bit(true)
62 }
63 #[doc = r"Clears the field bit"]
64 #[inline(always)]
65 pub fn clear_bit(self) -> &'a mut W {
66 self.bit(false)
67 }
68 #[doc = r"Writes raw bits to the field"]
69 #[inline(always)]
70 pub fn bit(self, value: bool) -> &'a mut W {
71 self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u32) & 0x01) << 12);
72 self.w
73 }
74}
75#[doc = "Reader of field `DRIVESTRENGTHALT`"]
76pub type DRIVESTRENGTHALT_R = crate::R<bool, bool>;
77#[doc = "Write proxy for field `DRIVESTRENGTHALT`"]
78pub struct DRIVESTRENGTHALT_W<'a> {
79 w: &'a mut W,
80}
81impl<'a> DRIVESTRENGTHALT_W<'a> {
82 #[doc = r"Sets the field bit"]
83 #[inline(always)]
84 pub fn set_bit(self) -> &'a mut W {
85 self.bit(true)
86 }
87 #[doc = r"Clears the field bit"]
88 #[inline(always)]
89 pub fn clear_bit(self) -> &'a mut W {
90 self.bit(false)
91 }
92 #[doc = r"Writes raw bits to the field"]
93 #[inline(always)]
94 pub fn bit(self, value: bool) -> &'a mut W {
95 self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16);
96 self.w
97 }
98}
99#[doc = "Reader of field `SLEWRATEALT`"]
100pub type SLEWRATEALT_R = crate::R<u8, u8>;
101#[doc = "Write proxy for field `SLEWRATEALT`"]
102pub struct SLEWRATEALT_W<'a> {
103 w: &'a mut W,
104}
105impl<'a> SLEWRATEALT_W<'a> {
106 #[doc = r"Writes raw bits to the field"]
107 #[inline(always)]
108 pub unsafe fn bits(self, value: u8) -> &'a mut W {
109 self.w.bits = (self.w.bits & !(0x07 << 20)) | (((value as u32) & 0x07) << 20);
110 self.w
111 }
112}
113#[doc = "Reader of field `DINDISALT`"]
114pub type DINDISALT_R = crate::R<bool, bool>;
115#[doc = "Write proxy for field `DINDISALT`"]
116pub struct DINDISALT_W<'a> {
117 w: &'a mut W,
118}
119impl<'a> DINDISALT_W<'a> {
120 #[doc = r"Sets the field bit"]
121 #[inline(always)]
122 pub fn set_bit(self) -> &'a mut W {
123 self.bit(true)
124 }
125 #[doc = r"Clears the field bit"]
126 #[inline(always)]
127 pub fn clear_bit(self) -> &'a mut W {
128 self.bit(false)
129 }
130 #[doc = r"Writes raw bits to the field"]
131 #[inline(always)]
132 pub fn bit(self, value: bool) -> &'a mut W {
133 self.w.bits = (self.w.bits & !(0x01 << 28)) | (((value as u32) & 0x01) << 28);
134 self.w
135 }
136}
137impl R {
138 #[doc = "Bit 0 - Drive Strength for Port"]
139 #[inline(always)]
140 pub fn drivestrength(&self) -> DRIVESTRENGTH_R {
141 DRIVESTRENGTH_R::new((self.bits & 0x01) != 0)
142 }
143 #[doc = "Bits 4:6 - Slewrate Limit for Port"]
144 #[inline(always)]
145 pub fn slewrate(&self) -> SLEWRATE_R {
146 SLEWRATE_R::new(((self.bits >> 4) & 0x07) as u8)
147 }
148 #[doc = "Bit 12 - Data in Disable"]
149 #[inline(always)]
150 pub fn dindis(&self) -> DINDIS_R {
151 DINDIS_R::new(((self.bits >> 12) & 0x01) != 0)
152 }
153 #[doc = "Bit 16 - Alternate Drive Strength for Port"]
154 #[inline(always)]
155 pub fn drivestrengthalt(&self) -> DRIVESTRENGTHALT_R {
156 DRIVESTRENGTHALT_R::new(((self.bits >> 16) & 0x01) != 0)
157 }
158 #[doc = "Bits 20:22 - Alternate Slewrate Limit for Port"]
159 #[inline(always)]
160 pub fn slewratealt(&self) -> SLEWRATEALT_R {
161 SLEWRATEALT_R::new(((self.bits >> 20) & 0x07) as u8)
162 }
163 #[doc = "Bit 28 - Alternate Data in Disable"]
164 #[inline(always)]
165 pub fn dindisalt(&self) -> DINDISALT_R {
166 DINDISALT_R::new(((self.bits >> 28) & 0x01) != 0)
167 }
168}
169impl W {
170 #[doc = "Bit 0 - Drive Strength for Port"]
171 #[inline(always)]
172 pub fn drivestrength(&mut self) -> DRIVESTRENGTH_W {
173 DRIVESTRENGTH_W { w: self }
174 }
175 #[doc = "Bits 4:6 - Slewrate Limit for Port"]
176 #[inline(always)]
177 pub fn slewrate(&mut self) -> SLEWRATE_W {
178 SLEWRATE_W { w: self }
179 }
180 #[doc = "Bit 12 - Data in Disable"]
181 #[inline(always)]
182 pub fn dindis(&mut self) -> DINDIS_W {
183 DINDIS_W { w: self }
184 }
185 #[doc = "Bit 16 - Alternate Drive Strength for Port"]
186 #[inline(always)]
187 pub fn drivestrengthalt(&mut self) -> DRIVESTRENGTHALT_W {
188 DRIVESTRENGTHALT_W { w: self }
189 }
190 #[doc = "Bits 20:22 - Alternate Slewrate Limit for Port"]
191 #[inline(always)]
192 pub fn slewratealt(&mut self) -> SLEWRATEALT_W {
193 SLEWRATEALT_W { w: self }
194 }
195 #[doc = "Bit 28 - Alternate Data in Disable"]
196 #[inline(always)]
197 pub fn dindisalt(&mut self) -> DINDISALT_W {
198 DINDISALT_W { w: self }
199 }
200}