efm32pg12_pac/gpio/
ien.rs

1#[doc = "Reader of register IEN"]
2pub type R = crate::R<u32, super::IEN>;
3#[doc = "Writer for register IEN"]
4pub type W = crate::W<u32, super::IEN>;
5#[doc = "Register IEN `reset()`'s with value 0"]
6impl crate::ResetValue for super::IEN {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "Reader of field `EXT`"]
14pub type EXT_R = crate::R<u16, u16>;
15#[doc = "Write proxy for field `EXT`"]
16pub struct EXT_W<'a> {
17    w: &'a mut W,
18}
19impl<'a> EXT_W<'a> {
20    #[doc = r"Writes raw bits to the field"]
21    #[inline(always)]
22    pub unsafe fn bits(self, value: u16) -> &'a mut W {
23        self.w.bits = (self.w.bits & !0xffff) | ((value as u32) & 0xffff);
24        self.w
25    }
26}
27#[doc = "Reader of field `EM4WU`"]
28pub type EM4WU_R = crate::R<u16, u16>;
29#[doc = "Write proxy for field `EM4WU`"]
30pub struct EM4WU_W<'a> {
31    w: &'a mut W,
32}
33impl<'a> EM4WU_W<'a> {
34    #[doc = r"Writes raw bits to the field"]
35    #[inline(always)]
36    pub unsafe fn bits(self, value: u16) -> &'a mut W {
37        self.w.bits = (self.w.bits & !(0xffff << 16)) | (((value as u32) & 0xffff) << 16);
38        self.w
39    }
40}
41impl R {
42    #[doc = "Bits 0:15 - EXT Interrupt Enable"]
43    #[inline(always)]
44    pub fn ext(&self) -> EXT_R {
45        EXT_R::new((self.bits & 0xffff) as u16)
46    }
47    #[doc = "Bits 16:31 - EM4WU Interrupt Enable"]
48    #[inline(always)]
49    pub fn em4wu(&self) -> EM4WU_R {
50        EM4WU_R::new(((self.bits >> 16) & 0xffff) as u16)
51    }
52}
53impl W {
54    #[doc = "Bits 0:15 - EXT Interrupt Enable"]
55    #[inline(always)]
56    pub fn ext(&mut self) -> EXT_W {
57        EXT_W { w: self }
58    }
59    #[doc = "Bits 16:31 - EM4WU Interrupt Enable"]
60    #[inline(always)]
61    pub fn em4wu(&mut self) -> EM4WU_W {
62        EM4WU_W { w: self }
63    }
64}
efm32pg12_pac/gpio/ien.rs

efm32pg12_pac/gpio/
ien.rs
