1#[doc = "Reader of register EXTIPSELL"]
2pub type R = crate::R<u32, super::EXTIPSELL>;
3#[doc = "Writer for register EXTIPSELL"]
4pub type W = crate::W<u32, super::EXTIPSELL>;
5#[doc = "Register EXTIPSELL `reset()`'s with value 0"]
6impl crate::ResetValue for super::EXTIPSELL {
7 type Type = u32;
8 #[inline(always)]
9 fn reset_value() -> Self::Type {
10 0
11 }
12}
13#[doc = "External Interrupt 0 Port Select\n\nValue on reset: 0"]
14#[derive(Clone, Copy, Debug, PartialEq)]
15#[repr(u8)]
16pub enum EXTIPSEL0_A {
17 #[doc = "0: Port A group selected for external interrupt 0"]
18 PORTA = 0,
19 #[doc = "1: Port B group selected for external interrupt 0"]
20 PORTB = 1,
21 #[doc = "2: Port C group selected for external interrupt 0"]
22 PORTC = 2,
23 #[doc = "3: Port D group selected for external interrupt 0"]
24 PORTD = 3,
25 #[doc = "5: Port F group selected for external interrupt 0"]
26 PORTF = 5,
27 #[doc = "8: Port I group selected for external interrupt 0"]
28 PORTI = 8,
29 #[doc = "9: Port J group selected for external interrupt 0"]
30 PORTJ = 9,
31 #[doc = "10: Port K group selected for external interrupt 0"]
32 PORTK = 10,
33}
34impl From<EXTIPSEL0_A> for u8 {
35 #[inline(always)]
36 fn from(variant: EXTIPSEL0_A) -> Self {
37 variant as _
38 }
39}
40#[doc = "Reader of field `EXTIPSEL0`"]
41pub type EXTIPSEL0_R = crate::R<u8, EXTIPSEL0_A>;
42impl EXTIPSEL0_R {
43 #[doc = r"Get enumerated values variant"]
44 #[inline(always)]
45 pub fn variant(&self) -> crate::Variant<u8, EXTIPSEL0_A> {
46 use crate::Variant::*;
47 match self.bits {
48 0 => Val(EXTIPSEL0_A::PORTA),
49 1 => Val(EXTIPSEL0_A::PORTB),
50 2 => Val(EXTIPSEL0_A::PORTC),
51 3 => Val(EXTIPSEL0_A::PORTD),
52 5 => Val(EXTIPSEL0_A::PORTF),
53 8 => Val(EXTIPSEL0_A::PORTI),
54 9 => Val(EXTIPSEL0_A::PORTJ),
55 10 => Val(EXTIPSEL0_A::PORTK),
56 i => Res(i),
57 }
58 }
59 #[doc = "Checks if the value of the field is `PORTA`"]
60 #[inline(always)]
61 pub fn is_porta(&self) -> bool {
62 *self == EXTIPSEL0_A::PORTA
63 }
64 #[doc = "Checks if the value of the field is `PORTB`"]
65 #[inline(always)]
66 pub fn is_portb(&self) -> bool {
67 *self == EXTIPSEL0_A::PORTB
68 }
69 #[doc = "Checks if the value of the field is `PORTC`"]
70 #[inline(always)]
71 pub fn is_portc(&self) -> bool {
72 *self == EXTIPSEL0_A::PORTC
73 }
74 #[doc = "Checks if the value of the field is `PORTD`"]
75 #[inline(always)]
76 pub fn is_portd(&self) -> bool {
77 *self == EXTIPSEL0_A::PORTD
78 }
79 #[doc = "Checks if the value of the field is `PORTF`"]
80 #[inline(always)]
81 pub fn is_portf(&self) -> bool {
82 *self == EXTIPSEL0_A::PORTF
83 }
84 #[doc = "Checks if the value of the field is `PORTI`"]
85 #[inline(always)]
86 pub fn is_porti(&self) -> bool {
87 *self == EXTIPSEL0_A::PORTI
88 }
89 #[doc = "Checks if the value of the field is `PORTJ`"]
90 #[inline(always)]
91 pub fn is_portj(&self) -> bool {
92 *self == EXTIPSEL0_A::PORTJ
93 }
94 #[doc = "Checks if the value of the field is `PORTK`"]
95 #[inline(always)]
96 pub fn is_portk(&self) -> bool {
97 *self == EXTIPSEL0_A::PORTK
98 }
99}
100#[doc = "Write proxy for field `EXTIPSEL0`"]
101pub struct EXTIPSEL0_W<'a> {
102 w: &'a mut W,
103}
104impl<'a> EXTIPSEL0_W<'a> {
105 #[doc = r"Writes `variant` to the field"]
106 #[inline(always)]
107 pub fn variant(self, variant: EXTIPSEL0_A) -> &'a mut W {
108 unsafe { self.bits(variant.into()) }
109 }
110 #[doc = "Port A group selected for external interrupt 0"]
111 #[inline(always)]
112 pub fn porta(self) -> &'a mut W {
113 self.variant(EXTIPSEL0_A::PORTA)
114 }
115 #[doc = "Port B group selected for external interrupt 0"]
116 #[inline(always)]
117 pub fn portb(self) -> &'a mut W {
118 self.variant(EXTIPSEL0_A::PORTB)
119 }
120 #[doc = "Port C group selected for external interrupt 0"]
121 #[inline(always)]
122 pub fn portc(self) -> &'a mut W {
123 self.variant(EXTIPSEL0_A::PORTC)
124 }
125 #[doc = "Port D group selected for external interrupt 0"]
126 #[inline(always)]
127 pub fn portd(self) -> &'a mut W {
128 self.variant(EXTIPSEL0_A::PORTD)
129 }
130 #[doc = "Port F group selected for external interrupt 0"]
131 #[inline(always)]
132 pub fn portf(self) -> &'a mut W {
133 self.variant(EXTIPSEL0_A::PORTF)
134 }
135 #[doc = "Port I group selected for external interrupt 0"]
136 #[inline(always)]
137 pub fn porti(self) -> &'a mut W {
138 self.variant(EXTIPSEL0_A::PORTI)
139 }
140 #[doc = "Port J group selected for external interrupt 0"]
141 #[inline(always)]
142 pub fn portj(self) -> &'a mut W {
143 self.variant(EXTIPSEL0_A::PORTJ)
144 }
145 #[doc = "Port K group selected for external interrupt 0"]
146 #[inline(always)]
147 pub fn portk(self) -> &'a mut W {
148 self.variant(EXTIPSEL0_A::PORTK)
149 }
150 #[doc = r"Writes raw bits to the field"]
151 #[inline(always)]
152 pub unsafe fn bits(self, value: u8) -> &'a mut W {
153 self.w.bits = (self.w.bits & !0x0f) | ((value as u32) & 0x0f);
154 self.w
155 }
156}
157#[doc = "External Interrupt 1 Port Select\n\nValue on reset: 0"]
158#[derive(Clone, Copy, Debug, PartialEq)]
159#[repr(u8)]
160pub enum EXTIPSEL1_A {
161 #[doc = "0: Port A group selected for external interrupt 1"]
162 PORTA = 0,
163 #[doc = "1: Port B group selected for external interrupt 1"]
164 PORTB = 1,
165 #[doc = "2: Port C group selected for external interrupt 1"]
166 PORTC = 2,
167 #[doc = "3: Port D group selected for external interrupt 1"]
168 PORTD = 3,
169 #[doc = "5: Port F group selected for external interrupt 1"]
170 PORTF = 5,
171 #[doc = "8: Port I group selected for external interrupt 1"]
172 PORTI = 8,
173 #[doc = "9: Port J group selected for external interrupt 1"]
174 PORTJ = 9,
175 #[doc = "10: Port K group selected for external interrupt 1"]
176 PORTK = 10,
177}
178impl From<EXTIPSEL1_A> for u8 {
179 #[inline(always)]
180 fn from(variant: EXTIPSEL1_A) -> Self {
181 variant as _
182 }
183}
184#[doc = "Reader of field `EXTIPSEL1`"]
185pub type EXTIPSEL1_R = crate::R<u8, EXTIPSEL1_A>;
186impl EXTIPSEL1_R {
187 #[doc = r"Get enumerated values variant"]
188 #[inline(always)]
189 pub fn variant(&self) -> crate::Variant<u8, EXTIPSEL1_A> {
190 use crate::Variant::*;
191 match self.bits {
192 0 => Val(EXTIPSEL1_A::PORTA),
193 1 => Val(EXTIPSEL1_A::PORTB),
194 2 => Val(EXTIPSEL1_A::PORTC),
195 3 => Val(EXTIPSEL1_A::PORTD),
196 5 => Val(EXTIPSEL1_A::PORTF),
197 8 => Val(EXTIPSEL1_A::PORTI),
198 9 => Val(EXTIPSEL1_A::PORTJ),
199 10 => Val(EXTIPSEL1_A::PORTK),
200 i => Res(i),
201 }
202 }
203 #[doc = "Checks if the value of the field is `PORTA`"]
204 #[inline(always)]
205 pub fn is_porta(&self) -> bool {
206 *self == EXTIPSEL1_A::PORTA
207 }
208 #[doc = "Checks if the value of the field is `PORTB`"]
209 #[inline(always)]
210 pub fn is_portb(&self) -> bool {
211 *self == EXTIPSEL1_A::PORTB
212 }
213 #[doc = "Checks if the value of the field is `PORTC`"]
214 #[inline(always)]
215 pub fn is_portc(&self) -> bool {
216 *self == EXTIPSEL1_A::PORTC
217 }
218 #[doc = "Checks if the value of the field is `PORTD`"]
219 #[inline(always)]
220 pub fn is_portd(&self) -> bool {
221 *self == EXTIPSEL1_A::PORTD
222 }
223 #[doc = "Checks if the value of the field is `PORTF`"]
224 #[inline(always)]
225 pub fn is_portf(&self) -> bool {
226 *self == EXTIPSEL1_A::PORTF
227 }
228 #[doc = "Checks if the value of the field is `PORTI`"]
229 #[inline(always)]
230 pub fn is_porti(&self) -> bool {
231 *self == EXTIPSEL1_A::PORTI
232 }
233 #[doc = "Checks if the value of the field is `PORTJ`"]
234 #[inline(always)]
235 pub fn is_portj(&self) -> bool {
236 *self == EXTIPSEL1_A::PORTJ
237 }
238 #[doc = "Checks if the value of the field is `PORTK`"]
239 #[inline(always)]
240 pub fn is_portk(&self) -> bool {
241 *self == EXTIPSEL1_A::PORTK
242 }
243}
244#[doc = "Write proxy for field `EXTIPSEL1`"]
245pub struct EXTIPSEL1_W<'a> {
246 w: &'a mut W,
247}
248impl<'a> EXTIPSEL1_W<'a> {
249 #[doc = r"Writes `variant` to the field"]
250 #[inline(always)]
251 pub fn variant(self, variant: EXTIPSEL1_A) -> &'a mut W {
252 unsafe { self.bits(variant.into()) }
253 }
254 #[doc = "Port A group selected for external interrupt 1"]
255 #[inline(always)]
256 pub fn porta(self) -> &'a mut W {
257 self.variant(EXTIPSEL1_A::PORTA)
258 }
259 #[doc = "Port B group selected for external interrupt 1"]
260 #[inline(always)]
261 pub fn portb(self) -> &'a mut W {
262 self.variant(EXTIPSEL1_A::PORTB)
263 }
264 #[doc = "Port C group selected for external interrupt 1"]
265 #[inline(always)]
266 pub fn portc(self) -> &'a mut W {
267 self.variant(EXTIPSEL1_A::PORTC)
268 }
269 #[doc = "Port D group selected for external interrupt 1"]
270 #[inline(always)]
271 pub fn portd(self) -> &'a mut W {
272 self.variant(EXTIPSEL1_A::PORTD)
273 }
274 #[doc = "Port F group selected for external interrupt 1"]
275 #[inline(always)]
276 pub fn portf(self) -> &'a mut W {
277 self.variant(EXTIPSEL1_A::PORTF)
278 }
279 #[doc = "Port I group selected for external interrupt 1"]
280 #[inline(always)]
281 pub fn porti(self) -> &'a mut W {
282 self.variant(EXTIPSEL1_A::PORTI)
283 }
284 #[doc = "Port J group selected for external interrupt 1"]
285 #[inline(always)]
286 pub fn portj(self) -> &'a mut W {
287 self.variant(EXTIPSEL1_A::PORTJ)
288 }
289 #[doc = "Port K group selected for external interrupt 1"]
290 #[inline(always)]
291 pub fn portk(self) -> &'a mut W {
292 self.variant(EXTIPSEL1_A::PORTK)
293 }
294 #[doc = r"Writes raw bits to the field"]
295 #[inline(always)]
296 pub unsafe fn bits(self, value: u8) -> &'a mut W {
297 self.w.bits = (self.w.bits & !(0x0f << 4)) | (((value as u32) & 0x0f) << 4);
298 self.w
299 }
300}
301#[doc = "External Interrupt 2 Port Select\n\nValue on reset: 0"]
302#[derive(Clone, Copy, Debug, PartialEq)]
303#[repr(u8)]
304pub enum EXTIPSEL2_A {
305 #[doc = "0: Port A group selected for external interrupt 2"]
306 PORTA = 0,
307 #[doc = "1: Port B group selected for external interrupt 2"]
308 PORTB = 1,
309 #[doc = "2: Port C group selected for external interrupt 2"]
310 PORTC = 2,
311 #[doc = "3: Port D group selected for external interrupt 2"]
312 PORTD = 3,
313 #[doc = "5: Port F group selected for external interrupt 2"]
314 PORTF = 5,
315 #[doc = "8: Port I group selected for external interrupt 2"]
316 PORTI = 8,
317 #[doc = "9: Port J group selected for external interrupt 2"]
318 PORTJ = 9,
319 #[doc = "10: Port K group selected for external interrupt 2"]
320 PORTK = 10,
321}
322impl From<EXTIPSEL2_A> for u8 {
323 #[inline(always)]
324 fn from(variant: EXTIPSEL2_A) -> Self {
325 variant as _
326 }
327}
328#[doc = "Reader of field `EXTIPSEL2`"]
329pub type EXTIPSEL2_R = crate::R<u8, EXTIPSEL2_A>;
330impl EXTIPSEL2_R {
331 #[doc = r"Get enumerated values variant"]
332 #[inline(always)]
333 pub fn variant(&self) -> crate::Variant<u8, EXTIPSEL2_A> {
334 use crate::Variant::*;
335 match self.bits {
336 0 => Val(EXTIPSEL2_A::PORTA),
337 1 => Val(EXTIPSEL2_A::PORTB),
338 2 => Val(EXTIPSEL2_A::PORTC),
339 3 => Val(EXTIPSEL2_A::PORTD),
340 5 => Val(EXTIPSEL2_A::PORTF),
341 8 => Val(EXTIPSEL2_A::PORTI),
342 9 => Val(EXTIPSEL2_A::PORTJ),
343 10 => Val(EXTIPSEL2_A::PORTK),
344 i => Res(i),
345 }
346 }
347 #[doc = "Checks if the value of the field is `PORTA`"]
348 #[inline(always)]
349 pub fn is_porta(&self) -> bool {
350 *self == EXTIPSEL2_A::PORTA
351 }
352 #[doc = "Checks if the value of the field is `PORTB`"]
353 #[inline(always)]
354 pub fn is_portb(&self) -> bool {
355 *self == EXTIPSEL2_A::PORTB
356 }
357 #[doc = "Checks if the value of the field is `PORTC`"]
358 #[inline(always)]
359 pub fn is_portc(&self) -> bool {
360 *self == EXTIPSEL2_A::PORTC
361 }
362 #[doc = "Checks if the value of the field is `PORTD`"]
363 #[inline(always)]
364 pub fn is_portd(&self) -> bool {
365 *self == EXTIPSEL2_A::PORTD
366 }
367 #[doc = "Checks if the value of the field is `PORTF`"]
368 #[inline(always)]
369 pub fn is_portf(&self) -> bool {
370 *self == EXTIPSEL2_A::PORTF
371 }
372 #[doc = "Checks if the value of the field is `PORTI`"]
373 #[inline(always)]
374 pub fn is_porti(&self) -> bool {
375 *self == EXTIPSEL2_A::PORTI
376 }
377 #[doc = "Checks if the value of the field is `PORTJ`"]
378 #[inline(always)]
379 pub fn is_portj(&self) -> bool {
380 *self == EXTIPSEL2_A::PORTJ
381 }
382 #[doc = "Checks if the value of the field is `PORTK`"]
383 #[inline(always)]
384 pub fn is_portk(&self) -> bool {
385 *self == EXTIPSEL2_A::PORTK
386 }
387}
388#[doc = "Write proxy for field `EXTIPSEL2`"]
389pub struct EXTIPSEL2_W<'a> {
390 w: &'a mut W,
391}
392impl<'a> EXTIPSEL2_W<'a> {
393 #[doc = r"Writes `variant` to the field"]
394 #[inline(always)]
395 pub fn variant(self, variant: EXTIPSEL2_A) -> &'a mut W {
396 unsafe { self.bits(variant.into()) }
397 }
398 #[doc = "Port A group selected for external interrupt 2"]
399 #[inline(always)]
400 pub fn porta(self) -> &'a mut W {
401 self.variant(EXTIPSEL2_A::PORTA)
402 }
403 #[doc = "Port B group selected for external interrupt 2"]
404 #[inline(always)]
405 pub fn portb(self) -> &'a mut W {
406 self.variant(EXTIPSEL2_A::PORTB)
407 }
408 #[doc = "Port C group selected for external interrupt 2"]
409 #[inline(always)]
410 pub fn portc(self) -> &'a mut W {
411 self.variant(EXTIPSEL2_A::PORTC)
412 }
413 #[doc = "Port D group selected for external interrupt 2"]
414 #[inline(always)]
415 pub fn portd(self) -> &'a mut W {
416 self.variant(EXTIPSEL2_A::PORTD)
417 }
418 #[doc = "Port F group selected for external interrupt 2"]
419 #[inline(always)]
420 pub fn portf(self) -> &'a mut W {
421 self.variant(EXTIPSEL2_A::PORTF)
422 }
423 #[doc = "Port I group selected for external interrupt 2"]
424 #[inline(always)]
425 pub fn porti(self) -> &'a mut W {
426 self.variant(EXTIPSEL2_A::PORTI)
427 }
428 #[doc = "Port J group selected for external interrupt 2"]
429 #[inline(always)]
430 pub fn portj(self) -> &'a mut W {
431 self.variant(EXTIPSEL2_A::PORTJ)
432 }
433 #[doc = "Port K group selected for external interrupt 2"]
434 #[inline(always)]
435 pub fn portk(self) -> &'a mut W {
436 self.variant(EXTIPSEL2_A::PORTK)
437 }
438 #[doc = r"Writes raw bits to the field"]
439 #[inline(always)]
440 pub unsafe fn bits(self, value: u8) -> &'a mut W {
441 self.w.bits = (self.w.bits & !(0x0f << 8)) | (((value as u32) & 0x0f) << 8);
442 self.w
443 }
444}
445#[doc = "External Interrupt 3 Port Select\n\nValue on reset: 0"]
446#[derive(Clone, Copy, Debug, PartialEq)]
447#[repr(u8)]
448pub enum EXTIPSEL3_A {
449 #[doc = "0: Port A group selected for external interrupt 3"]
450 PORTA = 0,
451 #[doc = "1: Port B group selected for external interrupt 3"]
452 PORTB = 1,
453 #[doc = "2: Port C group selected for external interrupt 3"]
454 PORTC = 2,
455 #[doc = "3: Port D group selected for external interrupt 3"]
456 PORTD = 3,
457 #[doc = "5: Port F group selected for external interrupt 3"]
458 PORTF = 5,
459 #[doc = "8: Port I group selected for external interrupt 3"]
460 PORTI = 8,
461 #[doc = "9: Port J group selected for external interrupt 3"]
462 PORTJ = 9,
463 #[doc = "10: Port K group selected for external interrupt 3"]
464 PORTK = 10,
465}
466impl From<EXTIPSEL3_A> for u8 {
467 #[inline(always)]
468 fn from(variant: EXTIPSEL3_A) -> Self {
469 variant as _
470 }
471}
472#[doc = "Reader of field `EXTIPSEL3`"]
473pub type EXTIPSEL3_R = crate::R<u8, EXTIPSEL3_A>;
474impl EXTIPSEL3_R {
475 #[doc = r"Get enumerated values variant"]
476 #[inline(always)]
477 pub fn variant(&self) -> crate::Variant<u8, EXTIPSEL3_A> {
478 use crate::Variant::*;
479 match self.bits {
480 0 => Val(EXTIPSEL3_A::PORTA),
481 1 => Val(EXTIPSEL3_A::PORTB),
482 2 => Val(EXTIPSEL3_A::PORTC),
483 3 => Val(EXTIPSEL3_A::PORTD),
484 5 => Val(EXTIPSEL3_A::PORTF),
485 8 => Val(EXTIPSEL3_A::PORTI),
486 9 => Val(EXTIPSEL3_A::PORTJ),
487 10 => Val(EXTIPSEL3_A::PORTK),
488 i => Res(i),
489 }
490 }
491 #[doc = "Checks if the value of the field is `PORTA`"]
492 #[inline(always)]
493 pub fn is_porta(&self) -> bool {
494 *self == EXTIPSEL3_A::PORTA
495 }
496 #[doc = "Checks if the value of the field is `PORTB`"]
497 #[inline(always)]
498 pub fn is_portb(&self) -> bool {
499 *self == EXTIPSEL3_A::PORTB
500 }
501 #[doc = "Checks if the value of the field is `PORTC`"]
502 #[inline(always)]
503 pub fn is_portc(&self) -> bool {
504 *self == EXTIPSEL3_A::PORTC
505 }
506 #[doc = "Checks if the value of the field is `PORTD`"]
507 #[inline(always)]
508 pub fn is_portd(&self) -> bool {
509 *self == EXTIPSEL3_A::PORTD
510 }
511 #[doc = "Checks if the value of the field is `PORTF`"]
512 #[inline(always)]
513 pub fn is_portf(&self) -> bool {
514 *self == EXTIPSEL3_A::PORTF
515 }
516 #[doc = "Checks if the value of the field is `PORTI`"]
517 #[inline(always)]
518 pub fn is_porti(&self) -> bool {
519 *self == EXTIPSEL3_A::PORTI
520 }
521 #[doc = "Checks if the value of the field is `PORTJ`"]
522 #[inline(always)]
523 pub fn is_portj(&self) -> bool {
524 *self == EXTIPSEL3_A::PORTJ
525 }
526 #[doc = "Checks if the value of the field is `PORTK`"]
527 #[inline(always)]
528 pub fn is_portk(&self) -> bool {
529 *self == EXTIPSEL3_A::PORTK
530 }
531}
532#[doc = "Write proxy for field `EXTIPSEL3`"]
533pub struct EXTIPSEL3_W<'a> {
534 w: &'a mut W,
535}
536impl<'a> EXTIPSEL3_W<'a> {
537 #[doc = r"Writes `variant` to the field"]
538 #[inline(always)]
539 pub fn variant(self, variant: EXTIPSEL3_A) -> &'a mut W {
540 unsafe { self.bits(variant.into()) }
541 }
542 #[doc = "Port A group selected for external interrupt 3"]
543 #[inline(always)]
544 pub fn porta(self) -> &'a mut W {
545 self.variant(EXTIPSEL3_A::PORTA)
546 }
547 #[doc = "Port B group selected for external interrupt 3"]
548 #[inline(always)]
549 pub fn portb(self) -> &'a mut W {
550 self.variant(EXTIPSEL3_A::PORTB)
551 }
552 #[doc = "Port C group selected for external interrupt 3"]
553 #[inline(always)]
554 pub fn portc(self) -> &'a mut W {
555 self.variant(EXTIPSEL3_A::PORTC)
556 }
557 #[doc = "Port D group selected for external interrupt 3"]
558 #[inline(always)]
559 pub fn portd(self) -> &'a mut W {
560 self.variant(EXTIPSEL3_A::PORTD)
561 }
562 #[doc = "Port F group selected for external interrupt 3"]
563 #[inline(always)]
564 pub fn portf(self) -> &'a mut W {
565 self.variant(EXTIPSEL3_A::PORTF)
566 }
567 #[doc = "Port I group selected for external interrupt 3"]
568 #[inline(always)]
569 pub fn porti(self) -> &'a mut W {
570 self.variant(EXTIPSEL3_A::PORTI)
571 }
572 #[doc = "Port J group selected for external interrupt 3"]
573 #[inline(always)]
574 pub fn portj(self) -> &'a mut W {
575 self.variant(EXTIPSEL3_A::PORTJ)
576 }
577 #[doc = "Port K group selected for external interrupt 3"]
578 #[inline(always)]
579 pub fn portk(self) -> &'a mut W {
580 self.variant(EXTIPSEL3_A::PORTK)
581 }
582 #[doc = r"Writes raw bits to the field"]
583 #[inline(always)]
584 pub unsafe fn bits(self, value: u8) -> &'a mut W {
585 self.w.bits = (self.w.bits & !(0x0f << 12)) | (((value as u32) & 0x0f) << 12);
586 self.w
587 }
588}
589#[doc = "External Interrupt 4 Port Select\n\nValue on reset: 0"]
590#[derive(Clone, Copy, Debug, PartialEq)]
591#[repr(u8)]
592pub enum EXTIPSEL4_A {
593 #[doc = "0: Port A group selected for external interrupt 4"]
594 PORTA = 0,
595 #[doc = "1: Port B group selected for external interrupt 4"]
596 PORTB = 1,
597 #[doc = "2: Port C group selected for external interrupt 4"]
598 PORTC = 2,
599 #[doc = "3: Port D group selected for external interrupt 4"]
600 PORTD = 3,
601 #[doc = "5: Port F group selected for external interrupt 4"]
602 PORTF = 5,
603 #[doc = "8: Port I group selected for external interrupt 4"]
604 PORTI = 8,
605 #[doc = "9: Port J group selected for external interrupt 4"]
606 PORTJ = 9,
607 #[doc = "10: Port K group selected for external interrupt 4"]
608 PORTK = 10,
609}
610impl From<EXTIPSEL4_A> for u8 {
611 #[inline(always)]
612 fn from(variant: EXTIPSEL4_A) -> Self {
613 variant as _
614 }
615}
616#[doc = "Reader of field `EXTIPSEL4`"]
617pub type EXTIPSEL4_R = crate::R<u8, EXTIPSEL4_A>;
618impl EXTIPSEL4_R {
619 #[doc = r"Get enumerated values variant"]
620 #[inline(always)]
621 pub fn variant(&self) -> crate::Variant<u8, EXTIPSEL4_A> {
622 use crate::Variant::*;
623 match self.bits {
624 0 => Val(EXTIPSEL4_A::PORTA),
625 1 => Val(EXTIPSEL4_A::PORTB),
626 2 => Val(EXTIPSEL4_A::PORTC),
627 3 => Val(EXTIPSEL4_A::PORTD),
628 5 => Val(EXTIPSEL4_A::PORTF),
629 8 => Val(EXTIPSEL4_A::PORTI),
630 9 => Val(EXTIPSEL4_A::PORTJ),
631 10 => Val(EXTIPSEL4_A::PORTK),
632 i => Res(i),
633 }
634 }
635 #[doc = "Checks if the value of the field is `PORTA`"]
636 #[inline(always)]
637 pub fn is_porta(&self) -> bool {
638 *self == EXTIPSEL4_A::PORTA
639 }
640 #[doc = "Checks if the value of the field is `PORTB`"]
641 #[inline(always)]
642 pub fn is_portb(&self) -> bool {
643 *self == EXTIPSEL4_A::PORTB
644 }
645 #[doc = "Checks if the value of the field is `PORTC`"]
646 #[inline(always)]
647 pub fn is_portc(&self) -> bool {
648 *self == EXTIPSEL4_A::PORTC
649 }
650 #[doc = "Checks if the value of the field is `PORTD`"]
651 #[inline(always)]
652 pub fn is_portd(&self) -> bool {
653 *self == EXTIPSEL4_A::PORTD
654 }
655 #[doc = "Checks if the value of the field is `PORTF`"]
656 #[inline(always)]
657 pub fn is_portf(&self) -> bool {
658 *self == EXTIPSEL4_A::PORTF
659 }
660 #[doc = "Checks if the value of the field is `PORTI`"]
661 #[inline(always)]
662 pub fn is_porti(&self) -> bool {
663 *self == EXTIPSEL4_A::PORTI
664 }
665 #[doc = "Checks if the value of the field is `PORTJ`"]
666 #[inline(always)]
667 pub fn is_portj(&self) -> bool {
668 *self == EXTIPSEL4_A::PORTJ
669 }
670 #[doc = "Checks if the value of the field is `PORTK`"]
671 #[inline(always)]
672 pub fn is_portk(&self) -> bool {
673 *self == EXTIPSEL4_A::PORTK
674 }
675}
676#[doc = "Write proxy for field `EXTIPSEL4`"]
677pub struct EXTIPSEL4_W<'a> {
678 w: &'a mut W,
679}
680impl<'a> EXTIPSEL4_W<'a> {
681 #[doc = r"Writes `variant` to the field"]
682 #[inline(always)]
683 pub fn variant(self, variant: EXTIPSEL4_A) -> &'a mut W {
684 unsafe { self.bits(variant.into()) }
685 }
686 #[doc = "Port A group selected for external interrupt 4"]
687 #[inline(always)]
688 pub fn porta(self) -> &'a mut W {
689 self.variant(EXTIPSEL4_A::PORTA)
690 }
691 #[doc = "Port B group selected for external interrupt 4"]
692 #[inline(always)]
693 pub fn portb(self) -> &'a mut W {
694 self.variant(EXTIPSEL4_A::PORTB)
695 }
696 #[doc = "Port C group selected for external interrupt 4"]
697 #[inline(always)]
698 pub fn portc(self) -> &'a mut W {
699 self.variant(EXTIPSEL4_A::PORTC)
700 }
701 #[doc = "Port D group selected for external interrupt 4"]
702 #[inline(always)]
703 pub fn portd(self) -> &'a mut W {
704 self.variant(EXTIPSEL4_A::PORTD)
705 }
706 #[doc = "Port F group selected for external interrupt 4"]
707 #[inline(always)]
708 pub fn portf(self) -> &'a mut W {
709 self.variant(EXTIPSEL4_A::PORTF)
710 }
711 #[doc = "Port I group selected for external interrupt 4"]
712 #[inline(always)]
713 pub fn porti(self) -> &'a mut W {
714 self.variant(EXTIPSEL4_A::PORTI)
715 }
716 #[doc = "Port J group selected for external interrupt 4"]
717 #[inline(always)]
718 pub fn portj(self) -> &'a mut W {
719 self.variant(EXTIPSEL4_A::PORTJ)
720 }
721 #[doc = "Port K group selected for external interrupt 4"]
722 #[inline(always)]
723 pub fn portk(self) -> &'a mut W {
724 self.variant(EXTIPSEL4_A::PORTK)
725 }
726 #[doc = r"Writes raw bits to the field"]
727 #[inline(always)]
728 pub unsafe fn bits(self, value: u8) -> &'a mut W {
729 self.w.bits = (self.w.bits & !(0x0f << 16)) | (((value as u32) & 0x0f) << 16);
730 self.w
731 }
732}
733#[doc = "External Interrupt 5 Port Select\n\nValue on reset: 0"]
734#[derive(Clone, Copy, Debug, PartialEq)]
735#[repr(u8)]
736pub enum EXTIPSEL5_A {
737 #[doc = "0: Port A group selected for external interrupt 5"]
738 PORTA = 0,
739 #[doc = "1: Port B group selected for external interrupt 5"]
740 PORTB = 1,
741 #[doc = "2: Port C group selected for external interrupt 5"]
742 PORTC = 2,
743 #[doc = "3: Port D group selected for external interrupt 5"]
744 PORTD = 3,
745 #[doc = "5: Port F group selected for external interrupt 5"]
746 PORTF = 5,
747 #[doc = "8: Port I group selected for external interrupt 5"]
748 PORTI = 8,
749 #[doc = "9: Port J group selected for external interrupt 5"]
750 PORTJ = 9,
751 #[doc = "10: Port K group selected for external interrupt 5"]
752 PORTK = 10,
753}
754impl From<EXTIPSEL5_A> for u8 {
755 #[inline(always)]
756 fn from(variant: EXTIPSEL5_A) -> Self {
757 variant as _
758 }
759}
760#[doc = "Reader of field `EXTIPSEL5`"]
761pub type EXTIPSEL5_R = crate::R<u8, EXTIPSEL5_A>;
762impl EXTIPSEL5_R {
763 #[doc = r"Get enumerated values variant"]
764 #[inline(always)]
765 pub fn variant(&self) -> crate::Variant<u8, EXTIPSEL5_A> {
766 use crate::Variant::*;
767 match self.bits {
768 0 => Val(EXTIPSEL5_A::PORTA),
769 1 => Val(EXTIPSEL5_A::PORTB),
770 2 => Val(EXTIPSEL5_A::PORTC),
771 3 => Val(EXTIPSEL5_A::PORTD),
772 5 => Val(EXTIPSEL5_A::PORTF),
773 8 => Val(EXTIPSEL5_A::PORTI),
774 9 => Val(EXTIPSEL5_A::PORTJ),
775 10 => Val(EXTIPSEL5_A::PORTK),
776 i => Res(i),
777 }
778 }
779 #[doc = "Checks if the value of the field is `PORTA`"]
780 #[inline(always)]
781 pub fn is_porta(&self) -> bool {
782 *self == EXTIPSEL5_A::PORTA
783 }
784 #[doc = "Checks if the value of the field is `PORTB`"]
785 #[inline(always)]
786 pub fn is_portb(&self) -> bool {
787 *self == EXTIPSEL5_A::PORTB
788 }
789 #[doc = "Checks if the value of the field is `PORTC`"]
790 #[inline(always)]
791 pub fn is_portc(&self) -> bool {
792 *self == EXTIPSEL5_A::PORTC
793 }
794 #[doc = "Checks if the value of the field is `PORTD`"]
795 #[inline(always)]
796 pub fn is_portd(&self) -> bool {
797 *self == EXTIPSEL5_A::PORTD
798 }
799 #[doc = "Checks if the value of the field is `PORTF`"]
800 #[inline(always)]
801 pub fn is_portf(&self) -> bool {
802 *self == EXTIPSEL5_A::PORTF
803 }
804 #[doc = "Checks if the value of the field is `PORTI`"]
805 #[inline(always)]
806 pub fn is_porti(&self) -> bool {
807 *self == EXTIPSEL5_A::PORTI
808 }
809 #[doc = "Checks if the value of the field is `PORTJ`"]
810 #[inline(always)]
811 pub fn is_portj(&self) -> bool {
812 *self == EXTIPSEL5_A::PORTJ
813 }
814 #[doc = "Checks if the value of the field is `PORTK`"]
815 #[inline(always)]
816 pub fn is_portk(&self) -> bool {
817 *self == EXTIPSEL5_A::PORTK
818 }
819}
820#[doc = "Write proxy for field `EXTIPSEL5`"]
821pub struct EXTIPSEL5_W<'a> {
822 w: &'a mut W,
823}
824impl<'a> EXTIPSEL5_W<'a> {
825 #[doc = r"Writes `variant` to the field"]
826 #[inline(always)]
827 pub fn variant(self, variant: EXTIPSEL5_A) -> &'a mut W {
828 unsafe { self.bits(variant.into()) }
829 }
830 #[doc = "Port A group selected for external interrupt 5"]
831 #[inline(always)]
832 pub fn porta(self) -> &'a mut W {
833 self.variant(EXTIPSEL5_A::PORTA)
834 }
835 #[doc = "Port B group selected for external interrupt 5"]
836 #[inline(always)]
837 pub fn portb(self) -> &'a mut W {
838 self.variant(EXTIPSEL5_A::PORTB)
839 }
840 #[doc = "Port C group selected for external interrupt 5"]
841 #[inline(always)]
842 pub fn portc(self) -> &'a mut W {
843 self.variant(EXTIPSEL5_A::PORTC)
844 }
845 #[doc = "Port D group selected for external interrupt 5"]
846 #[inline(always)]
847 pub fn portd(self) -> &'a mut W {
848 self.variant(EXTIPSEL5_A::PORTD)
849 }
850 #[doc = "Port F group selected for external interrupt 5"]
851 #[inline(always)]
852 pub fn portf(self) -> &'a mut W {
853 self.variant(EXTIPSEL5_A::PORTF)
854 }
855 #[doc = "Port I group selected for external interrupt 5"]
856 #[inline(always)]
857 pub fn porti(self) -> &'a mut W {
858 self.variant(EXTIPSEL5_A::PORTI)
859 }
860 #[doc = "Port J group selected for external interrupt 5"]
861 #[inline(always)]
862 pub fn portj(self) -> &'a mut W {
863 self.variant(EXTIPSEL5_A::PORTJ)
864 }
865 #[doc = "Port K group selected for external interrupt 5"]
866 #[inline(always)]
867 pub fn portk(self) -> &'a mut W {
868 self.variant(EXTIPSEL5_A::PORTK)
869 }
870 #[doc = r"Writes raw bits to the field"]
871 #[inline(always)]
872 pub unsafe fn bits(self, value: u8) -> &'a mut W {
873 self.w.bits = (self.w.bits & !(0x0f << 20)) | (((value as u32) & 0x0f) << 20);
874 self.w
875 }
876}
877#[doc = "External Interrupt 6 Port Select\n\nValue on reset: 0"]
878#[derive(Clone, Copy, Debug, PartialEq)]
879#[repr(u8)]
880pub enum EXTIPSEL6_A {
881 #[doc = "0: Port A group selected for external interrupt 6"]
882 PORTA = 0,
883 #[doc = "1: Port B group selected for external interrupt 6"]
884 PORTB = 1,
885 #[doc = "2: Port C group selected for external interrupt 6"]
886 PORTC = 2,
887 #[doc = "3: Port D group selected for external interrupt 6"]
888 PORTD = 3,
889 #[doc = "5: Port F group selected for external interrupt 6"]
890 PORTF = 5,
891 #[doc = "8: Port I group selected for external interrupt 6"]
892 PORTI = 8,
893 #[doc = "9: Port J group selected for external interrupt 6"]
894 PORTJ = 9,
895 #[doc = "10: Port K group selected for external interrupt 6"]
896 PORTK = 10,
897}
898impl From<EXTIPSEL6_A> for u8 {
899 #[inline(always)]
900 fn from(variant: EXTIPSEL6_A) -> Self {
901 variant as _
902 }
903}
904#[doc = "Reader of field `EXTIPSEL6`"]
905pub type EXTIPSEL6_R = crate::R<u8, EXTIPSEL6_A>;
906impl EXTIPSEL6_R {
907 #[doc = r"Get enumerated values variant"]
908 #[inline(always)]
909 pub fn variant(&self) -> crate::Variant<u8, EXTIPSEL6_A> {
910 use crate::Variant::*;
911 match self.bits {
912 0 => Val(EXTIPSEL6_A::PORTA),
913 1 => Val(EXTIPSEL6_A::PORTB),
914 2 => Val(EXTIPSEL6_A::PORTC),
915 3 => Val(EXTIPSEL6_A::PORTD),
916 5 => Val(EXTIPSEL6_A::PORTF),
917 8 => Val(EXTIPSEL6_A::PORTI),
918 9 => Val(EXTIPSEL6_A::PORTJ),
919 10 => Val(EXTIPSEL6_A::PORTK),
920 i => Res(i),
921 }
922 }
923 #[doc = "Checks if the value of the field is `PORTA`"]
924 #[inline(always)]
925 pub fn is_porta(&self) -> bool {
926 *self == EXTIPSEL6_A::PORTA
927 }
928 #[doc = "Checks if the value of the field is `PORTB`"]
929 #[inline(always)]
930 pub fn is_portb(&self) -> bool {
931 *self == EXTIPSEL6_A::PORTB
932 }
933 #[doc = "Checks if the value of the field is `PORTC`"]
934 #[inline(always)]
935 pub fn is_portc(&self) -> bool {
936 *self == EXTIPSEL6_A::PORTC
937 }
938 #[doc = "Checks if the value of the field is `PORTD`"]
939 #[inline(always)]
940 pub fn is_portd(&self) -> bool {
941 *self == EXTIPSEL6_A::PORTD
942 }
943 #[doc = "Checks if the value of the field is `PORTF`"]
944 #[inline(always)]
945 pub fn is_portf(&self) -> bool {
946 *self == EXTIPSEL6_A::PORTF
947 }
948 #[doc = "Checks if the value of the field is `PORTI`"]
949 #[inline(always)]
950 pub fn is_porti(&self) -> bool {
951 *self == EXTIPSEL6_A::PORTI
952 }
953 #[doc = "Checks if the value of the field is `PORTJ`"]
954 #[inline(always)]
955 pub fn is_portj(&self) -> bool {
956 *self == EXTIPSEL6_A::PORTJ
957 }
958 #[doc = "Checks if the value of the field is `PORTK`"]
959 #[inline(always)]
960 pub fn is_portk(&self) -> bool {
961 *self == EXTIPSEL6_A::PORTK
962 }
963}
964#[doc = "Write proxy for field `EXTIPSEL6`"]
965pub struct EXTIPSEL6_W<'a> {
966 w: &'a mut W,
967}
968impl<'a> EXTIPSEL6_W<'a> {
969 #[doc = r"Writes `variant` to the field"]
970 #[inline(always)]
971 pub fn variant(self, variant: EXTIPSEL6_A) -> &'a mut W {
972 unsafe { self.bits(variant.into()) }
973 }
974 #[doc = "Port A group selected for external interrupt 6"]
975 #[inline(always)]
976 pub fn porta(self) -> &'a mut W {
977 self.variant(EXTIPSEL6_A::PORTA)
978 }
979 #[doc = "Port B group selected for external interrupt 6"]
980 #[inline(always)]
981 pub fn portb(self) -> &'a mut W {
982 self.variant(EXTIPSEL6_A::PORTB)
983 }
984 #[doc = "Port C group selected for external interrupt 6"]
985 #[inline(always)]
986 pub fn portc(self) -> &'a mut W {
987 self.variant(EXTIPSEL6_A::PORTC)
988 }
989 #[doc = "Port D group selected for external interrupt 6"]
990 #[inline(always)]
991 pub fn portd(self) -> &'a mut W {
992 self.variant(EXTIPSEL6_A::PORTD)
993 }
994 #[doc = "Port F group selected for external interrupt 6"]
995 #[inline(always)]
996 pub fn portf(self) -> &'a mut W {
997 self.variant(EXTIPSEL6_A::PORTF)
998 }
999 #[doc = "Port I group selected for external interrupt 6"]
1000 #[inline(always)]
1001 pub fn porti(self) -> &'a mut W {
1002 self.variant(EXTIPSEL6_A::PORTI)
1003 }
1004 #[doc = "Port J group selected for external interrupt 6"]
1005 #[inline(always)]
1006 pub fn portj(self) -> &'a mut W {
1007 self.variant(EXTIPSEL6_A::PORTJ)
1008 }
1009 #[doc = "Port K group selected for external interrupt 6"]
1010 #[inline(always)]
1011 pub fn portk(self) -> &'a mut W {
1012 self.variant(EXTIPSEL6_A::PORTK)
1013 }
1014 #[doc = r"Writes raw bits to the field"]
1015 #[inline(always)]
1016 pub unsafe fn bits(self, value: u8) -> &'a mut W {
1017 self.w.bits = (self.w.bits & !(0x0f << 24)) | (((value as u32) & 0x0f) << 24);
1018 self.w
1019 }
1020}
1021#[doc = "External Interrupt 7 Port Select\n\nValue on reset: 0"]
1022#[derive(Clone, Copy, Debug, PartialEq)]
1023#[repr(u8)]
1024pub enum EXTIPSEL7_A {
1025 #[doc = "0: Port A group selected for external interrupt 7"]
1026 PORTA = 0,
1027 #[doc = "1: Port B group selected for external interrupt 7"]
1028 PORTB = 1,
1029 #[doc = "2: Port C group selected for external interrupt 7"]
1030 PORTC = 2,
1031 #[doc = "3: Port D group selected for external interrupt 7"]
1032 PORTD = 3,
1033 #[doc = "5: Port F group selected for external interrupt 7"]
1034 PORTF = 5,
1035 #[doc = "8: Port I group selected for external interrupt 7"]
1036 PORTI = 8,
1037 #[doc = "9: Port J group selected for external interrupt 7"]
1038 PORTJ = 9,
1039 #[doc = "10: Port K group selected for external interrupt 7"]
1040 PORTK = 10,
1041}
1042impl From<EXTIPSEL7_A> for u8 {
1043 #[inline(always)]
1044 fn from(variant: EXTIPSEL7_A) -> Self {
1045 variant as _
1046 }
1047}
1048#[doc = "Reader of field `EXTIPSEL7`"]
1049pub type EXTIPSEL7_R = crate::R<u8, EXTIPSEL7_A>;
1050impl EXTIPSEL7_R {
1051 #[doc = r"Get enumerated values variant"]
1052 #[inline(always)]
1053 pub fn variant(&self) -> crate::Variant<u8, EXTIPSEL7_A> {
1054 use crate::Variant::*;
1055 match self.bits {
1056 0 => Val(EXTIPSEL7_A::PORTA),
1057 1 => Val(EXTIPSEL7_A::PORTB),
1058 2 => Val(EXTIPSEL7_A::PORTC),
1059 3 => Val(EXTIPSEL7_A::PORTD),
1060 5 => Val(EXTIPSEL7_A::PORTF),
1061 8 => Val(EXTIPSEL7_A::PORTI),
1062 9 => Val(EXTIPSEL7_A::PORTJ),
1063 10 => Val(EXTIPSEL7_A::PORTK),
1064 i => Res(i),
1065 }
1066 }
1067 #[doc = "Checks if the value of the field is `PORTA`"]
1068 #[inline(always)]
1069 pub fn is_porta(&self) -> bool {
1070 *self == EXTIPSEL7_A::PORTA
1071 }
1072 #[doc = "Checks if the value of the field is `PORTB`"]
1073 #[inline(always)]
1074 pub fn is_portb(&self) -> bool {
1075 *self == EXTIPSEL7_A::PORTB
1076 }
1077 #[doc = "Checks if the value of the field is `PORTC`"]
1078 #[inline(always)]
1079 pub fn is_portc(&self) -> bool {
1080 *self == EXTIPSEL7_A::PORTC
1081 }
1082 #[doc = "Checks if the value of the field is `PORTD`"]
1083 #[inline(always)]
1084 pub fn is_portd(&self) -> bool {
1085 *self == EXTIPSEL7_A::PORTD
1086 }
1087 #[doc = "Checks if the value of the field is `PORTF`"]
1088 #[inline(always)]
1089 pub fn is_portf(&self) -> bool {
1090 *self == EXTIPSEL7_A::PORTF
1091 }
1092 #[doc = "Checks if the value of the field is `PORTI`"]
1093 #[inline(always)]
1094 pub fn is_porti(&self) -> bool {
1095 *self == EXTIPSEL7_A::PORTI
1096 }
1097 #[doc = "Checks if the value of the field is `PORTJ`"]
1098 #[inline(always)]
1099 pub fn is_portj(&self) -> bool {
1100 *self == EXTIPSEL7_A::PORTJ
1101 }
1102 #[doc = "Checks if the value of the field is `PORTK`"]
1103 #[inline(always)]
1104 pub fn is_portk(&self) -> bool {
1105 *self == EXTIPSEL7_A::PORTK
1106 }
1107}
1108#[doc = "Write proxy for field `EXTIPSEL7`"]
1109pub struct EXTIPSEL7_W<'a> {
1110 w: &'a mut W,
1111}
1112impl<'a> EXTIPSEL7_W<'a> {
1113 #[doc = r"Writes `variant` to the field"]
1114 #[inline(always)]
1115 pub fn variant(self, variant: EXTIPSEL7_A) -> &'a mut W {
1116 unsafe { self.bits(variant.into()) }
1117 }
1118 #[doc = "Port A group selected for external interrupt 7"]
1119 #[inline(always)]
1120 pub fn porta(self) -> &'a mut W {
1121 self.variant(EXTIPSEL7_A::PORTA)
1122 }
1123 #[doc = "Port B group selected for external interrupt 7"]
1124 #[inline(always)]
1125 pub fn portb(self) -> &'a mut W {
1126 self.variant(EXTIPSEL7_A::PORTB)
1127 }
1128 #[doc = "Port C group selected for external interrupt 7"]
1129 #[inline(always)]
1130 pub fn portc(self) -> &'a mut W {
1131 self.variant(EXTIPSEL7_A::PORTC)
1132 }
1133 #[doc = "Port D group selected for external interrupt 7"]
1134 #[inline(always)]
1135 pub fn portd(self) -> &'a mut W {
1136 self.variant(EXTIPSEL7_A::PORTD)
1137 }
1138 #[doc = "Port F group selected for external interrupt 7"]
1139 #[inline(always)]
1140 pub fn portf(self) -> &'a mut W {
1141 self.variant(EXTIPSEL7_A::PORTF)
1142 }
1143 #[doc = "Port I group selected for external interrupt 7"]
1144 #[inline(always)]
1145 pub fn porti(self) -> &'a mut W {
1146 self.variant(EXTIPSEL7_A::PORTI)
1147 }
1148 #[doc = "Port J group selected for external interrupt 7"]
1149 #[inline(always)]
1150 pub fn portj(self) -> &'a mut W {
1151 self.variant(EXTIPSEL7_A::PORTJ)
1152 }
1153 #[doc = "Port K group selected for external interrupt 7"]
1154 #[inline(always)]
1155 pub fn portk(self) -> &'a mut W {
1156 self.variant(EXTIPSEL7_A::PORTK)
1157 }
1158 #[doc = r"Writes raw bits to the field"]
1159 #[inline(always)]
1160 pub unsafe fn bits(self, value: u8) -> &'a mut W {
1161 self.w.bits = (self.w.bits & !(0x0f << 28)) | (((value as u32) & 0x0f) << 28);
1162 self.w
1163 }
1164}
1165impl R {
1166 #[doc = "Bits 0:3 - External Interrupt 0 Port Select"]
1167 #[inline(always)]
1168 pub fn extipsel0(&self) -> EXTIPSEL0_R {
1169 EXTIPSEL0_R::new((self.bits & 0x0f) as u8)
1170 }
1171 #[doc = "Bits 4:7 - External Interrupt 1 Port Select"]
1172 #[inline(always)]
1173 pub fn extipsel1(&self) -> EXTIPSEL1_R {
1174 EXTIPSEL1_R::new(((self.bits >> 4) & 0x0f) as u8)
1175 }
1176 #[doc = "Bits 8:11 - External Interrupt 2 Port Select"]
1177 #[inline(always)]
1178 pub fn extipsel2(&self) -> EXTIPSEL2_R {
1179 EXTIPSEL2_R::new(((self.bits >> 8) & 0x0f) as u8)
1180 }
1181 #[doc = "Bits 12:15 - External Interrupt 3 Port Select"]
1182 #[inline(always)]
1183 pub fn extipsel3(&self) -> EXTIPSEL3_R {
1184 EXTIPSEL3_R::new(((self.bits >> 12) & 0x0f) as u8)
1185 }
1186 #[doc = "Bits 16:19 - External Interrupt 4 Port Select"]
1187 #[inline(always)]
1188 pub fn extipsel4(&self) -> EXTIPSEL4_R {
1189 EXTIPSEL4_R::new(((self.bits >> 16) & 0x0f) as u8)
1190 }
1191 #[doc = "Bits 20:23 - External Interrupt 5 Port Select"]
1192 #[inline(always)]
1193 pub fn extipsel5(&self) -> EXTIPSEL5_R {
1194 EXTIPSEL5_R::new(((self.bits >> 20) & 0x0f) as u8)
1195 }
1196 #[doc = "Bits 24:27 - External Interrupt 6 Port Select"]
1197 #[inline(always)]
1198 pub fn extipsel6(&self) -> EXTIPSEL6_R {
1199 EXTIPSEL6_R::new(((self.bits >> 24) & 0x0f) as u8)
1200 }
1201 #[doc = "Bits 28:31 - External Interrupt 7 Port Select"]
1202 #[inline(always)]
1203 pub fn extipsel7(&self) -> EXTIPSEL7_R {
1204 EXTIPSEL7_R::new(((self.bits >> 28) & 0x0f) as u8)
1205 }
1206}
1207impl W {
1208 #[doc = "Bits 0:3 - External Interrupt 0 Port Select"]
1209 #[inline(always)]
1210 pub fn extipsel0(&mut self) -> EXTIPSEL0_W {
1211 EXTIPSEL0_W { w: self }
1212 }
1213 #[doc = "Bits 4:7 - External Interrupt 1 Port Select"]
1214 #[inline(always)]
1215 pub fn extipsel1(&mut self) -> EXTIPSEL1_W {
1216 EXTIPSEL1_W { w: self }
1217 }
1218 #[doc = "Bits 8:11 - External Interrupt 2 Port Select"]
1219 #[inline(always)]
1220 pub fn extipsel2(&mut self) -> EXTIPSEL2_W {
1221 EXTIPSEL2_W { w: self }
1222 }
1223 #[doc = "Bits 12:15 - External Interrupt 3 Port Select"]
1224 #[inline(always)]
1225 pub fn extipsel3(&mut self) -> EXTIPSEL3_W {
1226 EXTIPSEL3_W { w: self }
1227 }
1228 #[doc = "Bits 16:19 - External Interrupt 4 Port Select"]
1229 #[inline(always)]
1230 pub fn extipsel4(&mut self) -> EXTIPSEL4_W {
1231 EXTIPSEL4_W { w: self }
1232 }
1233 #[doc = "Bits 20:23 - External Interrupt 5 Port Select"]
1234 #[inline(always)]
1235 pub fn extipsel5(&mut self) -> EXTIPSEL5_W {
1236 EXTIPSEL5_W { w: self }
1237 }
1238 #[doc = "Bits 24:27 - External Interrupt 6 Port Select"]
1239 #[inline(always)]
1240 pub fn extipsel6(&mut self) -> EXTIPSEL6_W {
1241 EXTIPSEL6_W { w: self }
1242 }
1243 #[doc = "Bits 28:31 - External Interrupt 7 Port Select"]
1244 #[inline(always)]
1245 pub fn extipsel7(&mut self) -> EXTIPSEL7_W {
1246 EXTIPSEL7_W { w: self }
1247 }
1248}