efm32pg12_pac/etm/
etmtesseicr.rs

1#[doc = "Reader of register ETMTESSEICR"]
2pub type R = crate::R<u32, super::ETMTESSEICR>;
3#[doc = "Writer for register ETMTESSEICR"]
4pub type W = crate::W<u32, super::ETMTESSEICR>;
5#[doc = "Register ETMTESSEICR `reset()`'s with value 0"]
6impl crate::ResetValue for super::ETMTESSEICR {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "Reader of field `STARTRSEL`"]
14pub type STARTRSEL_R = crate::R<u8, u8>;
15#[doc = "Write proxy for field `STARTRSEL`"]
16pub struct STARTRSEL_W<'a> {
17    w: &'a mut W,
18}
19impl<'a> STARTRSEL_W<'a> {
20    #[doc = r"Writes raw bits to the field"]
21    #[inline(always)]
22    pub unsafe fn bits(self, value: u8) -> &'a mut W {
23        self.w.bits = (self.w.bits & !0x0f) | ((value as u32) & 0x0f);
24        self.w
25    }
26}
27#[doc = "Reader of field `STOPRSEL`"]
28pub type STOPRSEL_R = crate::R<u8, u8>;
29#[doc = "Write proxy for field `STOPRSEL`"]
30pub struct STOPRSEL_W<'a> {
31    w: &'a mut W,
32}
33impl<'a> STOPRSEL_W<'a> {
34    #[doc = r"Writes raw bits to the field"]
35    #[inline(always)]
36    pub unsafe fn bits(self, value: u8) -> &'a mut W {
37        self.w.bits = (self.w.bits & !(0x0f << 16)) | (((value as u32) & 0x0f) << 16);
38        self.w
39    }
40}
41impl R {
42    #[doc = "Bits 0:3 - Stop Resource Selection"]
43    #[inline(always)]
44    pub fn startrsel(&self) -> STARTRSEL_R {
45        STARTRSEL_R::new((self.bits & 0x0f) as u8)
46    }
47    #[doc = "Bits 16:19 - Stop Resource Selection"]
48    #[inline(always)]
49    pub fn stoprsel(&self) -> STOPRSEL_R {
50        STOPRSEL_R::new(((self.bits >> 16) & 0x0f) as u8)
51    }
52}
53impl W {
54    #[doc = "Bits 0:3 - Stop Resource Selection"]
55    #[inline(always)]
56    pub fn startrsel(&mut self) -> STARTRSEL_W {
57        STARTRSEL_W { w: self }
58    }
59    #[doc = "Bits 16:19 - Stop Resource Selection"]
60    #[inline(always)]
61    pub fn stoprsel(&mut self) -> STOPRSEL_W {
62        STOPRSEL_W { w: self }
63    }
64}
efm32pg12_pac/etm/etmtesseicr.rs

efm32pg12_pac/etm/
etmtesseicr.rs
