efm32pg12_pac/emu/
vmonaltavddctrl.rs

1#[doc = "Reader of register VMONALTAVDDCTRL"]
2pub type R = crate::R<u32, super::VMONALTAVDDCTRL>;
3#[doc = "Writer for register VMONALTAVDDCTRL"]
4pub type W = crate::W<u32, super::VMONALTAVDDCTRL>;
5#[doc = "Register VMONALTAVDDCTRL `reset()`'s with value 0"]
6impl crate::ResetValue for super::VMONALTAVDDCTRL {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "Reader of field `EN`"]
14pub type EN_R = crate::R<bool, bool>;
15#[doc = "Write proxy for field `EN`"]
16pub struct EN_W<'a> {
17    w: &'a mut W,
18}
19impl<'a> EN_W<'a> {
20    #[doc = r"Sets the field bit"]
21    #[inline(always)]
22    pub fn set_bit(self) -> &'a mut W {
23        self.bit(true)
24    }
25    #[doc = r"Clears the field bit"]
26    #[inline(always)]
27    pub fn clear_bit(self) -> &'a mut W {
28        self.bit(false)
29    }
30    #[doc = r"Writes raw bits to the field"]
31    #[inline(always)]
32    pub fn bit(self, value: bool) -> &'a mut W {
33        self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
34        self.w
35    }
36}
37#[doc = "Reader of field `RISEWU`"]
38pub type RISEWU_R = crate::R<bool, bool>;
39#[doc = "Write proxy for field `RISEWU`"]
40pub struct RISEWU_W<'a> {
41    w: &'a mut W,
42}
43impl<'a> RISEWU_W<'a> {
44    #[doc = r"Sets the field bit"]
45    #[inline(always)]
46    pub fn set_bit(self) -> &'a mut W {
47        self.bit(true)
48    }
49    #[doc = r"Clears the field bit"]
50    #[inline(always)]
51    pub fn clear_bit(self) -> &'a mut W {
52        self.bit(false)
53    }
54    #[doc = r"Writes raw bits to the field"]
55    #[inline(always)]
56    pub fn bit(self, value: bool) -> &'a mut W {
57        self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
58        self.w
59    }
60}
61#[doc = "Reader of field `FALLWU`"]
62pub type FALLWU_R = crate::R<bool, bool>;
63#[doc = "Write proxy for field `FALLWU`"]
64pub struct FALLWU_W<'a> {
65    w: &'a mut W,
66}
67impl<'a> FALLWU_W<'a> {
68    #[doc = r"Sets the field bit"]
69    #[inline(always)]
70    pub fn set_bit(self) -> &'a mut W {
71        self.bit(true)
72    }
73    #[doc = r"Clears the field bit"]
74    #[inline(always)]
75    pub fn clear_bit(self) -> &'a mut W {
76        self.bit(false)
77    }
78    #[doc = r"Writes raw bits to the field"]
79    #[inline(always)]
80    pub fn bit(self, value: bool) -> &'a mut W {
81        self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3);
82        self.w
83    }
84}
85#[doc = "Reader of field `THRESFINE`"]
86pub type THRESFINE_R = crate::R<u8, u8>;
87#[doc = "Write proxy for field `THRESFINE`"]
88pub struct THRESFINE_W<'a> {
89    w: &'a mut W,
90}
91impl<'a> THRESFINE_W<'a> {
92    #[doc = r"Writes raw bits to the field"]
93    #[inline(always)]
94    pub unsafe fn bits(self, value: u8) -> &'a mut W {
95        self.w.bits = (self.w.bits & !(0x0f << 8)) | (((value as u32) & 0x0f) << 8);
96        self.w
97    }
98}
99#[doc = "Reader of field `THRESCOARSE`"]
100pub type THRESCOARSE_R = crate::R<u8, u8>;
101#[doc = "Write proxy for field `THRESCOARSE`"]
102pub struct THRESCOARSE_W<'a> {
103    w: &'a mut W,
104}
105impl<'a> THRESCOARSE_W<'a> {
106    #[doc = r"Writes raw bits to the field"]
107    #[inline(always)]
108    pub unsafe fn bits(self, value: u8) -> &'a mut W {
109        self.w.bits = (self.w.bits & !(0x0f << 12)) | (((value as u32) & 0x0f) << 12);
110        self.w
111    }
112}
113impl R {
114    #[doc = "Bit 0 - Enable"]
115    #[inline(always)]
116    pub fn en(&self) -> EN_R {
117        EN_R::new((self.bits & 0x01) != 0)
118    }
119    #[doc = "Bit 2 - Rise Wakeup"]
120    #[inline(always)]
121    pub fn risewu(&self) -> RISEWU_R {
122        RISEWU_R::new(((self.bits >> 2) & 0x01) != 0)
123    }
124    #[doc = "Bit 3 - Fall Wakeup"]
125    #[inline(always)]
126    pub fn fallwu(&self) -> FALLWU_R {
127        FALLWU_R::new(((self.bits >> 3) & 0x01) != 0)
128    }
129    #[doc = "Bits 8:11 - Threshold Fine Adjust"]
130    #[inline(always)]
131    pub fn thresfine(&self) -> THRESFINE_R {
132        THRESFINE_R::new(((self.bits >> 8) & 0x0f) as u8)
133    }
134    #[doc = "Bits 12:15 - Threshold Coarse Adjust"]
135    #[inline(always)]
136    pub fn threscoarse(&self) -> THRESCOARSE_R {
137        THRESCOARSE_R::new(((self.bits >> 12) & 0x0f) as u8)
138    }
139}
140impl W {
141    #[doc = "Bit 0 - Enable"]
142    #[inline(always)]
143    pub fn en(&mut self) -> EN_W {
144        EN_W { w: self }
145    }
146    #[doc = "Bit 2 - Rise Wakeup"]
147    #[inline(always)]
148    pub fn risewu(&mut self) -> RISEWU_W {
149        RISEWU_W { w: self }
150    }
151    #[doc = "Bit 3 - Fall Wakeup"]
152    #[inline(always)]
153    pub fn fallwu(&mut self) -> FALLWU_W {
154        FALLWU_W { w: self }
155    }
156    #[doc = "Bits 8:11 - Threshold Fine Adjust"]
157    #[inline(always)]
158    pub fn thresfine(&mut self) -> THRESFINE_W {
159        THRESFINE_W { w: self }
160    }
161    #[doc = "Bits 12:15 - Threshold Coarse Adjust"]
162    #[inline(always)]
163    pub fn threscoarse(&mut self) -> THRESCOARSE_W {
164        THRESCOARSE_W { w: self }
165    }
166}
efm32pg12_pac/emu/vmonaltavddctrl.rs

efm32pg12_pac/emu/
vmonaltavddctrl.rs
