efm32pg12_pac/emu/
em23pernoretainctrl.rs1#[doc = "Reader of register EM23PERNORETAINCTRL"]
2pub type R = crate::R<u32, super::EM23PERNORETAINCTRL>;
3#[doc = "Writer for register EM23PERNORETAINCTRL"]
4pub type W = crate::W<u32, super::EM23PERNORETAINCTRL>;
5#[doc = "Register EM23PERNORETAINCTRL `reset()`'s with value 0"]
6impl crate::ResetValue for super::EM23PERNORETAINCTRL {
7 type Type = u32;
8 #[inline(always)]
9 fn reset_value() -> Self::Type {
10 0
11 }
12}
13#[doc = "Reader of field `ACMP0DIS`"]
14pub type ACMP0DIS_R = crate::R<bool, bool>;
15#[doc = "Write proxy for field `ACMP0DIS`"]
16pub struct ACMP0DIS_W<'a> {
17 w: &'a mut W,
18}
19impl<'a> ACMP0DIS_W<'a> {
20 #[doc = r"Sets the field bit"]
21 #[inline(always)]
22 pub fn set_bit(self) -> &'a mut W {
23 self.bit(true)
24 }
25 #[doc = r"Clears the field bit"]
26 #[inline(always)]
27 pub fn clear_bit(self) -> &'a mut W {
28 self.bit(false)
29 }
30 #[doc = r"Writes raw bits to the field"]
31 #[inline(always)]
32 pub fn bit(self, value: bool) -> &'a mut W {
33 self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
34 self.w
35 }
36}
37#[doc = "Reader of field `ACMP1DIS`"]
38pub type ACMP1DIS_R = crate::R<bool, bool>;
39#[doc = "Write proxy for field `ACMP1DIS`"]
40pub struct ACMP1DIS_W<'a> {
41 w: &'a mut W,
42}
43impl<'a> ACMP1DIS_W<'a> {
44 #[doc = r"Sets the field bit"]
45 #[inline(always)]
46 pub fn set_bit(self) -> &'a mut W {
47 self.bit(true)
48 }
49 #[doc = r"Clears the field bit"]
50 #[inline(always)]
51 pub fn clear_bit(self) -> &'a mut W {
52 self.bit(false)
53 }
54 #[doc = r"Writes raw bits to the field"]
55 #[inline(always)]
56 pub fn bit(self, value: bool) -> &'a mut W {
57 self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
58 self.w
59 }
60}
61#[doc = "Reader of field `PCNT0DIS`"]
62pub type PCNT0DIS_R = crate::R<bool, bool>;
63#[doc = "Write proxy for field `PCNT0DIS`"]
64pub struct PCNT0DIS_W<'a> {
65 w: &'a mut W,
66}
67impl<'a> PCNT0DIS_W<'a> {
68 #[doc = r"Sets the field bit"]
69 #[inline(always)]
70 pub fn set_bit(self) -> &'a mut W {
71 self.bit(true)
72 }
73 #[doc = r"Clears the field bit"]
74 #[inline(always)]
75 pub fn clear_bit(self) -> &'a mut W {
76 self.bit(false)
77 }
78 #[doc = r"Writes raw bits to the field"]
79 #[inline(always)]
80 pub fn bit(self, value: bool) -> &'a mut W {
81 self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
82 self.w
83 }
84}
85#[doc = "Reader of field `PCNT1DIS`"]
86pub type PCNT1DIS_R = crate::R<bool, bool>;
87#[doc = "Write proxy for field `PCNT1DIS`"]
88pub struct PCNT1DIS_W<'a> {
89 w: &'a mut W,
90}
91impl<'a> PCNT1DIS_W<'a> {
92 #[doc = r"Sets the field bit"]
93 #[inline(always)]
94 pub fn set_bit(self) -> &'a mut W {
95 self.bit(true)
96 }
97 #[doc = r"Clears the field bit"]
98 #[inline(always)]
99 pub fn clear_bit(self) -> &'a mut W {
100 self.bit(false)
101 }
102 #[doc = r"Writes raw bits to the field"]
103 #[inline(always)]
104 pub fn bit(self, value: bool) -> &'a mut W {
105 self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3);
106 self.w
107 }
108}
109#[doc = "Reader of field `PCNT2DIS`"]
110pub type PCNT2DIS_R = crate::R<bool, bool>;
111#[doc = "Write proxy for field `PCNT2DIS`"]
112pub struct PCNT2DIS_W<'a> {
113 w: &'a mut W,
114}
115impl<'a> PCNT2DIS_W<'a> {
116 #[doc = r"Sets the field bit"]
117 #[inline(always)]
118 pub fn set_bit(self) -> &'a mut W {
119 self.bit(true)
120 }
121 #[doc = r"Clears the field bit"]
122 #[inline(always)]
123 pub fn clear_bit(self) -> &'a mut W {
124 self.bit(false)
125 }
126 #[doc = r"Writes raw bits to the field"]
127 #[inline(always)]
128 pub fn bit(self, value: bool) -> &'a mut W {
129 self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4);
130 self.w
131 }
132}
133#[doc = "Reader of field `I2C0DIS`"]
134pub type I2C0DIS_R = crate::R<bool, bool>;
135#[doc = "Write proxy for field `I2C0DIS`"]
136pub struct I2C0DIS_W<'a> {
137 w: &'a mut W,
138}
139impl<'a> I2C0DIS_W<'a> {
140 #[doc = r"Sets the field bit"]
141 #[inline(always)]
142 pub fn set_bit(self) -> &'a mut W {
143 self.bit(true)
144 }
145 #[doc = r"Clears the field bit"]
146 #[inline(always)]
147 pub fn clear_bit(self) -> &'a mut W {
148 self.bit(false)
149 }
150 #[doc = r"Writes raw bits to the field"]
151 #[inline(always)]
152 pub fn bit(self, value: bool) -> &'a mut W {
153 self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5);
154 self.w
155 }
156}
157#[doc = "Reader of field `I2C1DIS`"]
158pub type I2C1DIS_R = crate::R<bool, bool>;
159#[doc = "Write proxy for field `I2C1DIS`"]
160pub struct I2C1DIS_W<'a> {
161 w: &'a mut W,
162}
163impl<'a> I2C1DIS_W<'a> {
164 #[doc = r"Sets the field bit"]
165 #[inline(always)]
166 pub fn set_bit(self) -> &'a mut W {
167 self.bit(true)
168 }
169 #[doc = r"Clears the field bit"]
170 #[inline(always)]
171 pub fn clear_bit(self) -> &'a mut W {
172 self.bit(false)
173 }
174 #[doc = r"Writes raw bits to the field"]
175 #[inline(always)]
176 pub fn bit(self, value: bool) -> &'a mut W {
177 self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u32) & 0x01) << 6);
178 self.w
179 }
180}
181#[doc = "Reader of field `VDAC0DIS`"]
182pub type VDAC0DIS_R = crate::R<bool, bool>;
183#[doc = "Write proxy for field `VDAC0DIS`"]
184pub struct VDAC0DIS_W<'a> {
185 w: &'a mut W,
186}
187impl<'a> VDAC0DIS_W<'a> {
188 #[doc = r"Sets the field bit"]
189 #[inline(always)]
190 pub fn set_bit(self) -> &'a mut W {
191 self.bit(true)
192 }
193 #[doc = r"Clears the field bit"]
194 #[inline(always)]
195 pub fn clear_bit(self) -> &'a mut W {
196 self.bit(false)
197 }
198 #[doc = r"Writes raw bits to the field"]
199 #[inline(always)]
200 pub fn bit(self, value: bool) -> &'a mut W {
201 self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7);
202 self.w
203 }
204}
205#[doc = "Reader of field `IDAC0DIS`"]
206pub type IDAC0DIS_R = crate::R<bool, bool>;
207#[doc = "Write proxy for field `IDAC0DIS`"]
208pub struct IDAC0DIS_W<'a> {
209 w: &'a mut W,
210}
211impl<'a> IDAC0DIS_W<'a> {
212 #[doc = r"Sets the field bit"]
213 #[inline(always)]
214 pub fn set_bit(self) -> &'a mut W {
215 self.bit(true)
216 }
217 #[doc = r"Clears the field bit"]
218 #[inline(always)]
219 pub fn clear_bit(self) -> &'a mut W {
220 self.bit(false)
221 }
222 #[doc = r"Writes raw bits to the field"]
223 #[inline(always)]
224 pub fn bit(self, value: bool) -> &'a mut W {
225 self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8);
226 self.w
227 }
228}
229#[doc = "Reader of field `ADC0DIS`"]
230pub type ADC0DIS_R = crate::R<bool, bool>;
231#[doc = "Write proxy for field `ADC0DIS`"]
232pub struct ADC0DIS_W<'a> {
233 w: &'a mut W,
234}
235impl<'a> ADC0DIS_W<'a> {
236 #[doc = r"Sets the field bit"]
237 #[inline(always)]
238 pub fn set_bit(self) -> &'a mut W {
239 self.bit(true)
240 }
241 #[doc = r"Clears the field bit"]
242 #[inline(always)]
243 pub fn clear_bit(self) -> &'a mut W {
244 self.bit(false)
245 }
246 #[doc = r"Writes raw bits to the field"]
247 #[inline(always)]
248 pub fn bit(self, value: bool) -> &'a mut W {
249 self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9);
250 self.w
251 }
252}
253#[doc = "Reader of field `LETIMER0DIS`"]
254pub type LETIMER0DIS_R = crate::R<bool, bool>;
255#[doc = "Write proxy for field `LETIMER0DIS`"]
256pub struct LETIMER0DIS_W<'a> {
257 w: &'a mut W,
258}
259impl<'a> LETIMER0DIS_W<'a> {
260 #[doc = r"Sets the field bit"]
261 #[inline(always)]
262 pub fn set_bit(self) -> &'a mut W {
263 self.bit(true)
264 }
265 #[doc = r"Clears the field bit"]
266 #[inline(always)]
267 pub fn clear_bit(self) -> &'a mut W {
268 self.bit(false)
269 }
270 #[doc = r"Writes raw bits to the field"]
271 #[inline(always)]
272 pub fn bit(self, value: bool) -> &'a mut W {
273 self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10);
274 self.w
275 }
276}
277#[doc = "Reader of field `WDOG0DIS`"]
278pub type WDOG0DIS_R = crate::R<bool, bool>;
279#[doc = "Write proxy for field `WDOG0DIS`"]
280pub struct WDOG0DIS_W<'a> {
281 w: &'a mut W,
282}
283impl<'a> WDOG0DIS_W<'a> {
284 #[doc = r"Sets the field bit"]
285 #[inline(always)]
286 pub fn set_bit(self) -> &'a mut W {
287 self.bit(true)
288 }
289 #[doc = r"Clears the field bit"]
290 #[inline(always)]
291 pub fn clear_bit(self) -> &'a mut W {
292 self.bit(false)
293 }
294 #[doc = r"Writes raw bits to the field"]
295 #[inline(always)]
296 pub fn bit(self, value: bool) -> &'a mut W {
297 self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11);
298 self.w
299 }
300}
301#[doc = "Reader of field `WDOG1DIS`"]
302pub type WDOG1DIS_R = crate::R<bool, bool>;
303#[doc = "Write proxy for field `WDOG1DIS`"]
304pub struct WDOG1DIS_W<'a> {
305 w: &'a mut W,
306}
307impl<'a> WDOG1DIS_W<'a> {
308 #[doc = r"Sets the field bit"]
309 #[inline(always)]
310 pub fn set_bit(self) -> &'a mut W {
311 self.bit(true)
312 }
313 #[doc = r"Clears the field bit"]
314 #[inline(always)]
315 pub fn clear_bit(self) -> &'a mut W {
316 self.bit(false)
317 }
318 #[doc = r"Writes raw bits to the field"]
319 #[inline(always)]
320 pub fn bit(self, value: bool) -> &'a mut W {
321 self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u32) & 0x01) << 12);
322 self.w
323 }
324}
325#[doc = "Reader of field `LESENSE0DIS`"]
326pub type LESENSE0DIS_R = crate::R<bool, bool>;
327#[doc = "Write proxy for field `LESENSE0DIS`"]
328pub struct LESENSE0DIS_W<'a> {
329 w: &'a mut W,
330}
331impl<'a> LESENSE0DIS_W<'a> {
332 #[doc = r"Sets the field bit"]
333 #[inline(always)]
334 pub fn set_bit(self) -> &'a mut W {
335 self.bit(true)
336 }
337 #[doc = r"Clears the field bit"]
338 #[inline(always)]
339 pub fn clear_bit(self) -> &'a mut W {
340 self.bit(false)
341 }
342 #[doc = r"Writes raw bits to the field"]
343 #[inline(always)]
344 pub fn bit(self, value: bool) -> &'a mut W {
345 self.w.bits = (self.w.bits & !(0x01 << 13)) | (((value as u32) & 0x01) << 13);
346 self.w
347 }
348}
349#[doc = "Reader of field `CSENDIS`"]
350pub type CSENDIS_R = crate::R<bool, bool>;
351#[doc = "Write proxy for field `CSENDIS`"]
352pub struct CSENDIS_W<'a> {
353 w: &'a mut W,
354}
355impl<'a> CSENDIS_W<'a> {
356 #[doc = r"Sets the field bit"]
357 #[inline(always)]
358 pub fn set_bit(self) -> &'a mut W {
359 self.bit(true)
360 }
361 #[doc = r"Clears the field bit"]
362 #[inline(always)]
363 pub fn clear_bit(self) -> &'a mut W {
364 self.bit(false)
365 }
366 #[doc = r"Writes raw bits to the field"]
367 #[inline(always)]
368 pub fn bit(self, value: bool) -> &'a mut W {
369 self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14);
370 self.w
371 }
372}
373#[doc = "Reader of field `LEUART0DIS`"]
374pub type LEUART0DIS_R = crate::R<bool, bool>;
375#[doc = "Write proxy for field `LEUART0DIS`"]
376pub struct LEUART0DIS_W<'a> {
377 w: &'a mut W,
378}
379impl<'a> LEUART0DIS_W<'a> {
380 #[doc = r"Sets the field bit"]
381 #[inline(always)]
382 pub fn set_bit(self) -> &'a mut W {
383 self.bit(true)
384 }
385 #[doc = r"Clears the field bit"]
386 #[inline(always)]
387 pub fn clear_bit(self) -> &'a mut W {
388 self.bit(false)
389 }
390 #[doc = r"Writes raw bits to the field"]
391 #[inline(always)]
392 pub fn bit(self, value: bool) -> &'a mut W {
393 self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15);
394 self.w
395 }
396}
397impl R {
398 #[doc = "Bit 0 - Allow Power Down of ACMP0 During EM23"]
399 #[inline(always)]
400 pub fn acmp0dis(&self) -> ACMP0DIS_R {
401 ACMP0DIS_R::new((self.bits & 0x01) != 0)
402 }
403 #[doc = "Bit 1 - Allow Power Down of ACMP1 During EM23"]
404 #[inline(always)]
405 pub fn acmp1dis(&self) -> ACMP1DIS_R {
406 ACMP1DIS_R::new(((self.bits >> 1) & 0x01) != 0)
407 }
408 #[doc = "Bit 2 - Allow Power Down of PCNT0 During EM23"]
409 #[inline(always)]
410 pub fn pcnt0dis(&self) -> PCNT0DIS_R {
411 PCNT0DIS_R::new(((self.bits >> 2) & 0x01) != 0)
412 }
413 #[doc = "Bit 3 - Allow Power Down of PCNT1 During EM23"]
414 #[inline(always)]
415 pub fn pcnt1dis(&self) -> PCNT1DIS_R {
416 PCNT1DIS_R::new(((self.bits >> 3) & 0x01) != 0)
417 }
418 #[doc = "Bit 4 - Allow Power Down of PCNT2 During EM23"]
419 #[inline(always)]
420 pub fn pcnt2dis(&self) -> PCNT2DIS_R {
421 PCNT2DIS_R::new(((self.bits >> 4) & 0x01) != 0)
422 }
423 #[doc = "Bit 5 - Allow Power Down of I2C0 During EM23"]
424 #[inline(always)]
425 pub fn i2c0dis(&self) -> I2C0DIS_R {
426 I2C0DIS_R::new(((self.bits >> 5) & 0x01) != 0)
427 }
428 #[doc = "Bit 6 - Allow Power Down of I2C1 During EM23"]
429 #[inline(always)]
430 pub fn i2c1dis(&self) -> I2C1DIS_R {
431 I2C1DIS_R::new(((self.bits >> 6) & 0x01) != 0)
432 }
433 #[doc = "Bit 7 - Allow Power Down of DAC0 During EM23"]
434 #[inline(always)]
435 pub fn vdac0dis(&self) -> VDAC0DIS_R {
436 VDAC0DIS_R::new(((self.bits >> 7) & 0x01) != 0)
437 }
438 #[doc = "Bit 8 - Allow Power Down of IDAC0 During EM23"]
439 #[inline(always)]
440 pub fn idac0dis(&self) -> IDAC0DIS_R {
441 IDAC0DIS_R::new(((self.bits >> 8) & 0x01) != 0)
442 }
443 #[doc = "Bit 9 - Allow Power Down of ADC0 During EM23"]
444 #[inline(always)]
445 pub fn adc0dis(&self) -> ADC0DIS_R {
446 ADC0DIS_R::new(((self.bits >> 9) & 0x01) != 0)
447 }
448 #[doc = "Bit 10 - Allow Power Down of LETIMER0 During EM23"]
449 #[inline(always)]
450 pub fn letimer0dis(&self) -> LETIMER0DIS_R {
451 LETIMER0DIS_R::new(((self.bits >> 10) & 0x01) != 0)
452 }
453 #[doc = "Bit 11 - Allow Power Down of WDOG0 During EM23"]
454 #[inline(always)]
455 pub fn wdog0dis(&self) -> WDOG0DIS_R {
456 WDOG0DIS_R::new(((self.bits >> 11) & 0x01) != 0)
457 }
458 #[doc = "Bit 12 - Allow Power Down of WDOG1 During EM23"]
459 #[inline(always)]
460 pub fn wdog1dis(&self) -> WDOG1DIS_R {
461 WDOG1DIS_R::new(((self.bits >> 12) & 0x01) != 0)
462 }
463 #[doc = "Bit 13 - Allow Power Down of LESENSE0 During EM23"]
464 #[inline(always)]
465 pub fn lesense0dis(&self) -> LESENSE0DIS_R {
466 LESENSE0DIS_R::new(((self.bits >> 13) & 0x01) != 0)
467 }
468 #[doc = "Bit 14 - Allow Power Down of CSEN During EM23"]
469 #[inline(always)]
470 pub fn csendis(&self) -> CSENDIS_R {
471 CSENDIS_R::new(((self.bits >> 14) & 0x01) != 0)
472 }
473 #[doc = "Bit 15 - Allow Power Down of LEUART0 During EM23"]
474 #[inline(always)]
475 pub fn leuart0dis(&self) -> LEUART0DIS_R {
476 LEUART0DIS_R::new(((self.bits >> 15) & 0x01) != 0)
477 }
478}
479impl W {
480 #[doc = "Bit 0 - Allow Power Down of ACMP0 During EM23"]
481 #[inline(always)]
482 pub fn acmp0dis(&mut self) -> ACMP0DIS_W {
483 ACMP0DIS_W { w: self }
484 }
485 #[doc = "Bit 1 - Allow Power Down of ACMP1 During EM23"]
486 #[inline(always)]
487 pub fn acmp1dis(&mut self) -> ACMP1DIS_W {
488 ACMP1DIS_W { w: self }
489 }
490 #[doc = "Bit 2 - Allow Power Down of PCNT0 During EM23"]
491 #[inline(always)]
492 pub fn pcnt0dis(&mut self) -> PCNT0DIS_W {
493 PCNT0DIS_W { w: self }
494 }
495 #[doc = "Bit 3 - Allow Power Down of PCNT1 During EM23"]
496 #[inline(always)]
497 pub fn pcnt1dis(&mut self) -> PCNT1DIS_W {
498 PCNT1DIS_W { w: self }
499 }
500 #[doc = "Bit 4 - Allow Power Down of PCNT2 During EM23"]
501 #[inline(always)]
502 pub fn pcnt2dis(&mut self) -> PCNT2DIS_W {
503 PCNT2DIS_W { w: self }
504 }
505 #[doc = "Bit 5 - Allow Power Down of I2C0 During EM23"]
506 #[inline(always)]
507 pub fn i2c0dis(&mut self) -> I2C0DIS_W {
508 I2C0DIS_W { w: self }
509 }
510 #[doc = "Bit 6 - Allow Power Down of I2C1 During EM23"]
511 #[inline(always)]
512 pub fn i2c1dis(&mut self) -> I2C1DIS_W {
513 I2C1DIS_W { w: self }
514 }
515 #[doc = "Bit 7 - Allow Power Down of DAC0 During EM23"]
516 #[inline(always)]
517 pub fn vdac0dis(&mut self) -> VDAC0DIS_W {
518 VDAC0DIS_W { w: self }
519 }
520 #[doc = "Bit 8 - Allow Power Down of IDAC0 During EM23"]
521 #[inline(always)]
522 pub fn idac0dis(&mut self) -> IDAC0DIS_W {
523 IDAC0DIS_W { w: self }
524 }
525 #[doc = "Bit 9 - Allow Power Down of ADC0 During EM23"]
526 #[inline(always)]
527 pub fn adc0dis(&mut self) -> ADC0DIS_W {
528 ADC0DIS_W { w: self }
529 }
530 #[doc = "Bit 10 - Allow Power Down of LETIMER0 During EM23"]
531 #[inline(always)]
532 pub fn letimer0dis(&mut self) -> LETIMER0DIS_W {
533 LETIMER0DIS_W { w: self }
534 }
535 #[doc = "Bit 11 - Allow Power Down of WDOG0 During EM23"]
536 #[inline(always)]
537 pub fn wdog0dis(&mut self) -> WDOG0DIS_W {
538 WDOG0DIS_W { w: self }
539 }
540 #[doc = "Bit 12 - Allow Power Down of WDOG1 During EM23"]
541 #[inline(always)]
542 pub fn wdog1dis(&mut self) -> WDOG1DIS_W {
543 WDOG1DIS_W { w: self }
544 }
545 #[doc = "Bit 13 - Allow Power Down of LESENSE0 During EM23"]
546 #[inline(always)]
547 pub fn lesense0dis(&mut self) -> LESENSE0DIS_W {
548 LESENSE0DIS_W { w: self }
549 }
550 #[doc = "Bit 14 - Allow Power Down of CSEN During EM23"]
551 #[inline(always)]
552 pub fn csendis(&mut self) -> CSENDIS_W {
553 CSENDIS_W { w: self }
554 }
555 #[doc = "Bit 15 - Allow Power Down of LEUART0 During EM23"]
556 #[inline(always)]
557 pub fn leuart0dis(&mut self) -> LEUART0DIS_W {
558 LEUART0DIS_W { w: self }
559 }
560}