1#[doc = "Reader of register CTRL"]
2pub type R = crate::R<u32, super::CTRL>;
3#[doc = "Writer for register CTRL"]
4pub type W = crate::W<u32, super::CTRL>;
5#[doc = "Register CTRL `reset()`'s with value 0x0003_0000"]
6impl crate::ResetValue for super::CTRL {
7 type Type = u32;
8 #[inline(always)]
9 fn reset_value() -> Self::Type {
10 0x0003_0000
11 }
12}
13#[doc = "Reader of field `EN`"]
14pub type EN_R = crate::R<bool, bool>;
15#[doc = "Write proxy for field `EN`"]
16pub struct EN_W<'a> {
17 w: &'a mut W,
18}
19impl<'a> EN_W<'a> {
20 #[doc = r"Sets the field bit"]
21 #[inline(always)]
22 pub fn set_bit(self) -> &'a mut W {
23 self.bit(true)
24 }
25 #[doc = r"Clears the field bit"]
26 #[inline(always)]
27 pub fn clear_bit(self) -> &'a mut W {
28 self.bit(false)
29 }
30 #[doc = r"Writes raw bits to the field"]
31 #[inline(always)]
32 pub fn bit(self, value: bool) -> &'a mut W {
33 self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
34 self.w
35 }
36}
37#[doc = "Reader of field `CMPPOL`"]
38pub type CMPPOL_R = crate::R<bool, bool>;
39#[doc = "Write proxy for field `CMPPOL`"]
40pub struct CMPPOL_W<'a> {
41 w: &'a mut W,
42}
43impl<'a> CMPPOL_W<'a> {
44 #[doc = r"Sets the field bit"]
45 #[inline(always)]
46 pub fn set_bit(self) -> &'a mut W {
47 self.bit(true)
48 }
49 #[doc = r"Clears the field bit"]
50 #[inline(always)]
51 pub fn clear_bit(self) -> &'a mut W {
52 self.bit(false)
53 }
54 #[doc = r"Writes raw bits to the field"]
55 #[inline(always)]
56 pub fn bit(self, value: bool) -> &'a mut W {
57 self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
58 self.w
59 }
60}
61#[doc = "CSEN Conversion Mode Select\n\nValue on reset: 0"]
62#[derive(Clone, Copy, Debug, PartialEq)]
63#[repr(u8)]
64pub enum CM_A {
65 #[doc = "0: Single Channel Mode: One conversion of a single channel (when MCE = 0) or set of bonded channels (when MCE = 1) per conversion trigger."]
66 SGL = 0,
67 #[doc = "1: Scan Mode: Scans multiple selected channels once per conversion trigger."]
68 SCAN = 1,
69 #[doc = "2: Continuous Single Channel: Continuous conversion of a single channel (when MCE = 0) or set of bonded channels (when MCE = 1)."]
70 CONTSGL = 2,
71 #[doc = "3: Continuous Scan Mode: Continuously scans multiple selected channels."]
72 CONTSCAN = 3,
73}
74impl From<CM_A> for u8 {
75 #[inline(always)]
76 fn from(variant: CM_A) -> Self {
77 variant as _
78 }
79}
80#[doc = "Reader of field `CM`"]
81pub type CM_R = crate::R<u8, CM_A>;
82impl CM_R {
83 #[doc = r"Get enumerated values variant"]
84 #[inline(always)]
85 pub fn variant(&self) -> CM_A {
86 match self.bits {
87 0 => CM_A::SGL,
88 1 => CM_A::SCAN,
89 2 => CM_A::CONTSGL,
90 3 => CM_A::CONTSCAN,
91 _ => unreachable!(),
92 }
93 }
94 #[doc = "Checks if the value of the field is `SGL`"]
95 #[inline(always)]
96 pub fn is_sgl(&self) -> bool {
97 *self == CM_A::SGL
98 }
99 #[doc = "Checks if the value of the field is `SCAN`"]
100 #[inline(always)]
101 pub fn is_scan(&self) -> bool {
102 *self == CM_A::SCAN
103 }
104 #[doc = "Checks if the value of the field is `CONTSGL`"]
105 #[inline(always)]
106 pub fn is_contsgl(&self) -> bool {
107 *self == CM_A::CONTSGL
108 }
109 #[doc = "Checks if the value of the field is `CONTSCAN`"]
110 #[inline(always)]
111 pub fn is_contscan(&self) -> bool {
112 *self == CM_A::CONTSCAN
113 }
114}
115#[doc = "Write proxy for field `CM`"]
116pub struct CM_W<'a> {
117 w: &'a mut W,
118}
119impl<'a> CM_W<'a> {
120 #[doc = r"Writes `variant` to the field"]
121 #[inline(always)]
122 pub fn variant(self, variant: CM_A) -> &'a mut W {
123 {
124 self.bits(variant.into())
125 }
126 }
127 #[doc = "Single Channel Mode: One conversion of a single channel (when MCE = 0) or set of bonded channels (when MCE = 1) per conversion trigger."]
128 #[inline(always)]
129 pub fn sgl(self) -> &'a mut W {
130 self.variant(CM_A::SGL)
131 }
132 #[doc = "Scan Mode: Scans multiple selected channels once per conversion trigger."]
133 #[inline(always)]
134 pub fn scan(self) -> &'a mut W {
135 self.variant(CM_A::SCAN)
136 }
137 #[doc = "Continuous Single Channel: Continuous conversion of a single channel (when MCE = 0) or set of bonded channels (when MCE = 1)."]
138 #[inline(always)]
139 pub fn contsgl(self) -> &'a mut W {
140 self.variant(CM_A::CONTSGL)
141 }
142 #[doc = "Continuous Scan Mode: Continuously scans multiple selected channels."]
143 #[inline(always)]
144 pub fn contscan(self) -> &'a mut W {
145 self.variant(CM_A::CONTSCAN)
146 }
147 #[doc = r"Writes raw bits to the field"]
148 #[inline(always)]
149 pub fn bits(self, value: u8) -> &'a mut W {
150 self.w.bits = (self.w.bits & !(0x03 << 4)) | (((value as u32) & 0x03) << 4);
151 self.w
152 }
153}
154#[doc = "SAR Conversion Resolution.\n\nValue on reset: 0"]
155#[derive(Clone, Copy, Debug, PartialEq)]
156#[repr(u8)]
157pub enum SARCR_A {
158 #[doc = "0: Conversions last 10 internal CSEN clocks and are 10-bits in length."]
159 CLK10 = 0,
160 #[doc = "1: Conversions last 12 internal CSEN clocks and are 12-bits in length."]
161 CLK12 = 1,
162 #[doc = "2: Conversions last 14 internal CSEN clocks and are 14-bits in length."]
163 CLK14 = 2,
164 #[doc = "3: Conversions last 16 internal CSEN clocks and are 16-bits in length."]
165 CLK16 = 3,
166}
167impl From<SARCR_A> for u8 {
168 #[inline(always)]
169 fn from(variant: SARCR_A) -> Self {
170 variant as _
171 }
172}
173#[doc = "Reader of field `SARCR`"]
174pub type SARCR_R = crate::R<u8, SARCR_A>;
175impl SARCR_R {
176 #[doc = r"Get enumerated values variant"]
177 #[inline(always)]
178 pub fn variant(&self) -> SARCR_A {
179 match self.bits {
180 0 => SARCR_A::CLK10,
181 1 => SARCR_A::CLK12,
182 2 => SARCR_A::CLK14,
183 3 => SARCR_A::CLK16,
184 _ => unreachable!(),
185 }
186 }
187 #[doc = "Checks if the value of the field is `CLK10`"]
188 #[inline(always)]
189 pub fn is_clk10(&self) -> bool {
190 *self == SARCR_A::CLK10
191 }
192 #[doc = "Checks if the value of the field is `CLK12`"]
193 #[inline(always)]
194 pub fn is_clk12(&self) -> bool {
195 *self == SARCR_A::CLK12
196 }
197 #[doc = "Checks if the value of the field is `CLK14`"]
198 #[inline(always)]
199 pub fn is_clk14(&self) -> bool {
200 *self == SARCR_A::CLK14
201 }
202 #[doc = "Checks if the value of the field is `CLK16`"]
203 #[inline(always)]
204 pub fn is_clk16(&self) -> bool {
205 *self == SARCR_A::CLK16
206 }
207}
208#[doc = "Write proxy for field `SARCR`"]
209pub struct SARCR_W<'a> {
210 w: &'a mut W,
211}
212impl<'a> SARCR_W<'a> {
213 #[doc = r"Writes `variant` to the field"]
214 #[inline(always)]
215 pub fn variant(self, variant: SARCR_A) -> &'a mut W {
216 {
217 self.bits(variant.into())
218 }
219 }
220 #[doc = "Conversions last 10 internal CSEN clocks and are 10-bits in length."]
221 #[inline(always)]
222 pub fn clk10(self) -> &'a mut W {
223 self.variant(SARCR_A::CLK10)
224 }
225 #[doc = "Conversions last 12 internal CSEN clocks and are 12-bits in length."]
226 #[inline(always)]
227 pub fn clk12(self) -> &'a mut W {
228 self.variant(SARCR_A::CLK12)
229 }
230 #[doc = "Conversions last 14 internal CSEN clocks and are 14-bits in length."]
231 #[inline(always)]
232 pub fn clk14(self) -> &'a mut W {
233 self.variant(SARCR_A::CLK14)
234 }
235 #[doc = "Conversions last 16 internal CSEN clocks and are 16-bits in length."]
236 #[inline(always)]
237 pub fn clk16(self) -> &'a mut W {
238 self.variant(SARCR_A::CLK16)
239 }
240 #[doc = r"Writes raw bits to the field"]
241 #[inline(always)]
242 pub fn bits(self, value: u8) -> &'a mut W {
243 self.w.bits = (self.w.bits & !(0x03 << 8)) | (((value as u32) & 0x03) << 8);
244 self.w
245 }
246}
247#[doc = "CSEN Accumulator Mode Select\n\nValue on reset: 0"]
248#[derive(Clone, Copy, Debug, PartialEq)]
249#[repr(u8)]
250pub enum ACU_A {
251 #[doc = "0: Accumulate 1 sample."]
252 ACC1 = 0,
253 #[doc = "1: Accumulate 2 sample."]
254 ACC2 = 1,
255 #[doc = "2: Accumulate 4 sample."]
256 ACC4 = 2,
257 #[doc = "3: Accumulate 8 sample."]
258 ACC8 = 3,
259 #[doc = "4: Accumulate 16 sample."]
260 ACC16 = 4,
261 #[doc = "5: Accumulate 32 sample."]
262 ACC32 = 5,
263 #[doc = "6: Accumulate 64 sample."]
264 ACC64 = 6,
265}
266impl From<ACU_A> for u8 {
267 #[inline(always)]
268 fn from(variant: ACU_A) -> Self {
269 variant as _
270 }
271}
272#[doc = "Reader of field `ACU`"]
273pub type ACU_R = crate::R<u8, ACU_A>;
274impl ACU_R {
275 #[doc = r"Get enumerated values variant"]
276 #[inline(always)]
277 pub fn variant(&self) -> crate::Variant<u8, ACU_A> {
278 use crate::Variant::*;
279 match self.bits {
280 0 => Val(ACU_A::ACC1),
281 1 => Val(ACU_A::ACC2),
282 2 => Val(ACU_A::ACC4),
283 3 => Val(ACU_A::ACC8),
284 4 => Val(ACU_A::ACC16),
285 5 => Val(ACU_A::ACC32),
286 6 => Val(ACU_A::ACC64),
287 i => Res(i),
288 }
289 }
290 #[doc = "Checks if the value of the field is `ACC1`"]
291 #[inline(always)]
292 pub fn is_acc1(&self) -> bool {
293 *self == ACU_A::ACC1
294 }
295 #[doc = "Checks if the value of the field is `ACC2`"]
296 #[inline(always)]
297 pub fn is_acc2(&self) -> bool {
298 *self == ACU_A::ACC2
299 }
300 #[doc = "Checks if the value of the field is `ACC4`"]
301 #[inline(always)]
302 pub fn is_acc4(&self) -> bool {
303 *self == ACU_A::ACC4
304 }
305 #[doc = "Checks if the value of the field is `ACC8`"]
306 #[inline(always)]
307 pub fn is_acc8(&self) -> bool {
308 *self == ACU_A::ACC8
309 }
310 #[doc = "Checks if the value of the field is `ACC16`"]
311 #[inline(always)]
312 pub fn is_acc16(&self) -> bool {
313 *self == ACU_A::ACC16
314 }
315 #[doc = "Checks if the value of the field is `ACC32`"]
316 #[inline(always)]
317 pub fn is_acc32(&self) -> bool {
318 *self == ACU_A::ACC32
319 }
320 #[doc = "Checks if the value of the field is `ACC64`"]
321 #[inline(always)]
322 pub fn is_acc64(&self) -> bool {
323 *self == ACU_A::ACC64
324 }
325}
326#[doc = "Write proxy for field `ACU`"]
327pub struct ACU_W<'a> {
328 w: &'a mut W,
329}
330impl<'a> ACU_W<'a> {
331 #[doc = r"Writes `variant` to the field"]
332 #[inline(always)]
333 pub fn variant(self, variant: ACU_A) -> &'a mut W {
334 unsafe { self.bits(variant.into()) }
335 }
336 #[doc = "Accumulate 1 sample."]
337 #[inline(always)]
338 pub fn acc1(self) -> &'a mut W {
339 self.variant(ACU_A::ACC1)
340 }
341 #[doc = "Accumulate 2 sample."]
342 #[inline(always)]
343 pub fn acc2(self) -> &'a mut W {
344 self.variant(ACU_A::ACC2)
345 }
346 #[doc = "Accumulate 4 sample."]
347 #[inline(always)]
348 pub fn acc4(self) -> &'a mut W {
349 self.variant(ACU_A::ACC4)
350 }
351 #[doc = "Accumulate 8 sample."]
352 #[inline(always)]
353 pub fn acc8(self) -> &'a mut W {
354 self.variant(ACU_A::ACC8)
355 }
356 #[doc = "Accumulate 16 sample."]
357 #[inline(always)]
358 pub fn acc16(self) -> &'a mut W {
359 self.variant(ACU_A::ACC16)
360 }
361 #[doc = "Accumulate 32 sample."]
362 #[inline(always)]
363 pub fn acc32(self) -> &'a mut W {
364 self.variant(ACU_A::ACC32)
365 }
366 #[doc = "Accumulate 64 sample."]
367 #[inline(always)]
368 pub fn acc64(self) -> &'a mut W {
369 self.variant(ACU_A::ACC64)
370 }
371 #[doc = r"Writes raw bits to the field"]
372 #[inline(always)]
373 pub unsafe fn bits(self, value: u8) -> &'a mut W {
374 self.w.bits = (self.w.bits & !(0x07 << 12)) | (((value as u32) & 0x07) << 12);
375 self.w
376 }
377}
378#[doc = "Reader of field `MCEN`"]
379pub type MCEN_R = crate::R<bool, bool>;
380#[doc = "Write proxy for field `MCEN`"]
381pub struct MCEN_W<'a> {
382 w: &'a mut W,
383}
384impl<'a> MCEN_W<'a> {
385 #[doc = r"Sets the field bit"]
386 #[inline(always)]
387 pub fn set_bit(self) -> &'a mut W {
388 self.bit(true)
389 }
390 #[doc = r"Clears the field bit"]
391 #[inline(always)]
392 pub fn clear_bit(self) -> &'a mut W {
393 self.bit(false)
394 }
395 #[doc = r"Writes raw bits to the field"]
396 #[inline(always)]
397 pub fn bit(self, value: bool) -> &'a mut W {
398 self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15);
399 self.w
400 }
401}
402#[doc = "Start Trigger Select\n\nValue on reset: 3"]
403#[derive(Clone, Copy, Debug, PartialEq)]
404#[repr(u8)]
405pub enum STM_A {
406 #[doc = "0: PRS Triggering. Conversions are triggered by the PRS channel selected in PRSSEL."]
407 PRS = 0,
408 #[doc = "1: Timer Triggering. Conversions are triggered by a local CSEN timer reload."]
409 TIMER = 1,
410 #[doc = "2: Software Triggering. Conversions are triggered by writing a 1 to the START field of the CMD register."]
411 START = 2,
412}
413impl From<STM_A> for u8 {
414 #[inline(always)]
415 fn from(variant: STM_A) -> Self {
416 variant as _
417 }
418}
419#[doc = "Reader of field `STM`"]
420pub type STM_R = crate::R<u8, STM_A>;
421impl STM_R {
422 #[doc = r"Get enumerated values variant"]
423 #[inline(always)]
424 pub fn variant(&self) -> crate::Variant<u8, STM_A> {
425 use crate::Variant::*;
426 match self.bits {
427 0 => Val(STM_A::PRS),
428 1 => Val(STM_A::TIMER),
429 2 => Val(STM_A::START),
430 i => Res(i),
431 }
432 }
433 #[doc = "Checks if the value of the field is `PRS`"]
434 #[inline(always)]
435 pub fn is_prs(&self) -> bool {
436 *self == STM_A::PRS
437 }
438 #[doc = "Checks if the value of the field is `TIMER`"]
439 #[inline(always)]
440 pub fn is_timer(&self) -> bool {
441 *self == STM_A::TIMER
442 }
443 #[doc = "Checks if the value of the field is `START`"]
444 #[inline(always)]
445 pub fn is_start(&self) -> bool {
446 *self == STM_A::START
447 }
448}
449#[doc = "Write proxy for field `STM`"]
450pub struct STM_W<'a> {
451 w: &'a mut W,
452}
453impl<'a> STM_W<'a> {
454 #[doc = r"Writes `variant` to the field"]
455 #[inline(always)]
456 pub fn variant(self, variant: STM_A) -> &'a mut W {
457 unsafe { self.bits(variant.into()) }
458 }
459 #[doc = "PRS Triggering. Conversions are triggered by the PRS channel selected in PRSSEL."]
460 #[inline(always)]
461 pub fn prs(self) -> &'a mut W {
462 self.variant(STM_A::PRS)
463 }
464 #[doc = "Timer Triggering. Conversions are triggered by a local CSEN timer reload."]
465 #[inline(always)]
466 pub fn timer(self) -> &'a mut W {
467 self.variant(STM_A::TIMER)
468 }
469 #[doc = "Software Triggering. Conversions are triggered by writing a 1 to the START field of the CMD register."]
470 #[inline(always)]
471 pub fn start(self) -> &'a mut W {
472 self.variant(STM_A::START)
473 }
474 #[doc = r"Writes raw bits to the field"]
475 #[inline(always)]
476 pub unsafe fn bits(self, value: u8) -> &'a mut W {
477 self.w.bits = (self.w.bits & !(0x03 << 16)) | (((value as u32) & 0x03) << 16);
478 self.w
479 }
480}
481#[doc = "Reader of field `CMPEN`"]
482pub type CMPEN_R = crate::R<bool, bool>;
483#[doc = "Write proxy for field `CMPEN`"]
484pub struct CMPEN_W<'a> {
485 w: &'a mut W,
486}
487impl<'a> CMPEN_W<'a> {
488 #[doc = r"Sets the field bit"]
489 #[inline(always)]
490 pub fn set_bit(self) -> &'a mut W {
491 self.bit(true)
492 }
493 #[doc = r"Clears the field bit"]
494 #[inline(always)]
495 pub fn clear_bit(self) -> &'a mut W {
496 self.bit(false)
497 }
498 #[doc = r"Writes raw bits to the field"]
499 #[inline(always)]
500 pub fn bit(self, value: bool) -> &'a mut W {
501 self.w.bits = (self.w.bits & !(0x01 << 18)) | (((value as u32) & 0x01) << 18);
502 self.w
503 }
504}
505#[doc = "Reader of field `DRSF`"]
506pub type DRSF_R = crate::R<bool, bool>;
507#[doc = "Write proxy for field `DRSF`"]
508pub struct DRSF_W<'a> {
509 w: &'a mut W,
510}
511impl<'a> DRSF_W<'a> {
512 #[doc = r"Sets the field bit"]
513 #[inline(always)]
514 pub fn set_bit(self) -> &'a mut W {
515 self.bit(true)
516 }
517 #[doc = r"Clears the field bit"]
518 #[inline(always)]
519 pub fn clear_bit(self) -> &'a mut W {
520 self.bit(false)
521 }
522 #[doc = r"Writes raw bits to the field"]
523 #[inline(always)]
524 pub fn bit(self, value: bool) -> &'a mut W {
525 self.w.bits = (self.w.bits & !(0x01 << 19)) | (((value as u32) & 0x01) << 19);
526 self.w
527 }
528}
529#[doc = "Reader of field `DMAEN`"]
530pub type DMAEN_R = crate::R<bool, bool>;
531#[doc = "Write proxy for field `DMAEN`"]
532pub struct DMAEN_W<'a> {
533 w: &'a mut W,
534}
535impl<'a> DMAEN_W<'a> {
536 #[doc = r"Sets the field bit"]
537 #[inline(always)]
538 pub fn set_bit(self) -> &'a mut W {
539 self.bit(true)
540 }
541 #[doc = r"Clears the field bit"]
542 #[inline(always)]
543 pub fn clear_bit(self) -> &'a mut W {
544 self.bit(false)
545 }
546 #[doc = r"Writes raw bits to the field"]
547 #[inline(always)]
548 pub fn bit(self, value: bool) -> &'a mut W {
549 self.w.bits = (self.w.bits & !(0x01 << 20)) | (((value as u32) & 0x01) << 20);
550 self.w
551 }
552}
553#[doc = "Reader of field `CONVSEL`"]
554pub type CONVSEL_R = crate::R<bool, bool>;
555#[doc = "Write proxy for field `CONVSEL`"]
556pub struct CONVSEL_W<'a> {
557 w: &'a mut W,
558}
559impl<'a> CONVSEL_W<'a> {
560 #[doc = r"Sets the field bit"]
561 #[inline(always)]
562 pub fn set_bit(self) -> &'a mut W {
563 self.bit(true)
564 }
565 #[doc = r"Clears the field bit"]
566 #[inline(always)]
567 pub fn clear_bit(self) -> &'a mut W {
568 self.bit(false)
569 }
570 #[doc = r"Writes raw bits to the field"]
571 #[inline(always)]
572 pub fn bit(self, value: bool) -> &'a mut W {
573 self.w.bits = (self.w.bits & !(0x01 << 21)) | (((value as u32) & 0x01) << 21);
574 self.w
575 }
576}
577#[doc = "Reader of field `CHOPEN`"]
578pub type CHOPEN_R = crate::R<bool, bool>;
579#[doc = "Write proxy for field `CHOPEN`"]
580pub struct CHOPEN_W<'a> {
581 w: &'a mut W,
582}
583impl<'a> CHOPEN_W<'a> {
584 #[doc = r"Sets the field bit"]
585 #[inline(always)]
586 pub fn set_bit(self) -> &'a mut W {
587 self.bit(true)
588 }
589 #[doc = r"Clears the field bit"]
590 #[inline(always)]
591 pub fn clear_bit(self) -> &'a mut W {
592 self.bit(false)
593 }
594 #[doc = r"Writes raw bits to the field"]
595 #[inline(always)]
596 pub fn bit(self, value: bool) -> &'a mut W {
597 self.w.bits = (self.w.bits & !(0x01 << 22)) | (((value as u32) & 0x01) << 22);
598 self.w
599 }
600}
601#[doc = "Reader of field `AUTOGND`"]
602pub type AUTOGND_R = crate::R<bool, bool>;
603#[doc = "Write proxy for field `AUTOGND`"]
604pub struct AUTOGND_W<'a> {
605 w: &'a mut W,
606}
607impl<'a> AUTOGND_W<'a> {
608 #[doc = r"Sets the field bit"]
609 #[inline(always)]
610 pub fn set_bit(self) -> &'a mut W {
611 self.bit(true)
612 }
613 #[doc = r"Clears the field bit"]
614 #[inline(always)]
615 pub fn clear_bit(self) -> &'a mut W {
616 self.bit(false)
617 }
618 #[doc = r"Writes raw bits to the field"]
619 #[inline(always)]
620 pub fn bit(self, value: bool) -> &'a mut W {
621 self.w.bits = (self.w.bits & !(0x01 << 23)) | (((value as u32) & 0x01) << 23);
622 self.w
623 }
624}
625#[doc = "Reader of field `MXUC`"]
626pub type MXUC_R = crate::R<bool, bool>;
627#[doc = "Write proxy for field `MXUC`"]
628pub struct MXUC_W<'a> {
629 w: &'a mut W,
630}
631impl<'a> MXUC_W<'a> {
632 #[doc = r"Sets the field bit"]
633 #[inline(always)]
634 pub fn set_bit(self) -> &'a mut W {
635 self.bit(true)
636 }
637 #[doc = r"Clears the field bit"]
638 #[inline(always)]
639 pub fn clear_bit(self) -> &'a mut W {
640 self.bit(false)
641 }
642 #[doc = r"Writes raw bits to the field"]
643 #[inline(always)]
644 pub fn bit(self, value: bool) -> &'a mut W {
645 self.w.bits = (self.w.bits & !(0x01 << 24)) | (((value as u32) & 0x01) << 24);
646 self.w
647 }
648}
649#[doc = "Reader of field `EMACMPEN`"]
650pub type EMACMPEN_R = crate::R<bool, bool>;
651#[doc = "Write proxy for field `EMACMPEN`"]
652pub struct EMACMPEN_W<'a> {
653 w: &'a mut W,
654}
655impl<'a> EMACMPEN_W<'a> {
656 #[doc = r"Sets the field bit"]
657 #[inline(always)]
658 pub fn set_bit(self) -> &'a mut W {
659 self.bit(true)
660 }
661 #[doc = r"Clears the field bit"]
662 #[inline(always)]
663 pub fn clear_bit(self) -> &'a mut W {
664 self.bit(false)
665 }
666 #[doc = r"Writes raw bits to the field"]
667 #[inline(always)]
668 pub fn bit(self, value: bool) -> &'a mut W {
669 self.w.bits = (self.w.bits & !(0x01 << 25)) | (((value as u32) & 0x01) << 25);
670 self.w
671 }
672}
673#[doc = "Reader of field `WARMUPMODE`"]
674pub type WARMUPMODE_R = crate::R<bool, bool>;
675#[doc = "Write proxy for field `WARMUPMODE`"]
676pub struct WARMUPMODE_W<'a> {
677 w: &'a mut W,
678}
679impl<'a> WARMUPMODE_W<'a> {
680 #[doc = r"Sets the field bit"]
681 #[inline(always)]
682 pub fn set_bit(self) -> &'a mut W {
683 self.bit(true)
684 }
685 #[doc = r"Clears the field bit"]
686 #[inline(always)]
687 pub fn clear_bit(self) -> &'a mut W {
688 self.bit(false)
689 }
690 #[doc = r"Writes raw bits to the field"]
691 #[inline(always)]
692 pub fn bit(self, value: bool) -> &'a mut W {
693 self.w.bits = (self.w.bits & !(0x01 << 26)) | (((value as u32) & 0x01) << 26);
694 self.w
695 }
696}
697#[doc = "Reader of field `LOCALSENS`"]
698pub type LOCALSENS_R = crate::R<bool, bool>;
699#[doc = "Write proxy for field `LOCALSENS`"]
700pub struct LOCALSENS_W<'a> {
701 w: &'a mut W,
702}
703impl<'a> LOCALSENS_W<'a> {
704 #[doc = r"Sets the field bit"]
705 #[inline(always)]
706 pub fn set_bit(self) -> &'a mut W {
707 self.bit(true)
708 }
709 #[doc = r"Clears the field bit"]
710 #[inline(always)]
711 pub fn clear_bit(self) -> &'a mut W {
712 self.bit(false)
713 }
714 #[doc = r"Writes raw bits to the field"]
715 #[inline(always)]
716 pub fn bit(self, value: bool) -> &'a mut W {
717 self.w.bits = (self.w.bits & !(0x01 << 27)) | (((value as u32) & 0x01) << 27);
718 self.w
719 }
720}
721#[doc = "Reader of field `CPACCURACY`"]
722pub type CPACCURACY_R = crate::R<bool, bool>;
723#[doc = "Write proxy for field `CPACCURACY`"]
724pub struct CPACCURACY_W<'a> {
725 w: &'a mut W,
726}
727impl<'a> CPACCURACY_W<'a> {
728 #[doc = r"Sets the field bit"]
729 #[inline(always)]
730 pub fn set_bit(self) -> &'a mut W {
731 self.bit(true)
732 }
733 #[doc = r"Clears the field bit"]
734 #[inline(always)]
735 pub fn clear_bit(self) -> &'a mut W {
736 self.bit(false)
737 }
738 #[doc = r"Writes raw bits to the field"]
739 #[inline(always)]
740 pub fn bit(self, value: bool) -> &'a mut W {
741 self.w.bits = (self.w.bits & !(0x01 << 28)) | (((value as u32) & 0x01) << 28);
742 self.w
743 }
744}
745impl R {
746 #[doc = "Bit 1 - CSEN Enable"]
747 #[inline(always)]
748 pub fn en(&self) -> EN_R {
749 EN_R::new(((self.bits >> 1) & 0x01) != 0)
750 }
751 #[doc = "Bit 2 - CSEN Digital Comparator Polarity Select"]
752 #[inline(always)]
753 pub fn cmppol(&self) -> CMPPOL_R {
754 CMPPOL_R::new(((self.bits >> 2) & 0x01) != 0)
755 }
756 #[doc = "Bits 4:5 - CSEN Conversion Mode Select"]
757 #[inline(always)]
758 pub fn cm(&self) -> CM_R {
759 CM_R::new(((self.bits >> 4) & 0x03) as u8)
760 }
761 #[doc = "Bits 8:9 - SAR Conversion Resolution."]
762 #[inline(always)]
763 pub fn sarcr(&self) -> SARCR_R {
764 SARCR_R::new(((self.bits >> 8) & 0x03) as u8)
765 }
766 #[doc = "Bits 12:14 - CSEN Accumulator Mode Select"]
767 #[inline(always)]
768 pub fn acu(&self) -> ACU_R {
769 ACU_R::new(((self.bits >> 12) & 0x07) as u8)
770 }
771 #[doc = "Bit 15 - CSEN Multiple Channel Enable"]
772 #[inline(always)]
773 pub fn mcen(&self) -> MCEN_R {
774 MCEN_R::new(((self.bits >> 15) & 0x01) != 0)
775 }
776 #[doc = "Bits 16:17 - Start Trigger Select"]
777 #[inline(always)]
778 pub fn stm(&self) -> STM_R {
779 STM_R::new(((self.bits >> 16) & 0x03) as u8)
780 }
781 #[doc = "Bit 18 - CSEN Digital Comparator Enable"]
782 #[inline(always)]
783 pub fn cmpen(&self) -> CMPEN_R {
784 CMPEN_R::new(((self.bits >> 18) & 0x01) != 0)
785 }
786 #[doc = "Bit 19 - CSEN Disable Right-Shift"]
787 #[inline(always)]
788 pub fn drsf(&self) -> DRSF_R {
789 DRSF_R::new(((self.bits >> 19) & 0x01) != 0)
790 }
791 #[doc = "Bit 20 - CSEN DMA Enable Bit"]
792 #[inline(always)]
793 pub fn dmaen(&self) -> DMAEN_R {
794 DMAEN_R::new(((self.bits >> 20) & 0x01) != 0)
795 }
796 #[doc = "Bit 21 - CSEN Converter Select"]
797 #[inline(always)]
798 pub fn convsel(&self) -> CONVSEL_R {
799 CONVSEL_R::new(((self.bits >> 21) & 0x01) != 0)
800 }
801 #[doc = "Bit 22 - CSEN Chop Enable"]
802 #[inline(always)]
803 pub fn chopen(&self) -> CHOPEN_R {
804 CHOPEN_R::new(((self.bits >> 22) & 0x01) != 0)
805 }
806 #[doc = "Bit 23 - CSEN Automatic Ground Enable"]
807 #[inline(always)]
808 pub fn autognd(&self) -> AUTOGND_R {
809 AUTOGND_R::new(((self.bits >> 23) & 0x01) != 0)
810 }
811 #[doc = "Bit 24 - CSEN Mux Disconnect"]
812 #[inline(always)]
813 pub fn mxuc(&self) -> MXUC_R {
814 MXUC_R::new(((self.bits >> 24) & 0x01) != 0)
815 }
816 #[doc = "Bit 25 - Greater and Less Than Comparison Using the Exponential Moving Average (EMA) is Enabled"]
817 #[inline(always)]
818 pub fn emacmpen(&self) -> EMACMPEN_R {
819 EMACMPEN_R::new(((self.bits >> 25) & 0x01) != 0)
820 }
821 #[doc = "Bit 26 - Select Warmup Mode for CSEN"]
822 #[inline(always)]
823 pub fn warmupmode(&self) -> WARMUPMODE_R {
824 WARMUPMODE_R::new(((self.bits >> 26) & 0x01) != 0)
825 }
826 #[doc = "Bit 27 - Local Sensing Enable"]
827 #[inline(always)]
828 pub fn localsens(&self) -> LOCALSENS_R {
829 LOCALSENS_R::new(((self.bits >> 27) & 0x01) != 0)
830 }
831 #[doc = "Bit 28 - Charge Pump Accuracy"]
832 #[inline(always)]
833 pub fn cpaccuracy(&self) -> CPACCURACY_R {
834 CPACCURACY_R::new(((self.bits >> 28) & 0x01) != 0)
835 }
836}
837impl W {
838 #[doc = "Bit 1 - CSEN Enable"]
839 #[inline(always)]
840 pub fn en(&mut self) -> EN_W {
841 EN_W { w: self }
842 }
843 #[doc = "Bit 2 - CSEN Digital Comparator Polarity Select"]
844 #[inline(always)]
845 pub fn cmppol(&mut self) -> CMPPOL_W {
846 CMPPOL_W { w: self }
847 }
848 #[doc = "Bits 4:5 - CSEN Conversion Mode Select"]
849 #[inline(always)]
850 pub fn cm(&mut self) -> CM_W {
851 CM_W { w: self }
852 }
853 #[doc = "Bits 8:9 - SAR Conversion Resolution."]
854 #[inline(always)]
855 pub fn sarcr(&mut self) -> SARCR_W {
856 SARCR_W { w: self }
857 }
858 #[doc = "Bits 12:14 - CSEN Accumulator Mode Select"]
859 #[inline(always)]
860 pub fn acu(&mut self) -> ACU_W {
861 ACU_W { w: self }
862 }
863 #[doc = "Bit 15 - CSEN Multiple Channel Enable"]
864 #[inline(always)]
865 pub fn mcen(&mut self) -> MCEN_W {
866 MCEN_W { w: self }
867 }
868 #[doc = "Bits 16:17 - Start Trigger Select"]
869 #[inline(always)]
870 pub fn stm(&mut self) -> STM_W {
871 STM_W { w: self }
872 }
873 #[doc = "Bit 18 - CSEN Digital Comparator Enable"]
874 #[inline(always)]
875 pub fn cmpen(&mut self) -> CMPEN_W {
876 CMPEN_W { w: self }
877 }
878 #[doc = "Bit 19 - CSEN Disable Right-Shift"]
879 #[inline(always)]
880 pub fn drsf(&mut self) -> DRSF_W {
881 DRSF_W { w: self }
882 }
883 #[doc = "Bit 20 - CSEN DMA Enable Bit"]
884 #[inline(always)]
885 pub fn dmaen(&mut self) -> DMAEN_W {
886 DMAEN_W { w: self }
887 }
888 #[doc = "Bit 21 - CSEN Converter Select"]
889 #[inline(always)]
890 pub fn convsel(&mut self) -> CONVSEL_W {
891 CONVSEL_W { w: self }
892 }
893 #[doc = "Bit 22 - CSEN Chop Enable"]
894 #[inline(always)]
895 pub fn chopen(&mut self) -> CHOPEN_W {
896 CHOPEN_W { w: self }
897 }
898 #[doc = "Bit 23 - CSEN Automatic Ground Enable"]
899 #[inline(always)]
900 pub fn autognd(&mut self) -> AUTOGND_W {
901 AUTOGND_W { w: self }
902 }
903 #[doc = "Bit 24 - CSEN Mux Disconnect"]
904 #[inline(always)]
905 pub fn mxuc(&mut self) -> MXUC_W {
906 MXUC_W { w: self }
907 }
908 #[doc = "Bit 25 - Greater and Less Than Comparison Using the Exponential Moving Average (EMA) is Enabled"]
909 #[inline(always)]
910 pub fn emacmpen(&mut self) -> EMACMPEN_W {
911 EMACMPEN_W { w: self }
912 }
913 #[doc = "Bit 26 - Select Warmup Mode for CSEN"]
914 #[inline(always)]
915 pub fn warmupmode(&mut self) -> WARMUPMODE_W {
916 WARMUPMODE_W { w: self }
917 }
918 #[doc = "Bit 27 - Local Sensing Enable"]
919 #[inline(always)]
920 pub fn localsens(&mut self) -> LOCALSENS_W {
921 LOCALSENS_W { w: self }
922 }
923 #[doc = "Bit 28 - Charge Pump Accuracy"]
924 #[inline(always)]
925 pub fn cpaccuracy(&mut self) -> CPACCURACY_W {
926 CPACCURACY_W { w: self }
927 }
928}