efm32pg12_pac/cmu/
lfxoctrl.rs

1#[doc = "Reader of register LFXOCTRL"]
2pub type R = crate::R<u32, super::LFXOCTRL>;
3#[doc = "Writer for register LFXOCTRL"]
4pub type W = crate::W<u32, super::LFXOCTRL>;
5#[doc = "Register LFXOCTRL `reset()`'s with value 0x0700_9000"]
6impl crate::ResetValue for super::LFXOCTRL {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0x0700_9000
11    }
12}
13#[doc = "Reader of field `TUNING`"]
14pub type TUNING_R = crate::R<u8, u8>;
15#[doc = "Write proxy for field `TUNING`"]
16pub struct TUNING_W<'a> {
17    w: &'a mut W,
18}
19impl<'a> TUNING_W<'a> {
20    #[doc = r"Writes raw bits to the field"]
21    #[inline(always)]
22    pub unsafe fn bits(self, value: u8) -> &'a mut W {
23        self.w.bits = (self.w.bits & !0x7f) | ((value as u32) & 0x7f);
24        self.w
25    }
26}
27#[doc = "LFXO Mode\n\nValue on reset: 0"]
28#[derive(Clone, Copy, Debug, PartialEq)]
29#[repr(u8)]
30pub enum MODE_A {
31    #[doc = "0: 32768 Hz crystal oscillator"]
32    XTAL = 0,
33    #[doc = "1: An AC coupled buffer is coupled in series with LFXTAL_N pin, suitable for external sinus wave (32768 Hz)."]
34    BUFEXTCLK = 1,
35    #[doc = "2: Digital external clock on LFXTAL_N pin. Oscillator is effectively bypassed."]
36    DIGEXTCLK = 2,
37}
38impl From<MODE_A> for u8 {
39    #[inline(always)]
40    fn from(variant: MODE_A) -> Self {
41        variant as _
42    }
43}
44#[doc = "Reader of field `MODE`"]
45pub type MODE_R = crate::R<u8, MODE_A>;
46impl MODE_R {
47    #[doc = r"Get enumerated values variant"]
48    #[inline(always)]
49    pub fn variant(&self) -> crate::Variant<u8, MODE_A> {
50        use crate::Variant::*;
51        match self.bits {
52            0 => Val(MODE_A::XTAL),
53            1 => Val(MODE_A::BUFEXTCLK),
54            2 => Val(MODE_A::DIGEXTCLK),
55            i => Res(i),
56        }
57    }
58    #[doc = "Checks if the value of the field is `XTAL`"]
59    #[inline(always)]
60    pub fn is_xtal(&self) -> bool {
61        *self == MODE_A::XTAL
62    }
63    #[doc = "Checks if the value of the field is `BUFEXTCLK`"]
64    #[inline(always)]
65    pub fn is_bufextclk(&self) -> bool {
66        *self == MODE_A::BUFEXTCLK
67    }
68    #[doc = "Checks if the value of the field is `DIGEXTCLK`"]
69    #[inline(always)]
70    pub fn is_digextclk(&self) -> bool {
71        *self == MODE_A::DIGEXTCLK
72    }
73}
74#[doc = "Write proxy for field `MODE`"]
75pub struct MODE_W<'a> {
76    w: &'a mut W,
77}
78impl<'a> MODE_W<'a> {
79    #[doc = r"Writes `variant` to the field"]
80    #[inline(always)]
81    pub fn variant(self, variant: MODE_A) -> &'a mut W {
82        unsafe { self.bits(variant.into()) }
83    }
84    #[doc = "32768 Hz crystal oscillator"]
85    #[inline(always)]
86    pub fn xtal(self) -> &'a mut W {
87        self.variant(MODE_A::XTAL)
88    }
89    #[doc = "An AC coupled buffer is coupled in series with LFXTAL_N pin, suitable for external sinus wave (32768 Hz)."]
90    #[inline(always)]
91    pub fn bufextclk(self) -> &'a mut W {
92        self.variant(MODE_A::BUFEXTCLK)
93    }
94    #[doc = "Digital external clock on LFXTAL_N pin. Oscillator is effectively bypassed."]
95    #[inline(always)]
96    pub fn digextclk(self) -> &'a mut W {
97        self.variant(MODE_A::DIGEXTCLK)
98    }
99    #[doc = r"Writes raw bits to the field"]
100    #[inline(always)]
101    pub unsafe fn bits(self, value: u8) -> &'a mut W {
102        self.w.bits = (self.w.bits & !(0x03 << 8)) | (((value as u32) & 0x03) << 8);
103        self.w
104    }
105}
106#[doc = "Reader of field `GAIN`"]
107pub type GAIN_R = crate::R<u8, u8>;
108#[doc = "Write proxy for field `GAIN`"]
109pub struct GAIN_W<'a> {
110    w: &'a mut W,
111}
112impl<'a> GAIN_W<'a> {
113    #[doc = r"Writes raw bits to the field"]
114    #[inline(always)]
115    pub unsafe fn bits(self, value: u8) -> &'a mut W {
116        self.w.bits = (self.w.bits & !(0x03 << 11)) | (((value as u32) & 0x03) << 11);
117        self.w
118    }
119}
120#[doc = "Reader of field `HIGHAMPL`"]
121pub type HIGHAMPL_R = crate::R<bool, bool>;
122#[doc = "Write proxy for field `HIGHAMPL`"]
123pub struct HIGHAMPL_W<'a> {
124    w: &'a mut W,
125}
126impl<'a> HIGHAMPL_W<'a> {
127    #[doc = r"Sets the field bit"]
128    #[inline(always)]
129    pub fn set_bit(self) -> &'a mut W {
130        self.bit(true)
131    }
132    #[doc = r"Clears the field bit"]
133    #[inline(always)]
134    pub fn clear_bit(self) -> &'a mut W {
135        self.bit(false)
136    }
137    #[doc = r"Writes raw bits to the field"]
138    #[inline(always)]
139    pub fn bit(self, value: bool) -> &'a mut W {
140        self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14);
141        self.w
142    }
143}
144#[doc = "Reader of field `AGC`"]
145pub type AGC_R = crate::R<bool, bool>;
146#[doc = "Write proxy for field `AGC`"]
147pub struct AGC_W<'a> {
148    w: &'a mut W,
149}
150impl<'a> AGC_W<'a> {
151    #[doc = r"Sets the field bit"]
152    #[inline(always)]
153    pub fn set_bit(self) -> &'a mut W {
154        self.bit(true)
155    }
156    #[doc = r"Clears the field bit"]
157    #[inline(always)]
158    pub fn clear_bit(self) -> &'a mut W {
159        self.bit(false)
160    }
161    #[doc = r"Writes raw bits to the field"]
162    #[inline(always)]
163    pub fn bit(self, value: bool) -> &'a mut W {
164        self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15);
165        self.w
166    }
167}
168#[doc = "Reader of field `CUR`"]
169pub type CUR_R = crate::R<u8, u8>;
170#[doc = "Write proxy for field `CUR`"]
171pub struct CUR_W<'a> {
172    w: &'a mut W,
173}
174impl<'a> CUR_W<'a> {
175    #[doc = r"Writes raw bits to the field"]
176    #[inline(always)]
177    pub unsafe fn bits(self, value: u8) -> &'a mut W {
178        self.w.bits = (self.w.bits & !(0x03 << 16)) | (((value as u32) & 0x03) << 16);
179        self.w
180    }
181}
182#[doc = "Reader of field `BUFCUR`"]
183pub type BUFCUR_R = crate::R<bool, bool>;
184#[doc = "Write proxy for field `BUFCUR`"]
185pub struct BUFCUR_W<'a> {
186    w: &'a mut W,
187}
188impl<'a> BUFCUR_W<'a> {
189    #[doc = r"Sets the field bit"]
190    #[inline(always)]
191    pub fn set_bit(self) -> &'a mut W {
192        self.bit(true)
193    }
194    #[doc = r"Clears the field bit"]
195    #[inline(always)]
196    pub fn clear_bit(self) -> &'a mut W {
197        self.bit(false)
198    }
199    #[doc = r"Writes raw bits to the field"]
200    #[inline(always)]
201    pub fn bit(self, value: bool) -> &'a mut W {
202        self.w.bits = (self.w.bits & !(0x01 << 20)) | (((value as u32) & 0x01) << 20);
203        self.w
204    }
205}
206#[doc = "LFXO Timeout\n\nValue on reset: 7"]
207#[derive(Clone, Copy, Debug, PartialEq)]
208#[repr(u8)]
209pub enum TIMEOUT_A {
210    #[doc = "0: Timeout period of 2 cycles"]
211    _2CYCLES = 0,
212    #[doc = "1: Timeout period of 256 cycles"]
213    _256CYCLES = 1,
214    #[doc = "2: Timeout period of 1024 cycles"]
215    _1KCYCLES = 2,
216    #[doc = "3: Timeout period of 2048 cycles"]
217    _2KCYCLES = 3,
218    #[doc = "4: Timeout period of 4096 cycles"]
219    _4KCYCLES = 4,
220    #[doc = "5: Timeout period of 8192 cycles"]
221    _8KCYCLES = 5,
222    #[doc = "6: Timeout period of 16384 cycles"]
223    _16KCYCLES = 6,
224    #[doc = "7: Timeout period of 32768 cycles"]
225    _32KCYCLES = 7,
226}
227impl From<TIMEOUT_A> for u8 {
228    #[inline(always)]
229    fn from(variant: TIMEOUT_A) -> Self {
230        variant as _
231    }
232}
233#[doc = "Reader of field `TIMEOUT`"]
234pub type TIMEOUT_R = crate::R<u8, TIMEOUT_A>;
235impl TIMEOUT_R {
236    #[doc = r"Get enumerated values variant"]
237    #[inline(always)]
238    pub fn variant(&self) -> TIMEOUT_A {
239        match self.bits {
240            0 => TIMEOUT_A::_2CYCLES,
241            1 => TIMEOUT_A::_256CYCLES,
242            2 => TIMEOUT_A::_1KCYCLES,
243            3 => TIMEOUT_A::_2KCYCLES,
244            4 => TIMEOUT_A::_4KCYCLES,
245            5 => TIMEOUT_A::_8KCYCLES,
246            6 => TIMEOUT_A::_16KCYCLES,
247            7 => TIMEOUT_A::_32KCYCLES,
248            _ => unreachable!(),
249        }
250    }
251    #[doc = "Checks if the value of the field is `_2CYCLES`"]
252    #[inline(always)]
253    pub fn is_2cycles(&self) -> bool {
254        *self == TIMEOUT_A::_2CYCLES
255    }
256    #[doc = "Checks if the value of the field is `_256CYCLES`"]
257    #[inline(always)]
258    pub fn is_256cycles(&self) -> bool {
259        *self == TIMEOUT_A::_256CYCLES
260    }
261    #[doc = "Checks if the value of the field is `_1KCYCLES`"]
262    #[inline(always)]
263    pub fn is_1kcycles(&self) -> bool {
264        *self == TIMEOUT_A::_1KCYCLES
265    }
266    #[doc = "Checks if the value of the field is `_2KCYCLES`"]
267    #[inline(always)]
268    pub fn is_2kcycles(&self) -> bool {
269        *self == TIMEOUT_A::_2KCYCLES
270    }
271    #[doc = "Checks if the value of the field is `_4KCYCLES`"]
272    #[inline(always)]
273    pub fn is_4kcycles(&self) -> bool {
274        *self == TIMEOUT_A::_4KCYCLES
275    }
276    #[doc = "Checks if the value of the field is `_8KCYCLES`"]
277    #[inline(always)]
278    pub fn is_8kcycles(&self) -> bool {
279        *self == TIMEOUT_A::_8KCYCLES
280    }
281    #[doc = "Checks if the value of the field is `_16KCYCLES`"]
282    #[inline(always)]
283    pub fn is_16kcycles(&self) -> bool {
284        *self == TIMEOUT_A::_16KCYCLES
285    }
286    #[doc = "Checks if the value of the field is `_32KCYCLES`"]
287    #[inline(always)]
288    pub fn is_32kcycles(&self) -> bool {
289        *self == TIMEOUT_A::_32KCYCLES
290    }
291}
292#[doc = "Write proxy for field `TIMEOUT`"]
293pub struct TIMEOUT_W<'a> {
294    w: &'a mut W,
295}
296impl<'a> TIMEOUT_W<'a> {
297    #[doc = r"Writes `variant` to the field"]
298    #[inline(always)]
299    pub fn variant(self, variant: TIMEOUT_A) -> &'a mut W {
300        {
301            self.bits(variant.into())
302        }
303    }
304    #[doc = "Timeout period of 2 cycles"]
305    #[inline(always)]
306    pub fn _2cycles(self) -> &'a mut W {
307        self.variant(TIMEOUT_A::_2CYCLES)
308    }
309    #[doc = "Timeout period of 256 cycles"]
310    #[inline(always)]
311    pub fn _256cycles(self) -> &'a mut W {
312        self.variant(TIMEOUT_A::_256CYCLES)
313    }
314    #[doc = "Timeout period of 1024 cycles"]
315    #[inline(always)]
316    pub fn _1kcycles(self) -> &'a mut W {
317        self.variant(TIMEOUT_A::_1KCYCLES)
318    }
319    #[doc = "Timeout period of 2048 cycles"]
320    #[inline(always)]
321    pub fn _2kcycles(self) -> &'a mut W {
322        self.variant(TIMEOUT_A::_2KCYCLES)
323    }
324    #[doc = "Timeout period of 4096 cycles"]
325    #[inline(always)]
326    pub fn _4kcycles(self) -> &'a mut W {
327        self.variant(TIMEOUT_A::_4KCYCLES)
328    }
329    #[doc = "Timeout period of 8192 cycles"]
330    #[inline(always)]
331    pub fn _8kcycles(self) -> &'a mut W {
332        self.variant(TIMEOUT_A::_8KCYCLES)
333    }
334    #[doc = "Timeout period of 16384 cycles"]
335    #[inline(always)]
336    pub fn _16kcycles(self) -> &'a mut W {
337        self.variant(TIMEOUT_A::_16KCYCLES)
338    }
339    #[doc = "Timeout period of 32768 cycles"]
340    #[inline(always)]
341    pub fn _32kcycles(self) -> &'a mut W {
342        self.variant(TIMEOUT_A::_32KCYCLES)
343    }
344    #[doc = r"Writes raw bits to the field"]
345    #[inline(always)]
346    pub fn bits(self, value: u8) -> &'a mut W {
347        self.w.bits = (self.w.bits & !(0x07 << 24)) | (((value as u32) & 0x07) << 24);
348        self.w
349    }
350}
351impl R {
352    #[doc = "Bits 0:6 - LFXO Internal Capacitor Array Tuning Value"]
353    #[inline(always)]
354    pub fn tuning(&self) -> TUNING_R {
355        TUNING_R::new((self.bits & 0x7f) as u8)
356    }
357    #[doc = "Bits 8:9 - LFXO Mode"]
358    #[inline(always)]
359    pub fn mode(&self) -> MODE_R {
360        MODE_R::new(((self.bits >> 8) & 0x03) as u8)
361    }
362    #[doc = "Bits 11:12 - LFXO Startup Gain"]
363    #[inline(always)]
364    pub fn gain(&self) -> GAIN_R {
365        GAIN_R::new(((self.bits >> 11) & 0x03) as u8)
366    }
367    #[doc = "Bit 14 - LFXO High XTAL Oscillation Amplitude Enable"]
368    #[inline(always)]
369    pub fn highampl(&self) -> HIGHAMPL_R {
370        HIGHAMPL_R::new(((self.bits >> 14) & 0x01) != 0)
371    }
372    #[doc = "Bit 15 - LFXO AGC Enable"]
373    #[inline(always)]
374    pub fn agc(&self) -> AGC_R {
375        AGC_R::new(((self.bits >> 15) & 0x01) != 0)
376    }
377    #[doc = "Bits 16:17 - LFXO Current Trim"]
378    #[inline(always)]
379    pub fn cur(&self) -> CUR_R {
380        CUR_R::new(((self.bits >> 16) & 0x03) as u8)
381    }
382    #[doc = "Bit 20 - LFXO Buffer Bias Current"]
383    #[inline(always)]
384    pub fn bufcur(&self) -> BUFCUR_R {
385        BUFCUR_R::new(((self.bits >> 20) & 0x01) != 0)
386    }
387    #[doc = "Bits 24:26 - LFXO Timeout"]
388    #[inline(always)]
389    pub fn timeout(&self) -> TIMEOUT_R {
390        TIMEOUT_R::new(((self.bits >> 24) & 0x07) as u8)
391    }
392}
393impl W {
394    #[doc = "Bits 0:6 - LFXO Internal Capacitor Array Tuning Value"]
395    #[inline(always)]
396    pub fn tuning(&mut self) -> TUNING_W {
397        TUNING_W { w: self }
398    }
399    #[doc = "Bits 8:9 - LFXO Mode"]
400    #[inline(always)]
401    pub fn mode(&mut self) -> MODE_W {
402        MODE_W { w: self }
403    }
404    #[doc = "Bits 11:12 - LFXO Startup Gain"]
405    #[inline(always)]
406    pub fn gain(&mut self) -> GAIN_W {
407        GAIN_W { w: self }
408    }
409    #[doc = "Bit 14 - LFXO High XTAL Oscillation Amplitude Enable"]
410    #[inline(always)]
411    pub fn highampl(&mut self) -> HIGHAMPL_W {
412        HIGHAMPL_W { w: self }
413    }
414    #[doc = "Bit 15 - LFXO AGC Enable"]
415    #[inline(always)]
416    pub fn agc(&mut self) -> AGC_W {
417        AGC_W { w: self }
418    }
419    #[doc = "Bits 16:17 - LFXO Current Trim"]
420    #[inline(always)]
421    pub fn cur(&mut self) -> CUR_W {
422        CUR_W { w: self }
423    }
424    #[doc = "Bit 20 - LFXO Buffer Bias Current"]
425    #[inline(always)]
426    pub fn bufcur(&mut self) -> BUFCUR_W {
427        BUFCUR_W { w: self }
428    }
429    #[doc = "Bits 24:26 - LFXO Timeout"]
430    #[inline(always)]
431    pub fn timeout(&mut self) -> TIMEOUT_W {
432        TIMEOUT_W { w: self }
433    }
434}
efm32pg12_pac/cmu/lfxoctrl.rs

efm32pg12_pac/cmu/
lfxoctrl.rs
