efm32pg12_pac/cmu/
lfbpresc0.rs

1#[doc = "Reader of register LFBPRESC0"]
2pub type R = crate::R<u32, super::LFBPRESC0>;
3#[doc = "Writer for register LFBPRESC0"]
4pub type W = crate::W<u32, super::LFBPRESC0>;
5#[doc = "Register LFBPRESC0 `reset()`'s with value 0"]
6impl crate::ResetValue for super::LFBPRESC0 {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "Prescaler\n\nValue on reset: 0"]
14#[derive(Clone, Copy, Debug, PartialEq)]
15#[repr(u8)]
16pub enum SYSTICK_A {
17    #[doc = "0: LFBCLKSYSTICK = LFBCLK"]
18    DIV1 = 0,
19}
20impl From<SYSTICK_A> for u8 {
21    #[inline(always)]
22    fn from(variant: SYSTICK_A) -> Self {
23        variant as _
24    }
25}
26#[doc = "Reader of field `SYSTICK`"]
27pub type SYSTICK_R = crate::R<u8, SYSTICK_A>;
28impl SYSTICK_R {
29    #[doc = r"Get enumerated values variant"]
30    #[inline(always)]
31    pub fn variant(&self) -> crate::Variant<u8, SYSTICK_A> {
32        use crate::Variant::*;
33        match self.bits {
34            0 => Val(SYSTICK_A::DIV1),
35            i => Res(i),
36        }
37    }
38    #[doc = "Checks if the value of the field is `DIV1`"]
39    #[inline(always)]
40    pub fn is_div1(&self) -> bool {
41        *self == SYSTICK_A::DIV1
42    }
43}
44#[doc = "Low Energy UART 0 Prescaler\n\nValue on reset: 0"]
45#[derive(Clone, Copy, Debug, PartialEq)]
46#[repr(u8)]
47pub enum LEUART0_A {
48    #[doc = "0: LFBCLKLEUART0 = LFBCLK"]
49    DIV1 = 0,
50    #[doc = "1: LFBCLKLEUART0 = LFBCLK/2"]
51    DIV2 = 1,
52    #[doc = "2: LFBCLKLEUART0 = LFBCLK/4"]
53    DIV4 = 2,
54    #[doc = "3: LFBCLKLEUART0 = LFBCLK/8"]
55    DIV8 = 3,
56}
57impl From<LEUART0_A> for u8 {
58    #[inline(always)]
59    fn from(variant: LEUART0_A) -> Self {
60        variant as _
61    }
62}
63#[doc = "Reader of field `LEUART0`"]
64pub type LEUART0_R = crate::R<u8, LEUART0_A>;
65impl LEUART0_R {
66    #[doc = r"Get enumerated values variant"]
67    #[inline(always)]
68    pub fn variant(&self) -> LEUART0_A {
69        match self.bits {
70            0 => LEUART0_A::DIV1,
71            1 => LEUART0_A::DIV2,
72            2 => LEUART0_A::DIV4,
73            3 => LEUART0_A::DIV8,
74            _ => unreachable!(),
75        }
76    }
77    #[doc = "Checks if the value of the field is `DIV1`"]
78    #[inline(always)]
79    pub fn is_div1(&self) -> bool {
80        *self == LEUART0_A::DIV1
81    }
82    #[doc = "Checks if the value of the field is `DIV2`"]
83    #[inline(always)]
84    pub fn is_div2(&self) -> bool {
85        *self == LEUART0_A::DIV2
86    }
87    #[doc = "Checks if the value of the field is `DIV4`"]
88    #[inline(always)]
89    pub fn is_div4(&self) -> bool {
90        *self == LEUART0_A::DIV4
91    }
92    #[doc = "Checks if the value of the field is `DIV8`"]
93    #[inline(always)]
94    pub fn is_div8(&self) -> bool {
95        *self == LEUART0_A::DIV8
96    }
97}
98#[doc = "Write proxy for field `LEUART0`"]
99pub struct LEUART0_W<'a> {
100    w: &'a mut W,
101}
102impl<'a> LEUART0_W<'a> {
103    #[doc = r"Writes `variant` to the field"]
104    #[inline(always)]
105    pub fn variant(self, variant: LEUART0_A) -> &'a mut W {
106        {
107            self.bits(variant.into())
108        }
109    }
110    #[doc = "LFBCLKLEUART0 = LFBCLK"]
111    #[inline(always)]
112    pub fn div1(self) -> &'a mut W {
113        self.variant(LEUART0_A::DIV1)
114    }
115    #[doc = "LFBCLKLEUART0 = LFBCLK/2"]
116    #[inline(always)]
117    pub fn div2(self) -> &'a mut W {
118        self.variant(LEUART0_A::DIV2)
119    }
120    #[doc = "LFBCLKLEUART0 = LFBCLK/4"]
121    #[inline(always)]
122    pub fn div4(self) -> &'a mut W {
123        self.variant(LEUART0_A::DIV4)
124    }
125    #[doc = "LFBCLKLEUART0 = LFBCLK/8"]
126    #[inline(always)]
127    pub fn div8(self) -> &'a mut W {
128        self.variant(LEUART0_A::DIV8)
129    }
130    #[doc = r"Writes raw bits to the field"]
131    #[inline(always)]
132    pub fn bits(self, value: u8) -> &'a mut W {
133        self.w.bits = (self.w.bits & !(0x03 << 4)) | (((value as u32) & 0x03) << 4);
134        self.w
135    }
136}
137#[doc = "Capacitive touch sense module Prescaler\n\nValue on reset: 0"]
138#[derive(Clone, Copy, Debug, PartialEq)]
139#[repr(u8)]
140pub enum CSEN_A {
141    #[doc = "0: LFBCLKCSEN = LFBCLK/16"]
142    DIV16 = 0,
143    #[doc = "1: LFBCLKCSEN = LFBCLK/32"]
144    DIV32 = 1,
145    #[doc = "2: LFBCLKCSEN = LFBCLK/64"]
146    DIV64 = 2,
147    #[doc = "3: LFBCLKCSEN = LFBCLK/128"]
148    DIV128 = 3,
149}
150impl From<CSEN_A> for u8 {
151    #[inline(always)]
152    fn from(variant: CSEN_A) -> Self {
153        variant as _
154    }
155}
156#[doc = "Reader of field `CSEN`"]
157pub type CSEN_R = crate::R<u8, CSEN_A>;
158impl CSEN_R {
159    #[doc = r"Get enumerated values variant"]
160    #[inline(always)]
161    pub fn variant(&self) -> CSEN_A {
162        match self.bits {
163            0 => CSEN_A::DIV16,
164            1 => CSEN_A::DIV32,
165            2 => CSEN_A::DIV64,
166            3 => CSEN_A::DIV128,
167            _ => unreachable!(),
168        }
169    }
170    #[doc = "Checks if the value of the field is `DIV16`"]
171    #[inline(always)]
172    pub fn is_div16(&self) -> bool {
173        *self == CSEN_A::DIV16
174    }
175    #[doc = "Checks if the value of the field is `DIV32`"]
176    #[inline(always)]
177    pub fn is_div32(&self) -> bool {
178        *self == CSEN_A::DIV32
179    }
180    #[doc = "Checks if the value of the field is `DIV64`"]
181    #[inline(always)]
182    pub fn is_div64(&self) -> bool {
183        *self == CSEN_A::DIV64
184    }
185    #[doc = "Checks if the value of the field is `DIV128`"]
186    #[inline(always)]
187    pub fn is_div128(&self) -> bool {
188        *self == CSEN_A::DIV128
189    }
190}
191#[doc = "Write proxy for field `CSEN`"]
192pub struct CSEN_W<'a> {
193    w: &'a mut W,
194}
195impl<'a> CSEN_W<'a> {
196    #[doc = r"Writes `variant` to the field"]
197    #[inline(always)]
198    pub fn variant(self, variant: CSEN_A) -> &'a mut W {
199        {
200            self.bits(variant.into())
201        }
202    }
203    #[doc = "LFBCLKCSEN = LFBCLK/16"]
204    #[inline(always)]
205    pub fn div16(self) -> &'a mut W {
206        self.variant(CSEN_A::DIV16)
207    }
208    #[doc = "LFBCLKCSEN = LFBCLK/32"]
209    #[inline(always)]
210    pub fn div32(self) -> &'a mut W {
211        self.variant(CSEN_A::DIV32)
212    }
213    #[doc = "LFBCLKCSEN = LFBCLK/64"]
214    #[inline(always)]
215    pub fn div64(self) -> &'a mut W {
216        self.variant(CSEN_A::DIV64)
217    }
218    #[doc = "LFBCLKCSEN = LFBCLK/128"]
219    #[inline(always)]
220    pub fn div128(self) -> &'a mut W {
221        self.variant(CSEN_A::DIV128)
222    }
223    #[doc = r"Writes raw bits to the field"]
224    #[inline(always)]
225    pub fn bits(self, value: u8) -> &'a mut W {
226        self.w.bits = (self.w.bits & !(0x03 << 8)) | (((value as u32) & 0x03) << 8);
227        self.w
228    }
229}
230impl R {
231    #[doc = "Bits 0:3 - Prescaler"]
232    #[inline(always)]
233    pub fn systick(&self) -> SYSTICK_R {
234        SYSTICK_R::new((self.bits & 0x0f) as u8)
235    }
236    #[doc = "Bits 4:5 - Low Energy UART 0 Prescaler"]
237    #[inline(always)]
238    pub fn leuart0(&self) -> LEUART0_R {
239        LEUART0_R::new(((self.bits >> 4) & 0x03) as u8)
240    }
241    #[doc = "Bits 8:9 - Capacitive touch sense module Prescaler"]
242    #[inline(always)]
243    pub fn csen(&self) -> CSEN_R {
244        CSEN_R::new(((self.bits >> 8) & 0x03) as u8)
245    }
246}
247impl W {
248    #[doc = "Bits 4:5 - Low Energy UART 0 Prescaler"]
249    #[inline(always)]
250    pub fn leuart0(&mut self) -> LEUART0_W {
251        LEUART0_W { w: self }
252    }
253    #[doc = "Bits 8:9 - Capacitive touch sense module Prescaler"]
254    #[inline(always)]
255    pub fn csen(&mut self) -> CSEN_W {
256        CSEN_W { w: self }
257    }
258}
efm32pg12_pac/cmu/lfbpresc0.rs

efm32pg12_pac/cmu/
lfbpresc0.rs
