efm32pg12_pac/cmu/
lfbclksel.rs

1#[doc = "Reader of register LFBCLKSEL"]
2pub type R = crate::R<u32, super::LFBCLKSEL>;
3#[doc = "Writer for register LFBCLKSEL"]
4pub type W = crate::W<u32, super::LFBCLKSEL>;
5#[doc = "Register LFBCLKSEL `reset()`'s with value 0"]
6impl crate::ResetValue for super::LFBCLKSEL {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "Clock Select for LFB\n\nValue on reset: 0"]
14#[derive(Clone, Copy, Debug, PartialEq)]
15#[repr(u8)]
16pub enum LFB_A {
17    #[doc = "0: LFBCLK is disabled"]
18    DISABLED = 0,
19    #[doc = "1: LFRCO selected as LFBCLK"]
20    LFRCO = 1,
21    #[doc = "2: LFXO selected as LFBCLK"]
22    LFXO = 2,
23    #[doc = "3: HFCLK divided by two/four is selected as LFBCLK"]
24    HFCLKLE = 3,
25    #[doc = "4: ULFRCO selected as LFBCLK"]
26    ULFRCO = 4,
27}
28impl From<LFB_A> for u8 {
29    #[inline(always)]
30    fn from(variant: LFB_A) -> Self {
31        variant as _
32    }
33}
34#[doc = "Reader of field `LFB`"]
35pub type LFB_R = crate::R<u8, LFB_A>;
36impl LFB_R {
37    #[doc = r"Get enumerated values variant"]
38    #[inline(always)]
39    pub fn variant(&self) -> crate::Variant<u8, LFB_A> {
40        use crate::Variant::*;
41        match self.bits {
42            0 => Val(LFB_A::DISABLED),
43            1 => Val(LFB_A::LFRCO),
44            2 => Val(LFB_A::LFXO),
45            3 => Val(LFB_A::HFCLKLE),
46            4 => Val(LFB_A::ULFRCO),
47            i => Res(i),
48        }
49    }
50    #[doc = "Checks if the value of the field is `DISABLED`"]
51    #[inline(always)]
52    pub fn is_disabled(&self) -> bool {
53        *self == LFB_A::DISABLED
54    }
55    #[doc = "Checks if the value of the field is `LFRCO`"]
56    #[inline(always)]
57    pub fn is_lfrco(&self) -> bool {
58        *self == LFB_A::LFRCO
59    }
60    #[doc = "Checks if the value of the field is `LFXO`"]
61    #[inline(always)]
62    pub fn is_lfxo(&self) -> bool {
63        *self == LFB_A::LFXO
64    }
65    #[doc = "Checks if the value of the field is `HFCLKLE`"]
66    #[inline(always)]
67    pub fn is_hfclkle(&self) -> bool {
68        *self == LFB_A::HFCLKLE
69    }
70    #[doc = "Checks if the value of the field is `ULFRCO`"]
71    #[inline(always)]
72    pub fn is_ulfrco(&self) -> bool {
73        *self == LFB_A::ULFRCO
74    }
75}
76#[doc = "Write proxy for field `LFB`"]
77pub struct LFB_W<'a> {
78    w: &'a mut W,
79}
80impl<'a> LFB_W<'a> {
81    #[doc = r"Writes `variant` to the field"]
82    #[inline(always)]
83    pub fn variant(self, variant: LFB_A) -> &'a mut W {
84        unsafe { self.bits(variant.into()) }
85    }
86    #[doc = "LFBCLK is disabled"]
87    #[inline(always)]
88    pub fn disabled(self) -> &'a mut W {
89        self.variant(LFB_A::DISABLED)
90    }
91    #[doc = "LFRCO selected as LFBCLK"]
92    #[inline(always)]
93    pub fn lfrco(self) -> &'a mut W {
94        self.variant(LFB_A::LFRCO)
95    }
96    #[doc = "LFXO selected as LFBCLK"]
97    #[inline(always)]
98    pub fn lfxo(self) -> &'a mut W {
99        self.variant(LFB_A::LFXO)
100    }
101    #[doc = "HFCLK divided by two/four is selected as LFBCLK"]
102    #[inline(always)]
103    pub fn hfclkle(self) -> &'a mut W {
104        self.variant(LFB_A::HFCLKLE)
105    }
106    #[doc = "ULFRCO selected as LFBCLK"]
107    #[inline(always)]
108    pub fn ulfrco(self) -> &'a mut W {
109        self.variant(LFB_A::ULFRCO)
110    }
111    #[doc = r"Writes raw bits to the field"]
112    #[inline(always)]
113    pub unsafe fn bits(self, value: u8) -> &'a mut W {
114        self.w.bits = (self.w.bits & !0x07) | ((value as u32) & 0x07);
115        self.w
116    }
117}
118impl R {
119    #[doc = "Bits 0:2 - Clock Select for LFB"]
120    #[inline(always)]
121    pub fn lfb(&self) -> LFB_R {
122        LFB_R::new((self.bits & 0x07) as u8)
123    }
124}
125impl W {
126    #[doc = "Bits 0:2 - Clock Select for LFB"]
127    #[inline(always)]
128    pub fn lfb(&mut self) -> LFB_W {
129        LFB_W { w: self }
130    }
131}
efm32pg12_pac/cmu/lfbclksel.rs

efm32pg12_pac/cmu/
lfbclksel.rs
