efm32pg12_pac/cmu/
hfxostartupctrl.rs1#[doc = "Reader of register HFXOSTARTUPCTRL"]
2pub type R = crate::R<u32, super::HFXOSTARTUPCTRL>;
3#[doc = "Writer for register HFXOSTARTUPCTRL"]
4pub type W = crate::W<u32, super::HFXOSTARTUPCTRL>;
5#[doc = "Register HFXOSTARTUPCTRL `reset()`'s with value 0x0005_0020"]
6impl crate::ResetValue for super::HFXOSTARTUPCTRL {
7 type Type = u32;
8 #[inline(always)]
9 fn reset_value() -> Self::Type {
10 0x0005_0020
11 }
12}
13#[doc = "Reader of field `IBTRIMXOCORE`"]
14pub type IBTRIMXOCORE_R = crate::R<u8, u8>;
15#[doc = "Write proxy for field `IBTRIMXOCORE`"]
16pub struct IBTRIMXOCORE_W<'a> {
17 w: &'a mut W,
18}
19impl<'a> IBTRIMXOCORE_W<'a> {
20 #[doc = r"Writes raw bits to the field"]
21 #[inline(always)]
22 pub unsafe fn bits(self, value: u8) -> &'a mut W {
23 self.w.bits = (self.w.bits & !0x7f) | ((value as u32) & 0x7f);
24 self.w
25 }
26}
27#[doc = "Reader of field `CTUNE`"]
28pub type CTUNE_R = crate::R<u16, u16>;
29#[doc = "Write proxy for field `CTUNE`"]
30pub struct CTUNE_W<'a> {
31 w: &'a mut W,
32}
33impl<'a> CTUNE_W<'a> {
34 #[doc = r"Writes raw bits to the field"]
35 #[inline(always)]
36 pub unsafe fn bits(self, value: u16) -> &'a mut W {
37 self.w.bits = (self.w.bits & !(0x01ff << 11)) | (((value as u32) & 0x01ff) << 11);
38 self.w
39 }
40}
41impl R {
42 #[doc = "Bits 0:6 - Sets the Startup Oscillator Core Bias Current"]
43 #[inline(always)]
44 pub fn ibtrimxocore(&self) -> IBTRIMXOCORE_R {
45 IBTRIMXOCORE_R::new((self.bits & 0x7f) as u8)
46 }
47 #[doc = "Bits 11:19 - Sets Oscillator Tuning Capacitance"]
48 #[inline(always)]
49 pub fn ctune(&self) -> CTUNE_R {
50 CTUNE_R::new(((self.bits >> 11) & 0x01ff) as u16)
51 }
52}
53impl W {
54 #[doc = "Bits 0:6 - Sets the Startup Oscillator Core Bias Current"]
55 #[inline(always)]
56 pub fn ibtrimxocore(&mut self) -> IBTRIMXOCORE_W {
57 IBTRIMXOCORE_W { w: self }
58 }
59 #[doc = "Bits 11:19 - Sets Oscillator Tuning Capacitance"]
60 #[inline(always)]
61 pub fn ctune(&mut self) -> CTUNE_W {
62 CTUNE_W { w: self }
63 }
64}