efm32pg12_pac/cmu/
hfxoctrl.rs

1#[doc = "Reader of register HFXOCTRL"]
2pub type R = crate::R<u32, super::HFXOCTRL>;
3#[doc = "Writer for register HFXOCTRL"]
4pub type W = crate::W<u32, super::HFXOCTRL>;
5#[doc = "Register HFXOCTRL `reset()`'s with value 0"]
6impl crate::ResetValue for super::HFXOCTRL {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "Reader of field `MODE`"]
14pub type MODE_R = crate::R<bool, bool>;
15#[doc = "Write proxy for field `MODE`"]
16pub struct MODE_W<'a> {
17    w: &'a mut W,
18}
19impl<'a> MODE_W<'a> {
20    #[doc = r"Sets the field bit"]
21    #[inline(always)]
22    pub fn set_bit(self) -> &'a mut W {
23        self.bit(true)
24    }
25    #[doc = r"Clears the field bit"]
26    #[inline(always)]
27    pub fn clear_bit(self) -> &'a mut W {
28        self.bit(false)
29    }
30    #[doc = r"Writes raw bits to the field"]
31    #[inline(always)]
32    pub fn bit(self, value: bool) -> &'a mut W {
33        self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
34        self.w
35    }
36}
37#[doc = "HFXO Automatic Peak Detection and Shunt Current Optimization Mode\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39#[repr(u8)]
40pub enum PEAKDETSHUNTOPTMODE_A {
41    #[doc = "0: Automatic control of HFXO peak detection and shunt optimization sequences. CMU_CMD HFXOPEAKDETSTART and HFXOSHUNTOPTSTART can also be used."]
42    AUTOCMD = 0,
43    #[doc = "1: CMU_CMD HFXOPEAKDETSTART and HFXOSHUNTOPTSTART can be used to trigger peak detection and shunt optimization sequences."]
44    CMD = 1,
45    #[doc = "2: CMU_HFXOSTEADYSTATECTRL IBTRIMXOCORE, REGISH, REGSELILOW, and PEAKDETEN are under full software control and are allowed to be changed once HFXO is ready."]
46    MANUAL = 2,
47}
48impl From<PEAKDETSHUNTOPTMODE_A> for u8 {
49    #[inline(always)]
50    fn from(variant: PEAKDETSHUNTOPTMODE_A) -> Self {
51        variant as _
52    }
53}
54#[doc = "Reader of field `PEAKDETSHUNTOPTMODE`"]
55pub type PEAKDETSHUNTOPTMODE_R = crate::R<u8, PEAKDETSHUNTOPTMODE_A>;
56impl PEAKDETSHUNTOPTMODE_R {
57    #[doc = r"Get enumerated values variant"]
58    #[inline(always)]
59    pub fn variant(&self) -> crate::Variant<u8, PEAKDETSHUNTOPTMODE_A> {
60        use crate::Variant::*;
61        match self.bits {
62            0 => Val(PEAKDETSHUNTOPTMODE_A::AUTOCMD),
63            1 => Val(PEAKDETSHUNTOPTMODE_A::CMD),
64            2 => Val(PEAKDETSHUNTOPTMODE_A::MANUAL),
65            i => Res(i),
66        }
67    }
68    #[doc = "Checks if the value of the field is `AUTOCMD`"]
69    #[inline(always)]
70    pub fn is_autocmd(&self) -> bool {
71        *self == PEAKDETSHUNTOPTMODE_A::AUTOCMD
72    }
73    #[doc = "Checks if the value of the field is `CMD`"]
74    #[inline(always)]
75    pub fn is_cmd(&self) -> bool {
76        *self == PEAKDETSHUNTOPTMODE_A::CMD
77    }
78    #[doc = "Checks if the value of the field is `MANUAL`"]
79    #[inline(always)]
80    pub fn is_manual(&self) -> bool {
81        *self == PEAKDETSHUNTOPTMODE_A::MANUAL
82    }
83}
84#[doc = "Write proxy for field `PEAKDETSHUNTOPTMODE`"]
85pub struct PEAKDETSHUNTOPTMODE_W<'a> {
86    w: &'a mut W,
87}
88impl<'a> PEAKDETSHUNTOPTMODE_W<'a> {
89    #[doc = r"Writes `variant` to the field"]
90    #[inline(always)]
91    pub fn variant(self, variant: PEAKDETSHUNTOPTMODE_A) -> &'a mut W {
92        unsafe { self.bits(variant.into()) }
93    }
94    #[doc = "Automatic control of HFXO peak detection and shunt optimization sequences. CMU_CMD HFXOPEAKDETSTART and HFXOSHUNTOPTSTART can also be used."]
95    #[inline(always)]
96    pub fn autocmd(self) -> &'a mut W {
97        self.variant(PEAKDETSHUNTOPTMODE_A::AUTOCMD)
98    }
99    #[doc = "CMU_CMD HFXOPEAKDETSTART and HFXOSHUNTOPTSTART can be used to trigger peak detection and shunt optimization sequences."]
100    #[inline(always)]
101    pub fn cmd(self) -> &'a mut W {
102        self.variant(PEAKDETSHUNTOPTMODE_A::CMD)
103    }
104    #[doc = "CMU_HFXOSTEADYSTATECTRL IBTRIMXOCORE, REGISH, REGSELILOW, and PEAKDETEN are under full software control and are allowed to be changed once HFXO is ready."]
105    #[inline(always)]
106    pub fn manual(self) -> &'a mut W {
107        self.variant(PEAKDETSHUNTOPTMODE_A::MANUAL)
108    }
109    #[doc = r"Writes raw bits to the field"]
110    #[inline(always)]
111    pub unsafe fn bits(self, value: u8) -> &'a mut W {
112        self.w.bits = (self.w.bits & !(0x03 << 4)) | (((value as u32) & 0x03) << 4);
113        self.w
114    }
115}
116#[doc = "Reader of field `LOWPOWER`"]
117pub type LOWPOWER_R = crate::R<bool, bool>;
118#[doc = "Write proxy for field `LOWPOWER`"]
119pub struct LOWPOWER_W<'a> {
120    w: &'a mut W,
121}
122impl<'a> LOWPOWER_W<'a> {
123    #[doc = r"Sets the field bit"]
124    #[inline(always)]
125    pub fn set_bit(self) -> &'a mut W {
126        self.bit(true)
127    }
128    #[doc = r"Clears the field bit"]
129    #[inline(always)]
130    pub fn clear_bit(self) -> &'a mut W {
131        self.bit(false)
132    }
133    #[doc = r"Writes raw bits to the field"]
134    #[inline(always)]
135    pub fn bit(self, value: bool) -> &'a mut W {
136        self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8);
137        self.w
138    }
139}
140#[doc = "Reader of field `XTI2GND`"]
141pub type XTI2GND_R = crate::R<bool, bool>;
142#[doc = "Write proxy for field `XTI2GND`"]
143pub struct XTI2GND_W<'a> {
144    w: &'a mut W,
145}
146impl<'a> XTI2GND_W<'a> {
147    #[doc = r"Sets the field bit"]
148    #[inline(always)]
149    pub fn set_bit(self) -> &'a mut W {
150        self.bit(true)
151    }
152    #[doc = r"Clears the field bit"]
153    #[inline(always)]
154    pub fn clear_bit(self) -> &'a mut W {
155        self.bit(false)
156    }
157    #[doc = r"Writes raw bits to the field"]
158    #[inline(always)]
159    pub fn bit(self, value: bool) -> &'a mut W {
160        self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9);
161        self.w
162    }
163}
164#[doc = "Reader of field `XTO2GND`"]
165pub type XTO2GND_R = crate::R<bool, bool>;
166#[doc = "Write proxy for field `XTO2GND`"]
167pub struct XTO2GND_W<'a> {
168    w: &'a mut W,
169}
170impl<'a> XTO2GND_W<'a> {
171    #[doc = r"Sets the field bit"]
172    #[inline(always)]
173    pub fn set_bit(self) -> &'a mut W {
174        self.bit(true)
175    }
176    #[doc = r"Clears the field bit"]
177    #[inline(always)]
178    pub fn clear_bit(self) -> &'a mut W {
179        self.bit(false)
180    }
181    #[doc = r"Writes raw bits to the field"]
182    #[inline(always)]
183    pub fn bit(self, value: bool) -> &'a mut W {
184        self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10);
185        self.w
186    }
187}
188#[doc = "HFXO Low Frequency Timeout\n\nValue on reset: 0"]
189#[derive(Clone, Copy, Debug, PartialEq)]
190#[repr(u8)]
191pub enum LFTIMEOUT_A {
192    #[doc = "0: Timeout period of 0 cycles (disabled)"]
193    _0CYCLES = 0,
194    #[doc = "1: Timeout period of 2 cycles"]
195    _2CYCLES = 1,
196    #[doc = "2: Timeout period of 4 cycles"]
197    _4CYCLES = 2,
198    #[doc = "3: Timeout period of 16 cycles"]
199    _16CYCLES = 3,
200    #[doc = "4: Timeout period of 32 cycles"]
201    _32CYCLES = 4,
202    #[doc = "5: Timeout period of 64 cycles"]
203    _64CYCLES = 5,
204    #[doc = "6: Timeout period of 1024 cycles"]
205    _1KCYCLES = 6,
206    #[doc = "7: Timeout period of 4096 cycles"]
207    _4KCYCLES = 7,
208}
209impl From<LFTIMEOUT_A> for u8 {
210    #[inline(always)]
211    fn from(variant: LFTIMEOUT_A) -> Self {
212        variant as _
213    }
214}
215#[doc = "Reader of field `LFTIMEOUT`"]
216pub type LFTIMEOUT_R = crate::R<u8, LFTIMEOUT_A>;
217impl LFTIMEOUT_R {
218    #[doc = r"Get enumerated values variant"]
219    #[inline(always)]
220    pub fn variant(&self) -> LFTIMEOUT_A {
221        match self.bits {
222            0 => LFTIMEOUT_A::_0CYCLES,
223            1 => LFTIMEOUT_A::_2CYCLES,
224            2 => LFTIMEOUT_A::_4CYCLES,
225            3 => LFTIMEOUT_A::_16CYCLES,
226            4 => LFTIMEOUT_A::_32CYCLES,
227            5 => LFTIMEOUT_A::_64CYCLES,
228            6 => LFTIMEOUT_A::_1KCYCLES,
229            7 => LFTIMEOUT_A::_4KCYCLES,
230            _ => unreachable!(),
231        }
232    }
233    #[doc = "Checks if the value of the field is `_0CYCLES`"]
234    #[inline(always)]
235    pub fn is_0cycles(&self) -> bool {
236        *self == LFTIMEOUT_A::_0CYCLES
237    }
238    #[doc = "Checks if the value of the field is `_2CYCLES`"]
239    #[inline(always)]
240    pub fn is_2cycles(&self) -> bool {
241        *self == LFTIMEOUT_A::_2CYCLES
242    }
243    #[doc = "Checks if the value of the field is `_4CYCLES`"]
244    #[inline(always)]
245    pub fn is_4cycles(&self) -> bool {
246        *self == LFTIMEOUT_A::_4CYCLES
247    }
248    #[doc = "Checks if the value of the field is `_16CYCLES`"]
249    #[inline(always)]
250    pub fn is_16cycles(&self) -> bool {
251        *self == LFTIMEOUT_A::_16CYCLES
252    }
253    #[doc = "Checks if the value of the field is `_32CYCLES`"]
254    #[inline(always)]
255    pub fn is_32cycles(&self) -> bool {
256        *self == LFTIMEOUT_A::_32CYCLES
257    }
258    #[doc = "Checks if the value of the field is `_64CYCLES`"]
259    #[inline(always)]
260    pub fn is_64cycles(&self) -> bool {
261        *self == LFTIMEOUT_A::_64CYCLES
262    }
263    #[doc = "Checks if the value of the field is `_1KCYCLES`"]
264    #[inline(always)]
265    pub fn is_1kcycles(&self) -> bool {
266        *self == LFTIMEOUT_A::_1KCYCLES
267    }
268    #[doc = "Checks if the value of the field is `_4KCYCLES`"]
269    #[inline(always)]
270    pub fn is_4kcycles(&self) -> bool {
271        *self == LFTIMEOUT_A::_4KCYCLES
272    }
273}
274#[doc = "Write proxy for field `LFTIMEOUT`"]
275pub struct LFTIMEOUT_W<'a> {
276    w: &'a mut W,
277}
278impl<'a> LFTIMEOUT_W<'a> {
279    #[doc = r"Writes `variant` to the field"]
280    #[inline(always)]
281    pub fn variant(self, variant: LFTIMEOUT_A) -> &'a mut W {
282        {
283            self.bits(variant.into())
284        }
285    }
286    #[doc = "Timeout period of 0 cycles (disabled)"]
287    #[inline(always)]
288    pub fn _0cycles(self) -> &'a mut W {
289        self.variant(LFTIMEOUT_A::_0CYCLES)
290    }
291    #[doc = "Timeout period of 2 cycles"]
292    #[inline(always)]
293    pub fn _2cycles(self) -> &'a mut W {
294        self.variant(LFTIMEOUT_A::_2CYCLES)
295    }
296    #[doc = "Timeout period of 4 cycles"]
297    #[inline(always)]
298    pub fn _4cycles(self) -> &'a mut W {
299        self.variant(LFTIMEOUT_A::_4CYCLES)
300    }
301    #[doc = "Timeout period of 16 cycles"]
302    #[inline(always)]
303    pub fn _16cycles(self) -> &'a mut W {
304        self.variant(LFTIMEOUT_A::_16CYCLES)
305    }
306    #[doc = "Timeout period of 32 cycles"]
307    #[inline(always)]
308    pub fn _32cycles(self) -> &'a mut W {
309        self.variant(LFTIMEOUT_A::_32CYCLES)
310    }
311    #[doc = "Timeout period of 64 cycles"]
312    #[inline(always)]
313    pub fn _64cycles(self) -> &'a mut W {
314        self.variant(LFTIMEOUT_A::_64CYCLES)
315    }
316    #[doc = "Timeout period of 1024 cycles"]
317    #[inline(always)]
318    pub fn _1kcycles(self) -> &'a mut W {
319        self.variant(LFTIMEOUT_A::_1KCYCLES)
320    }
321    #[doc = "Timeout period of 4096 cycles"]
322    #[inline(always)]
323    pub fn _4kcycles(self) -> &'a mut W {
324        self.variant(LFTIMEOUT_A::_4KCYCLES)
325    }
326    #[doc = r"Writes raw bits to the field"]
327    #[inline(always)]
328    pub fn bits(self, value: u8) -> &'a mut W {
329        self.w.bits = (self.w.bits & !(0x07 << 24)) | (((value as u32) & 0x07) << 24);
330        self.w
331    }
332}
333#[doc = "Reader of field `AUTOSTARTEM0EM1`"]
334pub type AUTOSTARTEM0EM1_R = crate::R<bool, bool>;
335#[doc = "Write proxy for field `AUTOSTARTEM0EM1`"]
336pub struct AUTOSTARTEM0EM1_W<'a> {
337    w: &'a mut W,
338}
339impl<'a> AUTOSTARTEM0EM1_W<'a> {
340    #[doc = r"Sets the field bit"]
341    #[inline(always)]
342    pub fn set_bit(self) -> &'a mut W {
343        self.bit(true)
344    }
345    #[doc = r"Clears the field bit"]
346    #[inline(always)]
347    pub fn clear_bit(self) -> &'a mut W {
348        self.bit(false)
349    }
350    #[doc = r"Writes raw bits to the field"]
351    #[inline(always)]
352    pub fn bit(self, value: bool) -> &'a mut W {
353        self.w.bits = (self.w.bits & !(0x01 << 28)) | (((value as u32) & 0x01) << 28);
354        self.w
355    }
356}
357#[doc = "Reader of field `AUTOSTARTSELEM0EM1`"]
358pub type AUTOSTARTSELEM0EM1_R = crate::R<bool, bool>;
359#[doc = "Write proxy for field `AUTOSTARTSELEM0EM1`"]
360pub struct AUTOSTARTSELEM0EM1_W<'a> {
361    w: &'a mut W,
362}
363impl<'a> AUTOSTARTSELEM0EM1_W<'a> {
364    #[doc = r"Sets the field bit"]
365    #[inline(always)]
366    pub fn set_bit(self) -> &'a mut W {
367        self.bit(true)
368    }
369    #[doc = r"Clears the field bit"]
370    #[inline(always)]
371    pub fn clear_bit(self) -> &'a mut W {
372        self.bit(false)
373    }
374    #[doc = r"Writes raw bits to the field"]
375    #[inline(always)]
376    pub fn bit(self, value: bool) -> &'a mut W {
377        self.w.bits = (self.w.bits & !(0x01 << 29)) | (((value as u32) & 0x01) << 29);
378        self.w
379    }
380}
381impl R {
382    #[doc = "Bit 0 - HFXO Mode"]
383    #[inline(always)]
384    pub fn mode(&self) -> MODE_R {
385        MODE_R::new((self.bits & 0x01) != 0)
386    }
387    #[doc = "Bits 4:5 - HFXO Automatic Peak Detection and Shunt Current Optimization Mode"]
388    #[inline(always)]
389    pub fn peakdetshuntoptmode(&self) -> PEAKDETSHUNTOPTMODE_R {
390        PEAKDETSHUNTOPTMODE_R::new(((self.bits >> 4) & 0x03) as u8)
391    }
392    #[doc = "Bit 8 - Low Power Mode Control"]
393    #[inline(always)]
394    pub fn lowpower(&self) -> LOWPOWER_R {
395        LOWPOWER_R::new(((self.bits >> 8) & 0x01) != 0)
396    }
397    #[doc = "Bit 9 - Clamp HFXTAL_N Pin to Ground When HFXO Oscillator is Off"]
398    #[inline(always)]
399    pub fn xti2gnd(&self) -> XTI2GND_R {
400        XTI2GND_R::new(((self.bits >> 9) & 0x01) != 0)
401    }
402    #[doc = "Bit 10 - Clamp HFXTAL_P Pin to Ground When HFXO Oscillator is Off"]
403    #[inline(always)]
404    pub fn xto2gnd(&self) -> XTO2GND_R {
405        XTO2GND_R::new(((self.bits >> 10) & 0x01) != 0)
406    }
407    #[doc = "Bits 24:26 - HFXO Low Frequency Timeout"]
408    #[inline(always)]
409    pub fn lftimeout(&self) -> LFTIMEOUT_R {
410        LFTIMEOUT_R::new(((self.bits >> 24) & 0x07) as u8)
411    }
412    #[doc = "Bit 28 - Automatically Start of HFXO Upon EM0/EM1 Entry From EM2/EM3"]
413    #[inline(always)]
414    pub fn autostartem0em1(&self) -> AUTOSTARTEM0EM1_R {
415        AUTOSTARTEM0EM1_R::new(((self.bits >> 28) & 0x01) != 0)
416    }
417    #[doc = "Bit 29 - Automatically Start and Select of HFXO Upon EM0/EM1 Entry From EM2/EM3"]
418    #[inline(always)]
419    pub fn autostartselem0em1(&self) -> AUTOSTARTSELEM0EM1_R {
420        AUTOSTARTSELEM0EM1_R::new(((self.bits >> 29) & 0x01) != 0)
421    }
422}
423impl W {
424    #[doc = "Bit 0 - HFXO Mode"]
425    #[inline(always)]
426    pub fn mode(&mut self) -> MODE_W {
427        MODE_W { w: self }
428    }
429    #[doc = "Bits 4:5 - HFXO Automatic Peak Detection and Shunt Current Optimization Mode"]
430    #[inline(always)]
431    pub fn peakdetshuntoptmode(&mut self) -> PEAKDETSHUNTOPTMODE_W {
432        PEAKDETSHUNTOPTMODE_W { w: self }
433    }
434    #[doc = "Bit 8 - Low Power Mode Control"]
435    #[inline(always)]
436    pub fn lowpower(&mut self) -> LOWPOWER_W {
437        LOWPOWER_W { w: self }
438    }
439    #[doc = "Bit 9 - Clamp HFXTAL_N Pin to Ground When HFXO Oscillator is Off"]
440    #[inline(always)]
441    pub fn xti2gnd(&mut self) -> XTI2GND_W {
442        XTI2GND_W { w: self }
443    }
444    #[doc = "Bit 10 - Clamp HFXTAL_P Pin to Ground When HFXO Oscillator is Off"]
445    #[inline(always)]
446    pub fn xto2gnd(&mut self) -> XTO2GND_W {
447        XTO2GND_W { w: self }
448    }
449    #[doc = "Bits 24:26 - HFXO Low Frequency Timeout"]
450    #[inline(always)]
451    pub fn lftimeout(&mut self) -> LFTIMEOUT_W {
452        LFTIMEOUT_W { w: self }
453    }
454    #[doc = "Bit 28 - Automatically Start of HFXO Upon EM0/EM1 Entry From EM2/EM3"]
455    #[inline(always)]
456    pub fn autostartem0em1(&mut self) -> AUTOSTARTEM0EM1_W {
457        AUTOSTARTEM0EM1_W { w: self }
458    }
459    #[doc = "Bit 29 - Automatically Start and Select of HFXO Upon EM0/EM1 Entry From EM2/EM3"]
460    #[inline(always)]
461    pub fn autostartselem0em1(&mut self) -> AUTOSTARTSELEM0EM1_W {
462        AUTOSTARTSELEM0EM1_W { w: self }
463    }
464}
efm32pg12_pac/cmu/hfxoctrl.rs

efm32pg12_pac/cmu/
hfxoctrl.rs
