efm32pg12_pac/cmu/
hfrcoss.rs

1#[doc = "Reader of register HFRCOSS"]
2pub type R = crate::R<u32, super::HFRCOSS>;
3#[doc = "Writer for register HFRCOSS"]
4pub type W = crate::W<u32, super::HFRCOSS>;
5#[doc = "Register HFRCOSS `reset()`'s with value 0"]
6impl crate::ResetValue for super::HFRCOSS {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "Reader of field `SSAMP`"]
14pub type SSAMP_R = crate::R<u8, u8>;
15#[doc = "Write proxy for field `SSAMP`"]
16pub struct SSAMP_W<'a> {
17    w: &'a mut W,
18}
19impl<'a> SSAMP_W<'a> {
20    #[doc = r"Writes raw bits to the field"]
21    #[inline(always)]
22    pub unsafe fn bits(self, value: u8) -> &'a mut W {
23        self.w.bits = (self.w.bits & !0x07) | ((value as u32) & 0x07);
24        self.w
25    }
26}
27#[doc = "Reader of field `SSINV`"]
28pub type SSINV_R = crate::R<u8, u8>;
29#[doc = "Write proxy for field `SSINV`"]
30pub struct SSINV_W<'a> {
31    w: &'a mut W,
32}
33impl<'a> SSINV_W<'a> {
34    #[doc = r"Writes raw bits to the field"]
35    #[inline(always)]
36    pub unsafe fn bits(self, value: u8) -> &'a mut W {
37        self.w.bits = (self.w.bits & !(0x1f << 8)) | (((value as u32) & 0x1f) << 8);
38        self.w
39    }
40}
41impl R {
42    #[doc = "Bits 0:2 - Spread Spectrum Amplitude"]
43    #[inline(always)]
44    pub fn ssamp(&self) -> SSAMP_R {
45        SSAMP_R::new((self.bits & 0x07) as u8)
46    }
47    #[doc = "Bits 8:12 - Spread Spectrum Update Interval"]
48    #[inline(always)]
49    pub fn ssinv(&self) -> SSINV_R {
50        SSINV_R::new(((self.bits >> 8) & 0x1f) as u8)
51    }
52}
53impl W {
54    #[doc = "Bits 0:2 - Spread Spectrum Amplitude"]
55    #[inline(always)]
56    pub fn ssamp(&mut self) -> SSAMP_W {
57        SSAMP_W { w: self }
58    }
59    #[doc = "Bits 8:12 - Spread Spectrum Update Interval"]
60    #[inline(always)]
61    pub fn ssinv(&mut self) -> SSINV_W {
62        SSINV_W { w: self }
63    }
64}
efm32pg12_pac/cmu/hfrcoss.rs

efm32pg12_pac/cmu/
hfrcoss.rs
