efm32pg12_pac/cmu/
hfrcoctrl.rs

1#[doc = "Reader of register HFRCOCTRL"]
2pub type R = crate::R<u32, super::HFRCOCTRL>;
3#[doc = "Writer for register HFRCOCTRL"]
4pub type W = crate::W<u32, super::HFRCOCTRL>;
5#[doc = "Register HFRCOCTRL `reset()`'s with value 0xb148_1f7f"]
6impl crate::ResetValue for super::HFRCOCTRL {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0xb148_1f7f
11    }
12}
13#[doc = "Reader of field `TUNING`"]
14pub type TUNING_R = crate::R<u8, u8>;
15#[doc = "Write proxy for field `TUNING`"]
16pub struct TUNING_W<'a> {
17    w: &'a mut W,
18}
19impl<'a> TUNING_W<'a> {
20    #[doc = r"Writes raw bits to the field"]
21    #[inline(always)]
22    pub unsafe fn bits(self, value: u8) -> &'a mut W {
23        self.w.bits = (self.w.bits & !0x7f) | ((value as u32) & 0x7f);
24        self.w
25    }
26}
27#[doc = "Reader of field `FINETUNING`"]
28pub type FINETUNING_R = crate::R<u8, u8>;
29#[doc = "Write proxy for field `FINETUNING`"]
30pub struct FINETUNING_W<'a> {
31    w: &'a mut W,
32}
33impl<'a> FINETUNING_W<'a> {
34    #[doc = r"Writes raw bits to the field"]
35    #[inline(always)]
36    pub unsafe fn bits(self, value: u8) -> &'a mut W {
37        self.w.bits = (self.w.bits & !(0x3f << 8)) | (((value as u32) & 0x3f) << 8);
38        self.w
39    }
40}
41#[doc = "Reader of field `FREQRANGE`"]
42pub type FREQRANGE_R = crate::R<u8, u8>;
43#[doc = "Write proxy for field `FREQRANGE`"]
44pub struct FREQRANGE_W<'a> {
45    w: &'a mut W,
46}
47impl<'a> FREQRANGE_W<'a> {
48    #[doc = r"Writes raw bits to the field"]
49    #[inline(always)]
50    pub unsafe fn bits(self, value: u8) -> &'a mut W {
51        self.w.bits = (self.w.bits & !(0x1f << 16)) | (((value as u32) & 0x1f) << 16);
52        self.w
53    }
54}
55#[doc = "Reader of field `CMPBIAS`"]
56pub type CMPBIAS_R = crate::R<u8, u8>;
57#[doc = "Write proxy for field `CMPBIAS`"]
58pub struct CMPBIAS_W<'a> {
59    w: &'a mut W,
60}
61impl<'a> CMPBIAS_W<'a> {
62    #[doc = r"Writes raw bits to the field"]
63    #[inline(always)]
64    pub unsafe fn bits(self, value: u8) -> &'a mut W {
65        self.w.bits = (self.w.bits & !(0x07 << 21)) | (((value as u32) & 0x07) << 21);
66        self.w
67    }
68}
69#[doc = "Reader of field `LDOHP`"]
70pub type LDOHP_R = crate::R<bool, bool>;
71#[doc = "Write proxy for field `LDOHP`"]
72pub struct LDOHP_W<'a> {
73    w: &'a mut W,
74}
75impl<'a> LDOHP_W<'a> {
76    #[doc = r"Sets the field bit"]
77    #[inline(always)]
78    pub fn set_bit(self) -> &'a mut W {
79        self.bit(true)
80    }
81    #[doc = r"Clears the field bit"]
82    #[inline(always)]
83    pub fn clear_bit(self) -> &'a mut W {
84        self.bit(false)
85    }
86    #[doc = r"Writes raw bits to the field"]
87    #[inline(always)]
88    pub fn bit(self, value: bool) -> &'a mut W {
89        self.w.bits = (self.w.bits & !(0x01 << 24)) | (((value as u32) & 0x01) << 24);
90        self.w
91    }
92}
93#[doc = "Locally Divide HFRCO Clock Output\n\nValue on reset: 0"]
94#[derive(Clone, Copy, Debug, PartialEq)]
95#[repr(u8)]
96pub enum CLKDIV_A {
97    #[doc = "0: Divide by 1."]
98    DIV1 = 0,
99    #[doc = "1: Divide by 2."]
100    DIV2 = 1,
101    #[doc = "2: Divide by 4."]
102    DIV4 = 2,
103}
104impl From<CLKDIV_A> for u8 {
105    #[inline(always)]
106    fn from(variant: CLKDIV_A) -> Self {
107        variant as _
108    }
109}
110#[doc = "Reader of field `CLKDIV`"]
111pub type CLKDIV_R = crate::R<u8, CLKDIV_A>;
112impl CLKDIV_R {
113    #[doc = r"Get enumerated values variant"]
114    #[inline(always)]
115    pub fn variant(&self) -> crate::Variant<u8, CLKDIV_A> {
116        use crate::Variant::*;
117        match self.bits {
118            0 => Val(CLKDIV_A::DIV1),
119            1 => Val(CLKDIV_A::DIV2),
120            2 => Val(CLKDIV_A::DIV4),
121            i => Res(i),
122        }
123    }
124    #[doc = "Checks if the value of the field is `DIV1`"]
125    #[inline(always)]
126    pub fn is_div1(&self) -> bool {
127        *self == CLKDIV_A::DIV1
128    }
129    #[doc = "Checks if the value of the field is `DIV2`"]
130    #[inline(always)]
131    pub fn is_div2(&self) -> bool {
132        *self == CLKDIV_A::DIV2
133    }
134    #[doc = "Checks if the value of the field is `DIV4`"]
135    #[inline(always)]
136    pub fn is_div4(&self) -> bool {
137        *self == CLKDIV_A::DIV4
138    }
139}
140#[doc = "Write proxy for field `CLKDIV`"]
141pub struct CLKDIV_W<'a> {
142    w: &'a mut W,
143}
144impl<'a> CLKDIV_W<'a> {
145    #[doc = r"Writes `variant` to the field"]
146    #[inline(always)]
147    pub fn variant(self, variant: CLKDIV_A) -> &'a mut W {
148        unsafe { self.bits(variant.into()) }
149    }
150    #[doc = "Divide by 1."]
151    #[inline(always)]
152    pub fn div1(self) -> &'a mut W {
153        self.variant(CLKDIV_A::DIV1)
154    }
155    #[doc = "Divide by 2."]
156    #[inline(always)]
157    pub fn div2(self) -> &'a mut W {
158        self.variant(CLKDIV_A::DIV2)
159    }
160    #[doc = "Divide by 4."]
161    #[inline(always)]
162    pub fn div4(self) -> &'a mut W {
163        self.variant(CLKDIV_A::DIV4)
164    }
165    #[doc = r"Writes raw bits to the field"]
166    #[inline(always)]
167    pub unsafe fn bits(self, value: u8) -> &'a mut W {
168        self.w.bits = (self.w.bits & !(0x03 << 25)) | (((value as u32) & 0x03) << 25);
169        self.w
170    }
171}
172#[doc = "Reader of field `FINETUNINGEN`"]
173pub type FINETUNINGEN_R = crate::R<bool, bool>;
174#[doc = "Write proxy for field `FINETUNINGEN`"]
175pub struct FINETUNINGEN_W<'a> {
176    w: &'a mut W,
177}
178impl<'a> FINETUNINGEN_W<'a> {
179    #[doc = r"Sets the field bit"]
180    #[inline(always)]
181    pub fn set_bit(self) -> &'a mut W {
182        self.bit(true)
183    }
184    #[doc = r"Clears the field bit"]
185    #[inline(always)]
186    pub fn clear_bit(self) -> &'a mut W {
187        self.bit(false)
188    }
189    #[doc = r"Writes raw bits to the field"]
190    #[inline(always)]
191    pub fn bit(self, value: bool) -> &'a mut W {
192        self.w.bits = (self.w.bits & !(0x01 << 27)) | (((value as u32) & 0x01) << 27);
193        self.w
194    }
195}
196#[doc = "Reader of field `VREFTC`"]
197pub type VREFTC_R = crate::R<u8, u8>;
198#[doc = "Write proxy for field `VREFTC`"]
199pub struct VREFTC_W<'a> {
200    w: &'a mut W,
201}
202impl<'a> VREFTC_W<'a> {
203    #[doc = r"Writes raw bits to the field"]
204    #[inline(always)]
205    pub unsafe fn bits(self, value: u8) -> &'a mut W {
206        self.w.bits = (self.w.bits & !(0x0f << 28)) | (((value as u32) & 0x0f) << 28);
207        self.w
208    }
209}
210impl R {
211    #[doc = "Bits 0:6 - HFRCO Tuning Value"]
212    #[inline(always)]
213    pub fn tuning(&self) -> TUNING_R {
214        TUNING_R::new((self.bits & 0x7f) as u8)
215    }
216    #[doc = "Bits 8:13 - HFRCO Fine Tuning Value"]
217    #[inline(always)]
218    pub fn finetuning(&self) -> FINETUNING_R {
219        FINETUNING_R::new(((self.bits >> 8) & 0x3f) as u8)
220    }
221    #[doc = "Bits 16:20 - HFRCO Frequency Range"]
222    #[inline(always)]
223    pub fn freqrange(&self) -> FREQRANGE_R {
224        FREQRANGE_R::new(((self.bits >> 16) & 0x1f) as u8)
225    }
226    #[doc = "Bits 21:23 - HFRCO Comparator Bias Current"]
227    #[inline(always)]
228    pub fn cmpbias(&self) -> CMPBIAS_R {
229        CMPBIAS_R::new(((self.bits >> 21) & 0x07) as u8)
230    }
231    #[doc = "Bit 24 - HFRCO LDO High Power Mode"]
232    #[inline(always)]
233    pub fn ldohp(&self) -> LDOHP_R {
234        LDOHP_R::new(((self.bits >> 24) & 0x01) != 0)
235    }
236    #[doc = "Bits 25:26 - Locally Divide HFRCO Clock Output"]
237    #[inline(always)]
238    pub fn clkdiv(&self) -> CLKDIV_R {
239        CLKDIV_R::new(((self.bits >> 25) & 0x03) as u8)
240    }
241    #[doc = "Bit 27 - Enable Reference for Fine Tuning"]
242    #[inline(always)]
243    pub fn finetuningen(&self) -> FINETUNINGEN_R {
244        FINETUNINGEN_R::new(((self.bits >> 27) & 0x01) != 0)
245    }
246    #[doc = "Bits 28:31 - HFRCO Temperature Coefficient Trim on Comparator Reference"]
247    #[inline(always)]
248    pub fn vreftc(&self) -> VREFTC_R {
249        VREFTC_R::new(((self.bits >> 28) & 0x0f) as u8)
250    }
251}
252impl W {
253    #[doc = "Bits 0:6 - HFRCO Tuning Value"]
254    #[inline(always)]
255    pub fn tuning(&mut self) -> TUNING_W {
256        TUNING_W { w: self }
257    }
258    #[doc = "Bits 8:13 - HFRCO Fine Tuning Value"]
259    #[inline(always)]
260    pub fn finetuning(&mut self) -> FINETUNING_W {
261        FINETUNING_W { w: self }
262    }
263    #[doc = "Bits 16:20 - HFRCO Frequency Range"]
264    #[inline(always)]
265    pub fn freqrange(&mut self) -> FREQRANGE_W {
266        FREQRANGE_W { w: self }
267    }
268    #[doc = "Bits 21:23 - HFRCO Comparator Bias Current"]
269    #[inline(always)]
270    pub fn cmpbias(&mut self) -> CMPBIAS_W {
271        CMPBIAS_W { w: self }
272    }
273    #[doc = "Bit 24 - HFRCO LDO High Power Mode"]
274    #[inline(always)]
275    pub fn ldohp(&mut self) -> LDOHP_W {
276        LDOHP_W { w: self }
277    }
278    #[doc = "Bits 25:26 - Locally Divide HFRCO Clock Output"]
279    #[inline(always)]
280    pub fn clkdiv(&mut self) -> CLKDIV_W {
281        CLKDIV_W { w: self }
282    }
283    #[doc = "Bit 27 - Enable Reference for Fine Tuning"]
284    #[inline(always)]
285    pub fn finetuningen(&mut self) -> FINETUNINGEN_W {
286        FINETUNINGEN_W { w: self }
287    }
288    #[doc = "Bits 28:31 - HFRCO Temperature Coefficient Trim on Comparator Reference"]
289    #[inline(always)]
290    pub fn vreftc(&mut self) -> VREFTC_W {
291        VREFTC_W { w: self }
292    }
293}
efm32pg12_pac/cmu/hfrcoctrl.rs

efm32pg12_pac/cmu/
hfrcoctrl.rs
