efm32pg12_pac/cmu/
hfpresc.rs

1#[doc = "Reader of register HFPRESC"]
2pub type R = crate::R<u32, super::HFPRESC>;
3#[doc = "Writer for register HFPRESC"]
4pub type W = crate::W<u32, super::HFPRESC>;
5#[doc = "Register HFPRESC `reset()`'s with value 0"]
6impl crate::ResetValue for super::HFPRESC {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "HFCLK Prescaler\n\nValue on reset: 0"]
14#[derive(Clone, Copy, Debug, PartialEq)]
15#[repr(u8)]
16pub enum PRESC_A {
17    #[doc = "0: `0`"]
18    NODIVISION = 0,
19}
20impl From<PRESC_A> for u8 {
21    #[inline(always)]
22    fn from(variant: PRESC_A) -> Self {
23        variant as _
24    }
25}
26#[doc = "Reader of field `PRESC`"]
27pub type PRESC_R = crate::R<u8, PRESC_A>;
28impl PRESC_R {
29    #[doc = r"Get enumerated values variant"]
30    #[inline(always)]
31    pub fn variant(&self) -> crate::Variant<u8, PRESC_A> {
32        use crate::Variant::*;
33        match self.bits {
34            0 => Val(PRESC_A::NODIVISION),
35            i => Res(i),
36        }
37    }
38    #[doc = "Checks if the value of the field is `NODIVISION`"]
39    #[inline(always)]
40    pub fn is_nodivision(&self) -> bool {
41        *self == PRESC_A::NODIVISION
42    }
43}
44#[doc = "Write proxy for field `PRESC`"]
45pub struct PRESC_W<'a> {
46    w: &'a mut W,
47}
48impl<'a> PRESC_W<'a> {
49    #[doc = r"Writes `variant` to the field"]
50    #[inline(always)]
51    pub fn variant(self, variant: PRESC_A) -> &'a mut W {
52        unsafe { self.bits(variant.into()) }
53    }
54    #[doc = "`0`"]
55    #[inline(always)]
56    pub fn nodivision(self) -> &'a mut W {
57        self.variant(PRESC_A::NODIVISION)
58    }
59    #[doc = r"Writes raw bits to the field"]
60    #[inline(always)]
61    pub unsafe fn bits(self, value: u8) -> &'a mut W {
62        self.w.bits = (self.w.bits & !(0x1f << 8)) | (((value as u32) & 0x1f) << 8);
63        self.w
64    }
65}
66#[doc = "HFCLKLE Prescaler\n\nValue on reset: 0"]
67#[derive(Clone, Copy, Debug, PartialEq)]
68pub enum HFCLKLEPRESC_A {
69    #[doc = "0: HFCLKLE is HFBUSCLKLE divided by 2."]
70    DIV2 = 0,
71    #[doc = "1: HFCLKLE is HFBUSCLKLE divided by 4."]
72    DIV4 = 1,
73}
74impl From<HFCLKLEPRESC_A> for bool {
75    #[inline(always)]
76    fn from(variant: HFCLKLEPRESC_A) -> Self {
77        variant as u8 != 0
78    }
79}
80#[doc = "Reader of field `HFCLKLEPRESC`"]
81pub type HFCLKLEPRESC_R = crate::R<bool, HFCLKLEPRESC_A>;
82impl HFCLKLEPRESC_R {
83    #[doc = r"Get enumerated values variant"]
84    #[inline(always)]
85    pub fn variant(&self) -> HFCLKLEPRESC_A {
86        match self.bits {
87            false => HFCLKLEPRESC_A::DIV2,
88            true => HFCLKLEPRESC_A::DIV4,
89        }
90    }
91    #[doc = "Checks if the value of the field is `DIV2`"]
92    #[inline(always)]
93    pub fn is_div2(&self) -> bool {
94        *self == HFCLKLEPRESC_A::DIV2
95    }
96    #[doc = "Checks if the value of the field is `DIV4`"]
97    #[inline(always)]
98    pub fn is_div4(&self) -> bool {
99        *self == HFCLKLEPRESC_A::DIV4
100    }
101}
102#[doc = "Write proxy for field `HFCLKLEPRESC`"]
103pub struct HFCLKLEPRESC_W<'a> {
104    w: &'a mut W,
105}
106impl<'a> HFCLKLEPRESC_W<'a> {
107    #[doc = r"Writes `variant` to the field"]
108    #[inline(always)]
109    pub fn variant(self, variant: HFCLKLEPRESC_A) -> &'a mut W {
110        {
111            self.bit(variant.into())
112        }
113    }
114    #[doc = "HFCLKLE is HFBUSCLKLE divided by 2."]
115    #[inline(always)]
116    pub fn div2(self) -> &'a mut W {
117        self.variant(HFCLKLEPRESC_A::DIV2)
118    }
119    #[doc = "HFCLKLE is HFBUSCLKLE divided by 4."]
120    #[inline(always)]
121    pub fn div4(self) -> &'a mut W {
122        self.variant(HFCLKLEPRESC_A::DIV4)
123    }
124    #[doc = r"Sets the field bit"]
125    #[inline(always)]
126    pub fn set_bit(self) -> &'a mut W {
127        self.bit(true)
128    }
129    #[doc = r"Clears the field bit"]
130    #[inline(always)]
131    pub fn clear_bit(self) -> &'a mut W {
132        self.bit(false)
133    }
134    #[doc = r"Writes raw bits to the field"]
135    #[inline(always)]
136    pub fn bit(self, value: bool) -> &'a mut W {
137        self.w.bits = (self.w.bits & !(0x01 << 24)) | (((value as u32) & 0x01) << 24);
138        self.w
139    }
140}
141impl R {
142    #[doc = "Bits 8:12 - HFCLK Prescaler"]
143    #[inline(always)]
144    pub fn presc(&self) -> PRESC_R {
145        PRESC_R::new(((self.bits >> 8) & 0x1f) as u8)
146    }
147    #[doc = "Bit 24 - HFCLKLE Prescaler"]
148    #[inline(always)]
149    pub fn hfclklepresc(&self) -> HFCLKLEPRESC_R {
150        HFCLKLEPRESC_R::new(((self.bits >> 24) & 0x01) != 0)
151    }
152}
153impl W {
154    #[doc = "Bits 8:12 - HFCLK Prescaler"]
155    #[inline(always)]
156    pub fn presc(&mut self) -> PRESC_W {
157        PRESC_W { w: self }
158    }
159    #[doc = "Bit 24 - HFCLKLE Prescaler"]
160    #[inline(always)]
161    pub fn hfclklepresc(&mut self) -> HFCLKLEPRESC_W {
162        HFCLKLEPRESC_W { w: self }
163    }
164}
efm32pg12_pac/cmu/hfpresc.rs

efm32pg12_pac/cmu/
hfpresc.rs
