efm32pg12_pac/cmu/
hfperclken0.rs

1#[doc = "Reader of register HFPERCLKEN0"]
2pub type R = crate::R<u32, super::HFPERCLKEN0>;
3#[doc = "Writer for register HFPERCLKEN0"]
4pub type W = crate::W<u32, super::HFPERCLKEN0>;
5#[doc = "Register HFPERCLKEN0 `reset()`'s with value 0"]
6impl crate::ResetValue for super::HFPERCLKEN0 {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "Reader of field `TIMER0`"]
14pub type TIMER0_R = crate::R<bool, bool>;
15#[doc = "Write proxy for field `TIMER0`"]
16pub struct TIMER0_W<'a> {
17    w: &'a mut W,
18}
19impl<'a> TIMER0_W<'a> {
20    #[doc = r"Sets the field bit"]
21    #[inline(always)]
22    pub fn set_bit(self) -> &'a mut W {
23        self.bit(true)
24    }
25    #[doc = r"Clears the field bit"]
26    #[inline(always)]
27    pub fn clear_bit(self) -> &'a mut W {
28        self.bit(false)
29    }
30    #[doc = r"Writes raw bits to the field"]
31    #[inline(always)]
32    pub fn bit(self, value: bool) -> &'a mut W {
33        self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
34        self.w
35    }
36}
37#[doc = "Reader of field `TIMER1`"]
38pub type TIMER1_R = crate::R<bool, bool>;
39#[doc = "Write proxy for field `TIMER1`"]
40pub struct TIMER1_W<'a> {
41    w: &'a mut W,
42}
43impl<'a> TIMER1_W<'a> {
44    #[doc = r"Sets the field bit"]
45    #[inline(always)]
46    pub fn set_bit(self) -> &'a mut W {
47        self.bit(true)
48    }
49    #[doc = r"Clears the field bit"]
50    #[inline(always)]
51    pub fn clear_bit(self) -> &'a mut W {
52        self.bit(false)
53    }
54    #[doc = r"Writes raw bits to the field"]
55    #[inline(always)]
56    pub fn bit(self, value: bool) -> &'a mut W {
57        self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
58        self.w
59    }
60}
61#[doc = "Reader of field `WTIMER0`"]
62pub type WTIMER0_R = crate::R<bool, bool>;
63#[doc = "Write proxy for field `WTIMER0`"]
64pub struct WTIMER0_W<'a> {
65    w: &'a mut W,
66}
67impl<'a> WTIMER0_W<'a> {
68    #[doc = r"Sets the field bit"]
69    #[inline(always)]
70    pub fn set_bit(self) -> &'a mut W {
71        self.bit(true)
72    }
73    #[doc = r"Clears the field bit"]
74    #[inline(always)]
75    pub fn clear_bit(self) -> &'a mut W {
76        self.bit(false)
77    }
78    #[doc = r"Writes raw bits to the field"]
79    #[inline(always)]
80    pub fn bit(self, value: bool) -> &'a mut W {
81        self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
82        self.w
83    }
84}
85#[doc = "Reader of field `WTIMER1`"]
86pub type WTIMER1_R = crate::R<bool, bool>;
87#[doc = "Write proxy for field `WTIMER1`"]
88pub struct WTIMER1_W<'a> {
89    w: &'a mut W,
90}
91impl<'a> WTIMER1_W<'a> {
92    #[doc = r"Sets the field bit"]
93    #[inline(always)]
94    pub fn set_bit(self) -> &'a mut W {
95        self.bit(true)
96    }
97    #[doc = r"Clears the field bit"]
98    #[inline(always)]
99    pub fn clear_bit(self) -> &'a mut W {
100        self.bit(false)
101    }
102    #[doc = r"Writes raw bits to the field"]
103    #[inline(always)]
104    pub fn bit(self, value: bool) -> &'a mut W {
105        self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3);
106        self.w
107    }
108}
109#[doc = "Reader of field `USART0`"]
110pub type USART0_R = crate::R<bool, bool>;
111#[doc = "Write proxy for field `USART0`"]
112pub struct USART0_W<'a> {
113    w: &'a mut W,
114}
115impl<'a> USART0_W<'a> {
116    #[doc = r"Sets the field bit"]
117    #[inline(always)]
118    pub fn set_bit(self) -> &'a mut W {
119        self.bit(true)
120    }
121    #[doc = r"Clears the field bit"]
122    #[inline(always)]
123    pub fn clear_bit(self) -> &'a mut W {
124        self.bit(false)
125    }
126    #[doc = r"Writes raw bits to the field"]
127    #[inline(always)]
128    pub fn bit(self, value: bool) -> &'a mut W {
129        self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4);
130        self.w
131    }
132}
133#[doc = "Reader of field `USART1`"]
134pub type USART1_R = crate::R<bool, bool>;
135#[doc = "Write proxy for field `USART1`"]
136pub struct USART1_W<'a> {
137    w: &'a mut W,
138}
139impl<'a> USART1_W<'a> {
140    #[doc = r"Sets the field bit"]
141    #[inline(always)]
142    pub fn set_bit(self) -> &'a mut W {
143        self.bit(true)
144    }
145    #[doc = r"Clears the field bit"]
146    #[inline(always)]
147    pub fn clear_bit(self) -> &'a mut W {
148        self.bit(false)
149    }
150    #[doc = r"Writes raw bits to the field"]
151    #[inline(always)]
152    pub fn bit(self, value: bool) -> &'a mut W {
153        self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5);
154        self.w
155    }
156}
157#[doc = "Reader of field `USART2`"]
158pub type USART2_R = crate::R<bool, bool>;
159#[doc = "Write proxy for field `USART2`"]
160pub struct USART2_W<'a> {
161    w: &'a mut W,
162}
163impl<'a> USART2_W<'a> {
164    #[doc = r"Sets the field bit"]
165    #[inline(always)]
166    pub fn set_bit(self) -> &'a mut W {
167        self.bit(true)
168    }
169    #[doc = r"Clears the field bit"]
170    #[inline(always)]
171    pub fn clear_bit(self) -> &'a mut W {
172        self.bit(false)
173    }
174    #[doc = r"Writes raw bits to the field"]
175    #[inline(always)]
176    pub fn bit(self, value: bool) -> &'a mut W {
177        self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u32) & 0x01) << 6);
178        self.w
179    }
180}
181#[doc = "Reader of field `USART3`"]
182pub type USART3_R = crate::R<bool, bool>;
183#[doc = "Write proxy for field `USART3`"]
184pub struct USART3_W<'a> {
185    w: &'a mut W,
186}
187impl<'a> USART3_W<'a> {
188    #[doc = r"Sets the field bit"]
189    #[inline(always)]
190    pub fn set_bit(self) -> &'a mut W {
191        self.bit(true)
192    }
193    #[doc = r"Clears the field bit"]
194    #[inline(always)]
195    pub fn clear_bit(self) -> &'a mut W {
196        self.bit(false)
197    }
198    #[doc = r"Writes raw bits to the field"]
199    #[inline(always)]
200    pub fn bit(self, value: bool) -> &'a mut W {
201        self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7);
202        self.w
203    }
204}
205#[doc = "Reader of field `I2C0`"]
206pub type I2C0_R = crate::R<bool, bool>;
207#[doc = "Write proxy for field `I2C0`"]
208pub struct I2C0_W<'a> {
209    w: &'a mut W,
210}
211impl<'a> I2C0_W<'a> {
212    #[doc = r"Sets the field bit"]
213    #[inline(always)]
214    pub fn set_bit(self) -> &'a mut W {
215        self.bit(true)
216    }
217    #[doc = r"Clears the field bit"]
218    #[inline(always)]
219    pub fn clear_bit(self) -> &'a mut W {
220        self.bit(false)
221    }
222    #[doc = r"Writes raw bits to the field"]
223    #[inline(always)]
224    pub fn bit(self, value: bool) -> &'a mut W {
225        self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8);
226        self.w
227    }
228}
229#[doc = "Reader of field `I2C1`"]
230pub type I2C1_R = crate::R<bool, bool>;
231#[doc = "Write proxy for field `I2C1`"]
232pub struct I2C1_W<'a> {
233    w: &'a mut W,
234}
235impl<'a> I2C1_W<'a> {
236    #[doc = r"Sets the field bit"]
237    #[inline(always)]
238    pub fn set_bit(self) -> &'a mut W {
239        self.bit(true)
240    }
241    #[doc = r"Clears the field bit"]
242    #[inline(always)]
243    pub fn clear_bit(self) -> &'a mut W {
244        self.bit(false)
245    }
246    #[doc = r"Writes raw bits to the field"]
247    #[inline(always)]
248    pub fn bit(self, value: bool) -> &'a mut W {
249        self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9);
250        self.w
251    }
252}
253#[doc = "Reader of field `ACMP0`"]
254pub type ACMP0_R = crate::R<bool, bool>;
255#[doc = "Write proxy for field `ACMP0`"]
256pub struct ACMP0_W<'a> {
257    w: &'a mut W,
258}
259impl<'a> ACMP0_W<'a> {
260    #[doc = r"Sets the field bit"]
261    #[inline(always)]
262    pub fn set_bit(self) -> &'a mut W {
263        self.bit(true)
264    }
265    #[doc = r"Clears the field bit"]
266    #[inline(always)]
267    pub fn clear_bit(self) -> &'a mut W {
268        self.bit(false)
269    }
270    #[doc = r"Writes raw bits to the field"]
271    #[inline(always)]
272    pub fn bit(self, value: bool) -> &'a mut W {
273        self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10);
274        self.w
275    }
276}
277#[doc = "Reader of field `ACMP1`"]
278pub type ACMP1_R = crate::R<bool, bool>;
279#[doc = "Write proxy for field `ACMP1`"]
280pub struct ACMP1_W<'a> {
281    w: &'a mut W,
282}
283impl<'a> ACMP1_W<'a> {
284    #[doc = r"Sets the field bit"]
285    #[inline(always)]
286    pub fn set_bit(self) -> &'a mut W {
287        self.bit(true)
288    }
289    #[doc = r"Clears the field bit"]
290    #[inline(always)]
291    pub fn clear_bit(self) -> &'a mut W {
292        self.bit(false)
293    }
294    #[doc = r"Writes raw bits to the field"]
295    #[inline(always)]
296    pub fn bit(self, value: bool) -> &'a mut W {
297        self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11);
298        self.w
299    }
300}
301#[doc = "Reader of field `CRYOTIMER`"]
302pub type CRYOTIMER_R = crate::R<bool, bool>;
303#[doc = "Write proxy for field `CRYOTIMER`"]
304pub struct CRYOTIMER_W<'a> {
305    w: &'a mut W,
306}
307impl<'a> CRYOTIMER_W<'a> {
308    #[doc = r"Sets the field bit"]
309    #[inline(always)]
310    pub fn set_bit(self) -> &'a mut W {
311        self.bit(true)
312    }
313    #[doc = r"Clears the field bit"]
314    #[inline(always)]
315    pub fn clear_bit(self) -> &'a mut W {
316        self.bit(false)
317    }
318    #[doc = r"Writes raw bits to the field"]
319    #[inline(always)]
320    pub fn bit(self, value: bool) -> &'a mut W {
321        self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u32) & 0x01) << 12);
322        self.w
323    }
324}
325#[doc = "Reader of field `ADC0`"]
326pub type ADC0_R = crate::R<bool, bool>;
327#[doc = "Write proxy for field `ADC0`"]
328pub struct ADC0_W<'a> {
329    w: &'a mut W,
330}
331impl<'a> ADC0_W<'a> {
332    #[doc = r"Sets the field bit"]
333    #[inline(always)]
334    pub fn set_bit(self) -> &'a mut W {
335        self.bit(true)
336    }
337    #[doc = r"Clears the field bit"]
338    #[inline(always)]
339    pub fn clear_bit(self) -> &'a mut W {
340        self.bit(false)
341    }
342    #[doc = r"Writes raw bits to the field"]
343    #[inline(always)]
344    pub fn bit(self, value: bool) -> &'a mut W {
345        self.w.bits = (self.w.bits & !(0x01 << 13)) | (((value as u32) & 0x01) << 13);
346        self.w
347    }
348}
349#[doc = "Reader of field `IDAC0`"]
350pub type IDAC0_R = crate::R<bool, bool>;
351#[doc = "Write proxy for field `IDAC0`"]
352pub struct IDAC0_W<'a> {
353    w: &'a mut W,
354}
355impl<'a> IDAC0_W<'a> {
356    #[doc = r"Sets the field bit"]
357    #[inline(always)]
358    pub fn set_bit(self) -> &'a mut W {
359        self.bit(true)
360    }
361    #[doc = r"Clears the field bit"]
362    #[inline(always)]
363    pub fn clear_bit(self) -> &'a mut W {
364        self.bit(false)
365    }
366    #[doc = r"Writes raw bits to the field"]
367    #[inline(always)]
368    pub fn bit(self, value: bool) -> &'a mut W {
369        self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14);
370        self.w
371    }
372}
373#[doc = "Reader of field `VDAC0`"]
374pub type VDAC0_R = crate::R<bool, bool>;
375#[doc = "Write proxy for field `VDAC0`"]
376pub struct VDAC0_W<'a> {
377    w: &'a mut W,
378}
379impl<'a> VDAC0_W<'a> {
380    #[doc = r"Sets the field bit"]
381    #[inline(always)]
382    pub fn set_bit(self) -> &'a mut W {
383        self.bit(true)
384    }
385    #[doc = r"Clears the field bit"]
386    #[inline(always)]
387    pub fn clear_bit(self) -> &'a mut W {
388        self.bit(false)
389    }
390    #[doc = r"Writes raw bits to the field"]
391    #[inline(always)]
392    pub fn bit(self, value: bool) -> &'a mut W {
393        self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15);
394        self.w
395    }
396}
397#[doc = "Reader of field `CSEN`"]
398pub type CSEN_R = crate::R<bool, bool>;
399#[doc = "Write proxy for field `CSEN`"]
400pub struct CSEN_W<'a> {
401    w: &'a mut W,
402}
403impl<'a> CSEN_W<'a> {
404    #[doc = r"Sets the field bit"]
405    #[inline(always)]
406    pub fn set_bit(self) -> &'a mut W {
407        self.bit(true)
408    }
409    #[doc = r"Clears the field bit"]
410    #[inline(always)]
411    pub fn clear_bit(self) -> &'a mut W {
412        self.bit(false)
413    }
414    #[doc = r"Writes raw bits to the field"]
415    #[inline(always)]
416    pub fn bit(self, value: bool) -> &'a mut W {
417        self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16);
418        self.w
419    }
420}
421#[doc = "Reader of field `TRNG0`"]
422pub type TRNG0_R = crate::R<bool, bool>;
423#[doc = "Write proxy for field `TRNG0`"]
424pub struct TRNG0_W<'a> {
425    w: &'a mut W,
426}
427impl<'a> TRNG0_W<'a> {
428    #[doc = r"Sets the field bit"]
429    #[inline(always)]
430    pub fn set_bit(self) -> &'a mut W {
431        self.bit(true)
432    }
433    #[doc = r"Clears the field bit"]
434    #[inline(always)]
435    pub fn clear_bit(self) -> &'a mut W {
436        self.bit(false)
437    }
438    #[doc = r"Writes raw bits to the field"]
439    #[inline(always)]
440    pub fn bit(self, value: bool) -> &'a mut W {
441        self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17);
442        self.w
443    }
444}
445impl R {
446    #[doc = "Bit 0 - Timer 0 Clock Enable"]
447    #[inline(always)]
448    pub fn timer0(&self) -> TIMER0_R {
449        TIMER0_R::new((self.bits & 0x01) != 0)
450    }
451    #[doc = "Bit 1 - Timer 1 Clock Enable"]
452    #[inline(always)]
453    pub fn timer1(&self) -> TIMER1_R {
454        TIMER1_R::new(((self.bits >> 1) & 0x01) != 0)
455    }
456    #[doc = "Bit 2 - Wide Timer 0 Clock Enable"]
457    #[inline(always)]
458    pub fn wtimer0(&self) -> WTIMER0_R {
459        WTIMER0_R::new(((self.bits >> 2) & 0x01) != 0)
460    }
461    #[doc = "Bit 3 - Wide Timer 1 Clock Enable"]
462    #[inline(always)]
463    pub fn wtimer1(&self) -> WTIMER1_R {
464        WTIMER1_R::new(((self.bits >> 3) & 0x01) != 0)
465    }
466    #[doc = "Bit 4 - Universal Synchronous/Asynchronous Receiver/Transmitter 0 Clock Enable"]
467    #[inline(always)]
468    pub fn usart0(&self) -> USART0_R {
469        USART0_R::new(((self.bits >> 4) & 0x01) != 0)
470    }
471    #[doc = "Bit 5 - Universal Synchronous/Asynchronous Receiver/Transmitter 1 Clock Enable"]
472    #[inline(always)]
473    pub fn usart1(&self) -> USART1_R {
474        USART1_R::new(((self.bits >> 5) & 0x01) != 0)
475    }
476    #[doc = "Bit 6 - Universal Synchronous/Asynchronous Receiver/Transmitter 2 Clock Enable"]
477    #[inline(always)]
478    pub fn usart2(&self) -> USART2_R {
479        USART2_R::new(((self.bits >> 6) & 0x01) != 0)
480    }
481    #[doc = "Bit 7 - Universal Synchronous/Asynchronous Receiver/Transmitter 3 Clock Enable"]
482    #[inline(always)]
483    pub fn usart3(&self) -> USART3_R {
484        USART3_R::new(((self.bits >> 7) & 0x01) != 0)
485    }
486    #[doc = "Bit 8 - I2C 0 Clock Enable"]
487    #[inline(always)]
488    pub fn i2c0(&self) -> I2C0_R {
489        I2C0_R::new(((self.bits >> 8) & 0x01) != 0)
490    }
491    #[doc = "Bit 9 - I2C 1 Clock Enable"]
492    #[inline(always)]
493    pub fn i2c1(&self) -> I2C1_R {
494        I2C1_R::new(((self.bits >> 9) & 0x01) != 0)
495    }
496    #[doc = "Bit 10 - Analog Comparator 0 Clock Enable"]
497    #[inline(always)]
498    pub fn acmp0(&self) -> ACMP0_R {
499        ACMP0_R::new(((self.bits >> 10) & 0x01) != 0)
500    }
501    #[doc = "Bit 11 - Analog Comparator 1 Clock Enable"]
502    #[inline(always)]
503    pub fn acmp1(&self) -> ACMP1_R {
504        ACMP1_R::new(((self.bits >> 11) & 0x01) != 0)
505    }
506    #[doc = "Bit 12 - CRYOTIMER Clock Enable"]
507    #[inline(always)]
508    pub fn cryotimer(&self) -> CRYOTIMER_R {
509        CRYOTIMER_R::new(((self.bits >> 12) & 0x01) != 0)
510    }
511    #[doc = "Bit 13 - Analog to Digital Converter 0 Clock Enable"]
512    #[inline(always)]
513    pub fn adc0(&self) -> ADC0_R {
514        ADC0_R::new(((self.bits >> 13) & 0x01) != 0)
515    }
516    #[doc = "Bit 14 - Current Digital to Analog Converter 0 Clock Enable"]
517    #[inline(always)]
518    pub fn idac0(&self) -> IDAC0_R {
519        IDAC0_R::new(((self.bits >> 14) & 0x01) != 0)
520    }
521    #[doc = "Bit 15 - Digital to Analog Converter 0 Clock Enable"]
522    #[inline(always)]
523    pub fn vdac0(&self) -> VDAC0_R {
524        VDAC0_R::new(((self.bits >> 15) & 0x01) != 0)
525    }
526    #[doc = "Bit 16 - Capacitive touch sense module Clock Enable"]
527    #[inline(always)]
528    pub fn csen(&self) -> CSEN_R {
529        CSEN_R::new(((self.bits >> 16) & 0x01) != 0)
530    }
531    #[doc = "Bit 17 - True Random Number Generator 0 Clock Enable"]
532    #[inline(always)]
533    pub fn trng0(&self) -> TRNG0_R {
534        TRNG0_R::new(((self.bits >> 17) & 0x01) != 0)
535    }
536}
537impl W {
538    #[doc = "Bit 0 - Timer 0 Clock Enable"]
539    #[inline(always)]
540    pub fn timer0(&mut self) -> TIMER0_W {
541        TIMER0_W { w: self }
542    }
543    #[doc = "Bit 1 - Timer 1 Clock Enable"]
544    #[inline(always)]
545    pub fn timer1(&mut self) -> TIMER1_W {
546        TIMER1_W { w: self }
547    }
548    #[doc = "Bit 2 - Wide Timer 0 Clock Enable"]
549    #[inline(always)]
550    pub fn wtimer0(&mut self) -> WTIMER0_W {
551        WTIMER0_W { w: self }
552    }
553    #[doc = "Bit 3 - Wide Timer 1 Clock Enable"]
554    #[inline(always)]
555    pub fn wtimer1(&mut self) -> WTIMER1_W {
556        WTIMER1_W { w: self }
557    }
558    #[doc = "Bit 4 - Universal Synchronous/Asynchronous Receiver/Transmitter 0 Clock Enable"]
559    #[inline(always)]
560    pub fn usart0(&mut self) -> USART0_W {
561        USART0_W { w: self }
562    }
563    #[doc = "Bit 5 - Universal Synchronous/Asynchronous Receiver/Transmitter 1 Clock Enable"]
564    #[inline(always)]
565    pub fn usart1(&mut self) -> USART1_W {
566        USART1_W { w: self }
567    }
568    #[doc = "Bit 6 - Universal Synchronous/Asynchronous Receiver/Transmitter 2 Clock Enable"]
569    #[inline(always)]
570    pub fn usart2(&mut self) -> USART2_W {
571        USART2_W { w: self }
572    }
573    #[doc = "Bit 7 - Universal Synchronous/Asynchronous Receiver/Transmitter 3 Clock Enable"]
574    #[inline(always)]
575    pub fn usart3(&mut self) -> USART3_W {
576        USART3_W { w: self }
577    }
578    #[doc = "Bit 8 - I2C 0 Clock Enable"]
579    #[inline(always)]
580    pub fn i2c0(&mut self) -> I2C0_W {
581        I2C0_W { w: self }
582    }
583    #[doc = "Bit 9 - I2C 1 Clock Enable"]
584    #[inline(always)]
585    pub fn i2c1(&mut self) -> I2C1_W {
586        I2C1_W { w: self }
587    }
588    #[doc = "Bit 10 - Analog Comparator 0 Clock Enable"]
589    #[inline(always)]
590    pub fn acmp0(&mut self) -> ACMP0_W {
591        ACMP0_W { w: self }
592    }
593    #[doc = "Bit 11 - Analog Comparator 1 Clock Enable"]
594    #[inline(always)]
595    pub fn acmp1(&mut self) -> ACMP1_W {
596        ACMP1_W { w: self }
597    }
598    #[doc = "Bit 12 - CRYOTIMER Clock Enable"]
599    #[inline(always)]
600    pub fn cryotimer(&mut self) -> CRYOTIMER_W {
601        CRYOTIMER_W { w: self }
602    }
603    #[doc = "Bit 13 - Analog to Digital Converter 0 Clock Enable"]
604    #[inline(always)]
605    pub fn adc0(&mut self) -> ADC0_W {
606        ADC0_W { w: self }
607    }
608    #[doc = "Bit 14 - Current Digital to Analog Converter 0 Clock Enable"]
609    #[inline(always)]
610    pub fn idac0(&mut self) -> IDAC0_W {
611        IDAC0_W { w: self }
612    }
613    #[doc = "Bit 15 - Digital to Analog Converter 0 Clock Enable"]
614    #[inline(always)]
615    pub fn vdac0(&mut self) -> VDAC0_W {
616        VDAC0_W { w: self }
617    }
618    #[doc = "Bit 16 - Capacitive touch sense module Clock Enable"]
619    #[inline(always)]
620    pub fn csen(&mut self) -> CSEN_W {
621        CSEN_W { w: self }
622    }
623    #[doc = "Bit 17 - True Random Number Generator 0 Clock Enable"]
624    #[inline(always)]
625    pub fn trng0(&mut self) -> TRNG0_W {
626        TRNG0_W { w: self }
627    }
628}
efm32pg12_pac/cmu/hfperclken0.rs

efm32pg12_pac/cmu/
hfperclken0.rs
