1#[doc = "Reader of register SINGLECTRLX"]
2pub type R = crate::R<u32, super::SINGLECTRLX>;
3#[doc = "Writer for register SINGLECTRLX"]
4pub type W = crate::W<u32, super::SINGLECTRLX>;
5#[doc = "Register SINGLECTRLX `reset()`'s with value 0"]
6impl crate::ResetValue for super::SINGLECTRLX {
7 type Type = u32;
8 #[inline(always)]
9 fn reset_value() -> Self::Type {
10 0
11 }
12}
13#[doc = "Single Channel Reference Selection\n\nValue on reset: 0"]
14#[derive(Clone, Copy, Debug, PartialEq)]
15#[repr(u8)]
16pub enum VREFSEL_A {
17 #[doc = "0: Internal 0.83V Bandgap reference"]
18 VBGR = 0,
19 #[doc = "1: Scaled AVDD: AVDD*(the VREF attenuation factor)"]
20 VDDXWATT = 1,
21 #[doc = "2: Scaled singled ended external Vref: ADCn_EXTP*(the VREF attenuation factor)"]
22 VREFPWATT = 2,
23 #[doc = "3: Raw single ended external Vref: ADCn_EXTP"]
24 VREFP = 3,
25 #[doc = "4: Special mode used to generate ENTROPY."]
26 VENTROPY = 4,
27 #[doc = "5: Scaled differential external Vref from : (ADCn_EXTP-ADCn_EXTN)*(the VREF attenuation factor)"]
28 VREFPNWATT = 5,
29 #[doc = "6: Raw differential external Vref from : (ADCn_EXTP-ADCn_EXTN)"]
30 VREFPN = 6,
31 #[doc = "7: Internal Bandgap reference at low setting 0.78V"]
32 VBGRLOW = 7,
33}
34impl From<VREFSEL_A> for u8 {
35 #[inline(always)]
36 fn from(variant: VREFSEL_A) -> Self {
37 variant as _
38 }
39}
40#[doc = "Reader of field `VREFSEL`"]
41pub type VREFSEL_R = crate::R<u8, VREFSEL_A>;
42impl VREFSEL_R {
43 #[doc = r"Get enumerated values variant"]
44 #[inline(always)]
45 pub fn variant(&self) -> VREFSEL_A {
46 match self.bits {
47 0 => VREFSEL_A::VBGR,
48 1 => VREFSEL_A::VDDXWATT,
49 2 => VREFSEL_A::VREFPWATT,
50 3 => VREFSEL_A::VREFP,
51 4 => VREFSEL_A::VENTROPY,
52 5 => VREFSEL_A::VREFPNWATT,
53 6 => VREFSEL_A::VREFPN,
54 7 => VREFSEL_A::VBGRLOW,
55 _ => unreachable!(),
56 }
57 }
58 #[doc = "Checks if the value of the field is `VBGR`"]
59 #[inline(always)]
60 pub fn is_vbgr(&self) -> bool {
61 *self == VREFSEL_A::VBGR
62 }
63 #[doc = "Checks if the value of the field is `VDDXWATT`"]
64 #[inline(always)]
65 pub fn is_vddxwatt(&self) -> bool {
66 *self == VREFSEL_A::VDDXWATT
67 }
68 #[doc = "Checks if the value of the field is `VREFPWATT`"]
69 #[inline(always)]
70 pub fn is_vrefpwatt(&self) -> bool {
71 *self == VREFSEL_A::VREFPWATT
72 }
73 #[doc = "Checks if the value of the field is `VREFP`"]
74 #[inline(always)]
75 pub fn is_vrefp(&self) -> bool {
76 *self == VREFSEL_A::VREFP
77 }
78 #[doc = "Checks if the value of the field is `VENTROPY`"]
79 #[inline(always)]
80 pub fn is_ventropy(&self) -> bool {
81 *self == VREFSEL_A::VENTROPY
82 }
83 #[doc = "Checks if the value of the field is `VREFPNWATT`"]
84 #[inline(always)]
85 pub fn is_vrefpnwatt(&self) -> bool {
86 *self == VREFSEL_A::VREFPNWATT
87 }
88 #[doc = "Checks if the value of the field is `VREFPN`"]
89 #[inline(always)]
90 pub fn is_vrefpn(&self) -> bool {
91 *self == VREFSEL_A::VREFPN
92 }
93 #[doc = "Checks if the value of the field is `VBGRLOW`"]
94 #[inline(always)]
95 pub fn is_vbgrlow(&self) -> bool {
96 *self == VREFSEL_A::VBGRLOW
97 }
98}
99#[doc = "Write proxy for field `VREFSEL`"]
100pub struct VREFSEL_W<'a> {
101 w: &'a mut W,
102}
103impl<'a> VREFSEL_W<'a> {
104 #[doc = r"Writes `variant` to the field"]
105 #[inline(always)]
106 pub fn variant(self, variant: VREFSEL_A) -> &'a mut W {
107 {
108 self.bits(variant.into())
109 }
110 }
111 #[doc = "Internal 0.83V Bandgap reference"]
112 #[inline(always)]
113 pub fn vbgr(self) -> &'a mut W {
114 self.variant(VREFSEL_A::VBGR)
115 }
116 #[doc = "Scaled AVDD: AVDD*(the VREF attenuation factor)"]
117 #[inline(always)]
118 pub fn vddxwatt(self) -> &'a mut W {
119 self.variant(VREFSEL_A::VDDXWATT)
120 }
121 #[doc = "Scaled singled ended external Vref: ADCn_EXTP*(the VREF attenuation factor)"]
122 #[inline(always)]
123 pub fn vrefpwatt(self) -> &'a mut W {
124 self.variant(VREFSEL_A::VREFPWATT)
125 }
126 #[doc = "Raw single ended external Vref: ADCn_EXTP"]
127 #[inline(always)]
128 pub fn vrefp(self) -> &'a mut W {
129 self.variant(VREFSEL_A::VREFP)
130 }
131 #[doc = "Special mode used to generate ENTROPY."]
132 #[inline(always)]
133 pub fn ventropy(self) -> &'a mut W {
134 self.variant(VREFSEL_A::VENTROPY)
135 }
136 #[doc = "Scaled differential external Vref from : (ADCn_EXTP-ADCn_EXTN)*(the VREF attenuation factor)"]
137 #[inline(always)]
138 pub fn vrefpnwatt(self) -> &'a mut W {
139 self.variant(VREFSEL_A::VREFPNWATT)
140 }
141 #[doc = "Raw differential external Vref from : (ADCn_EXTP-ADCn_EXTN)"]
142 #[inline(always)]
143 pub fn vrefpn(self) -> &'a mut W {
144 self.variant(VREFSEL_A::VREFPN)
145 }
146 #[doc = "Internal Bandgap reference at low setting 0.78V"]
147 #[inline(always)]
148 pub fn vbgrlow(self) -> &'a mut W {
149 self.variant(VREFSEL_A::VBGRLOW)
150 }
151 #[doc = r"Writes raw bits to the field"]
152 #[inline(always)]
153 pub fn bits(self, value: u8) -> &'a mut W {
154 self.w.bits = (self.w.bits & !0x07) | ((value as u32) & 0x07);
155 self.w
156 }
157}
158#[doc = "Reader of field `VREFATTFIX`"]
159pub type VREFATTFIX_R = crate::R<bool, bool>;
160#[doc = "Write proxy for field `VREFATTFIX`"]
161pub struct VREFATTFIX_W<'a> {
162 w: &'a mut W,
163}
164impl<'a> VREFATTFIX_W<'a> {
165 #[doc = r"Sets the field bit"]
166 #[inline(always)]
167 pub fn set_bit(self) -> &'a mut W {
168 self.bit(true)
169 }
170 #[doc = r"Clears the field bit"]
171 #[inline(always)]
172 pub fn clear_bit(self) -> &'a mut W {
173 self.bit(false)
174 }
175 #[doc = r"Writes raw bits to the field"]
176 #[inline(always)]
177 pub fn bit(self, value: bool) -> &'a mut W {
178 self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3);
179 self.w
180 }
181}
182#[doc = "Reader of field `VREFATT`"]
183pub type VREFATT_R = crate::R<u8, u8>;
184#[doc = "Write proxy for field `VREFATT`"]
185pub struct VREFATT_W<'a> {
186 w: &'a mut W,
187}
188impl<'a> VREFATT_W<'a> {
189 #[doc = r"Writes raw bits to the field"]
190 #[inline(always)]
191 pub unsafe fn bits(self, value: u8) -> &'a mut W {
192 self.w.bits = (self.w.bits & !(0x0f << 4)) | (((value as u32) & 0x0f) << 4);
193 self.w
194 }
195}
196#[doc = "Reader of field `VINATT`"]
197pub type VINATT_R = crate::R<u8, u8>;
198#[doc = "Write proxy for field `VINATT`"]
199pub struct VINATT_W<'a> {
200 w: &'a mut W,
201}
202impl<'a> VINATT_W<'a> {
203 #[doc = r"Writes raw bits to the field"]
204 #[inline(always)]
205 pub unsafe fn bits(self, value: u8) -> &'a mut W {
206 self.w.bits = (self.w.bits & !(0x0f << 8)) | (((value as u32) & 0x0f) << 8);
207 self.w
208 }
209}
210#[doc = "Reader of field `DVL`"]
211pub type DVL_R = crate::R<u8, u8>;
212#[doc = "Write proxy for field `DVL`"]
213pub struct DVL_W<'a> {
214 w: &'a mut W,
215}
216impl<'a> DVL_W<'a> {
217 #[doc = r"Writes raw bits to the field"]
218 #[inline(always)]
219 pub unsafe fn bits(self, value: u8) -> &'a mut W {
220 self.w.bits = (self.w.bits & !(0x03 << 12)) | (((value as u32) & 0x03) << 12);
221 self.w
222 }
223}
224#[doc = "Reader of field `FIFOOFACT`"]
225pub type FIFOOFACT_R = crate::R<bool, bool>;
226#[doc = "Write proxy for field `FIFOOFACT`"]
227pub struct FIFOOFACT_W<'a> {
228 w: &'a mut W,
229}
230impl<'a> FIFOOFACT_W<'a> {
231 #[doc = r"Sets the field bit"]
232 #[inline(always)]
233 pub fn set_bit(self) -> &'a mut W {
234 self.bit(true)
235 }
236 #[doc = r"Clears the field bit"]
237 #[inline(always)]
238 pub fn clear_bit(self) -> &'a mut W {
239 self.bit(false)
240 }
241 #[doc = r"Writes raw bits to the field"]
242 #[inline(always)]
243 pub fn bit(self, value: bool) -> &'a mut W {
244 self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14);
245 self.w
246 }
247}
248#[doc = "Reader of field `PRSMODE`"]
249pub type PRSMODE_R = crate::R<bool, bool>;
250#[doc = "Write proxy for field `PRSMODE`"]
251pub struct PRSMODE_W<'a> {
252 w: &'a mut W,
253}
254impl<'a> PRSMODE_W<'a> {
255 #[doc = r"Sets the field bit"]
256 #[inline(always)]
257 pub fn set_bit(self) -> &'a mut W {
258 self.bit(true)
259 }
260 #[doc = r"Clears the field bit"]
261 #[inline(always)]
262 pub fn clear_bit(self) -> &'a mut W {
263 self.bit(false)
264 }
265 #[doc = r"Writes raw bits to the field"]
266 #[inline(always)]
267 pub fn bit(self, value: bool) -> &'a mut W {
268 self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16);
269 self.w
270 }
271}
272#[doc = "Single Channel PRS Trigger Select\n\nValue on reset: 0"]
273#[derive(Clone, Copy, Debug, PartialEq)]
274#[repr(u8)]
275pub enum PRSSEL_A {
276 #[doc = "0: PRS ch 0 triggers single channel"]
277 PRSCH0 = 0,
278 #[doc = "1: PRS ch 1 triggers single channel"]
279 PRSCH1 = 1,
280 #[doc = "2: PRS ch 2 triggers single channel"]
281 PRSCH2 = 2,
282 #[doc = "3: PRS ch 3 triggers single channel"]
283 PRSCH3 = 3,
284 #[doc = "4: PRS ch 4 triggers single channel"]
285 PRSCH4 = 4,
286 #[doc = "5: PRS ch 5 triggers single channel"]
287 PRSCH5 = 5,
288 #[doc = "6: PRS ch 6 triggers single channel"]
289 PRSCH6 = 6,
290 #[doc = "7: PRS ch 7 triggers single channel"]
291 PRSCH7 = 7,
292 #[doc = "8: PRS ch 8 triggers single channel"]
293 PRSCH8 = 8,
294 #[doc = "9: PRS ch 9 triggers single channel"]
295 PRSCH9 = 9,
296 #[doc = "10: PRS ch 10 triggers single channel"]
297 PRSCH10 = 10,
298 #[doc = "11: PRS ch 11 triggers single channel"]
299 PRSCH11 = 11,
300}
301impl From<PRSSEL_A> for u8 {
302 #[inline(always)]
303 fn from(variant: PRSSEL_A) -> Self {
304 variant as _
305 }
306}
307#[doc = "Reader of field `PRSSEL`"]
308pub type PRSSEL_R = crate::R<u8, PRSSEL_A>;
309impl PRSSEL_R {
310 #[doc = r"Get enumerated values variant"]
311 #[inline(always)]
312 pub fn variant(&self) -> crate::Variant<u8, PRSSEL_A> {
313 use crate::Variant::*;
314 match self.bits {
315 0 => Val(PRSSEL_A::PRSCH0),
316 1 => Val(PRSSEL_A::PRSCH1),
317 2 => Val(PRSSEL_A::PRSCH2),
318 3 => Val(PRSSEL_A::PRSCH3),
319 4 => Val(PRSSEL_A::PRSCH4),
320 5 => Val(PRSSEL_A::PRSCH5),
321 6 => Val(PRSSEL_A::PRSCH6),
322 7 => Val(PRSSEL_A::PRSCH7),
323 8 => Val(PRSSEL_A::PRSCH8),
324 9 => Val(PRSSEL_A::PRSCH9),
325 10 => Val(PRSSEL_A::PRSCH10),
326 11 => Val(PRSSEL_A::PRSCH11),
327 i => Res(i),
328 }
329 }
330 #[doc = "Checks if the value of the field is `PRSCH0`"]
331 #[inline(always)]
332 pub fn is_prsch0(&self) -> bool {
333 *self == PRSSEL_A::PRSCH0
334 }
335 #[doc = "Checks if the value of the field is `PRSCH1`"]
336 #[inline(always)]
337 pub fn is_prsch1(&self) -> bool {
338 *self == PRSSEL_A::PRSCH1
339 }
340 #[doc = "Checks if the value of the field is `PRSCH2`"]
341 #[inline(always)]
342 pub fn is_prsch2(&self) -> bool {
343 *self == PRSSEL_A::PRSCH2
344 }
345 #[doc = "Checks if the value of the field is `PRSCH3`"]
346 #[inline(always)]
347 pub fn is_prsch3(&self) -> bool {
348 *self == PRSSEL_A::PRSCH3
349 }
350 #[doc = "Checks if the value of the field is `PRSCH4`"]
351 #[inline(always)]
352 pub fn is_prsch4(&self) -> bool {
353 *self == PRSSEL_A::PRSCH4
354 }
355 #[doc = "Checks if the value of the field is `PRSCH5`"]
356 #[inline(always)]
357 pub fn is_prsch5(&self) -> bool {
358 *self == PRSSEL_A::PRSCH5
359 }
360 #[doc = "Checks if the value of the field is `PRSCH6`"]
361 #[inline(always)]
362 pub fn is_prsch6(&self) -> bool {
363 *self == PRSSEL_A::PRSCH6
364 }
365 #[doc = "Checks if the value of the field is `PRSCH7`"]
366 #[inline(always)]
367 pub fn is_prsch7(&self) -> bool {
368 *self == PRSSEL_A::PRSCH7
369 }
370 #[doc = "Checks if the value of the field is `PRSCH8`"]
371 #[inline(always)]
372 pub fn is_prsch8(&self) -> bool {
373 *self == PRSSEL_A::PRSCH8
374 }
375 #[doc = "Checks if the value of the field is `PRSCH9`"]
376 #[inline(always)]
377 pub fn is_prsch9(&self) -> bool {
378 *self == PRSSEL_A::PRSCH9
379 }
380 #[doc = "Checks if the value of the field is `PRSCH10`"]
381 #[inline(always)]
382 pub fn is_prsch10(&self) -> bool {
383 *self == PRSSEL_A::PRSCH10
384 }
385 #[doc = "Checks if the value of the field is `PRSCH11`"]
386 #[inline(always)]
387 pub fn is_prsch11(&self) -> bool {
388 *self == PRSSEL_A::PRSCH11
389 }
390}
391#[doc = "Write proxy for field `PRSSEL`"]
392pub struct PRSSEL_W<'a> {
393 w: &'a mut W,
394}
395impl<'a> PRSSEL_W<'a> {
396 #[doc = r"Writes `variant` to the field"]
397 #[inline(always)]
398 pub fn variant(self, variant: PRSSEL_A) -> &'a mut W {
399 unsafe { self.bits(variant.into()) }
400 }
401 #[doc = "PRS ch 0 triggers single channel"]
402 #[inline(always)]
403 pub fn prsch0(self) -> &'a mut W {
404 self.variant(PRSSEL_A::PRSCH0)
405 }
406 #[doc = "PRS ch 1 triggers single channel"]
407 #[inline(always)]
408 pub fn prsch1(self) -> &'a mut W {
409 self.variant(PRSSEL_A::PRSCH1)
410 }
411 #[doc = "PRS ch 2 triggers single channel"]
412 #[inline(always)]
413 pub fn prsch2(self) -> &'a mut W {
414 self.variant(PRSSEL_A::PRSCH2)
415 }
416 #[doc = "PRS ch 3 triggers single channel"]
417 #[inline(always)]
418 pub fn prsch3(self) -> &'a mut W {
419 self.variant(PRSSEL_A::PRSCH3)
420 }
421 #[doc = "PRS ch 4 triggers single channel"]
422 #[inline(always)]
423 pub fn prsch4(self) -> &'a mut W {
424 self.variant(PRSSEL_A::PRSCH4)
425 }
426 #[doc = "PRS ch 5 triggers single channel"]
427 #[inline(always)]
428 pub fn prsch5(self) -> &'a mut W {
429 self.variant(PRSSEL_A::PRSCH5)
430 }
431 #[doc = "PRS ch 6 triggers single channel"]
432 #[inline(always)]
433 pub fn prsch6(self) -> &'a mut W {
434 self.variant(PRSSEL_A::PRSCH6)
435 }
436 #[doc = "PRS ch 7 triggers single channel"]
437 #[inline(always)]
438 pub fn prsch7(self) -> &'a mut W {
439 self.variant(PRSSEL_A::PRSCH7)
440 }
441 #[doc = "PRS ch 8 triggers single channel"]
442 #[inline(always)]
443 pub fn prsch8(self) -> &'a mut W {
444 self.variant(PRSSEL_A::PRSCH8)
445 }
446 #[doc = "PRS ch 9 triggers single channel"]
447 #[inline(always)]
448 pub fn prsch9(self) -> &'a mut W {
449 self.variant(PRSSEL_A::PRSCH9)
450 }
451 #[doc = "PRS ch 10 triggers single channel"]
452 #[inline(always)]
453 pub fn prsch10(self) -> &'a mut W {
454 self.variant(PRSSEL_A::PRSCH10)
455 }
456 #[doc = "PRS ch 11 triggers single channel"]
457 #[inline(always)]
458 pub fn prsch11(self) -> &'a mut W {
459 self.variant(PRSSEL_A::PRSCH11)
460 }
461 #[doc = r"Writes raw bits to the field"]
462 #[inline(always)]
463 pub unsafe fn bits(self, value: u8) -> &'a mut W {
464 self.w.bits = (self.w.bits & !(0x0f << 17)) | (((value as u32) & 0x0f) << 17);
465 self.w
466 }
467}
468#[doc = "Reader of field `CONVSTARTDELAY`"]
469pub type CONVSTARTDELAY_R = crate::R<u8, u8>;
470#[doc = "Write proxy for field `CONVSTARTDELAY`"]
471pub struct CONVSTARTDELAY_W<'a> {
472 w: &'a mut W,
473}
474impl<'a> CONVSTARTDELAY_W<'a> {
475 #[doc = r"Writes raw bits to the field"]
476 #[inline(always)]
477 pub unsafe fn bits(self, value: u8) -> &'a mut W {
478 self.w.bits = (self.w.bits & !(0x1f << 22)) | (((value as u32) & 0x1f) << 22);
479 self.w
480 }
481}
482#[doc = "Reader of field `CONVSTARTDELAYEN`"]
483pub type CONVSTARTDELAYEN_R = crate::R<bool, bool>;
484#[doc = "Write proxy for field `CONVSTARTDELAYEN`"]
485pub struct CONVSTARTDELAYEN_W<'a> {
486 w: &'a mut W,
487}
488impl<'a> CONVSTARTDELAYEN_W<'a> {
489 #[doc = r"Sets the field bit"]
490 #[inline(always)]
491 pub fn set_bit(self) -> &'a mut W {
492 self.bit(true)
493 }
494 #[doc = r"Clears the field bit"]
495 #[inline(always)]
496 pub fn clear_bit(self) -> &'a mut W {
497 self.bit(false)
498 }
499 #[doc = r"Writes raw bits to the field"]
500 #[inline(always)]
501 pub fn bit(self, value: bool) -> &'a mut W {
502 self.w.bits = (self.w.bits & !(0x01 << 27)) | (((value as u32) & 0x01) << 27);
503 self.w
504 }
505}
506#[doc = "REPDELAY Select for SINGLE REP Mode\n\nValue on reset: 0"]
507#[derive(Clone, Copy, Debug, PartialEq)]
508#[repr(u8)]
509pub enum REPDELAY_A {
510 #[doc = "0: No delay"]
511 NODELAY = 0,
512 #[doc = "1: 4 conversion clock cycles"]
513 _4CYCLES = 1,
514 #[doc = "2: 8 conversion clock cycles"]
515 _8CYCLES = 2,
516 #[doc = "3: 16 conversion clock cycles"]
517 _16CYCLES = 3,
518 #[doc = "4: 32 conversion clock cycles"]
519 _32CYCLES = 4,
520 #[doc = "5: 64 conversion clock cycles"]
521 _64CYCLES = 5,
522 #[doc = "6: 128 conversion clock cycles"]
523 _128CYCLES = 6,
524 #[doc = "7: 256 conversion clock cycles"]
525 _256CYCLES = 7,
526}
527impl From<REPDELAY_A> for u8 {
528 #[inline(always)]
529 fn from(variant: REPDELAY_A) -> Self {
530 variant as _
531 }
532}
533#[doc = "Reader of field `REPDELAY`"]
534pub type REPDELAY_R = crate::R<u8, REPDELAY_A>;
535impl REPDELAY_R {
536 #[doc = r"Get enumerated values variant"]
537 #[inline(always)]
538 pub fn variant(&self) -> REPDELAY_A {
539 match self.bits {
540 0 => REPDELAY_A::NODELAY,
541 1 => REPDELAY_A::_4CYCLES,
542 2 => REPDELAY_A::_8CYCLES,
543 3 => REPDELAY_A::_16CYCLES,
544 4 => REPDELAY_A::_32CYCLES,
545 5 => REPDELAY_A::_64CYCLES,
546 6 => REPDELAY_A::_128CYCLES,
547 7 => REPDELAY_A::_256CYCLES,
548 _ => unreachable!(),
549 }
550 }
551 #[doc = "Checks if the value of the field is `NODELAY`"]
552 #[inline(always)]
553 pub fn is_nodelay(&self) -> bool {
554 *self == REPDELAY_A::NODELAY
555 }
556 #[doc = "Checks if the value of the field is `_4CYCLES`"]
557 #[inline(always)]
558 pub fn is_4cycles(&self) -> bool {
559 *self == REPDELAY_A::_4CYCLES
560 }
561 #[doc = "Checks if the value of the field is `_8CYCLES`"]
562 #[inline(always)]
563 pub fn is_8cycles(&self) -> bool {
564 *self == REPDELAY_A::_8CYCLES
565 }
566 #[doc = "Checks if the value of the field is `_16CYCLES`"]
567 #[inline(always)]
568 pub fn is_16cycles(&self) -> bool {
569 *self == REPDELAY_A::_16CYCLES
570 }
571 #[doc = "Checks if the value of the field is `_32CYCLES`"]
572 #[inline(always)]
573 pub fn is_32cycles(&self) -> bool {
574 *self == REPDELAY_A::_32CYCLES
575 }
576 #[doc = "Checks if the value of the field is `_64CYCLES`"]
577 #[inline(always)]
578 pub fn is_64cycles(&self) -> bool {
579 *self == REPDELAY_A::_64CYCLES
580 }
581 #[doc = "Checks if the value of the field is `_128CYCLES`"]
582 #[inline(always)]
583 pub fn is_128cycles(&self) -> bool {
584 *self == REPDELAY_A::_128CYCLES
585 }
586 #[doc = "Checks if the value of the field is `_256CYCLES`"]
587 #[inline(always)]
588 pub fn is_256cycles(&self) -> bool {
589 *self == REPDELAY_A::_256CYCLES
590 }
591}
592#[doc = "Write proxy for field `REPDELAY`"]
593pub struct REPDELAY_W<'a> {
594 w: &'a mut W,
595}
596impl<'a> REPDELAY_W<'a> {
597 #[doc = r"Writes `variant` to the field"]
598 #[inline(always)]
599 pub fn variant(self, variant: REPDELAY_A) -> &'a mut W {
600 {
601 self.bits(variant.into())
602 }
603 }
604 #[doc = "No delay"]
605 #[inline(always)]
606 pub fn nodelay(self) -> &'a mut W {
607 self.variant(REPDELAY_A::NODELAY)
608 }
609 #[doc = "4 conversion clock cycles"]
610 #[inline(always)]
611 pub fn _4cycles(self) -> &'a mut W {
612 self.variant(REPDELAY_A::_4CYCLES)
613 }
614 #[doc = "8 conversion clock cycles"]
615 #[inline(always)]
616 pub fn _8cycles(self) -> &'a mut W {
617 self.variant(REPDELAY_A::_8CYCLES)
618 }
619 #[doc = "16 conversion clock cycles"]
620 #[inline(always)]
621 pub fn _16cycles(self) -> &'a mut W {
622 self.variant(REPDELAY_A::_16CYCLES)
623 }
624 #[doc = "32 conversion clock cycles"]
625 #[inline(always)]
626 pub fn _32cycles(self) -> &'a mut W {
627 self.variant(REPDELAY_A::_32CYCLES)
628 }
629 #[doc = "64 conversion clock cycles"]
630 #[inline(always)]
631 pub fn _64cycles(self) -> &'a mut W {
632 self.variant(REPDELAY_A::_64CYCLES)
633 }
634 #[doc = "128 conversion clock cycles"]
635 #[inline(always)]
636 pub fn _128cycles(self) -> &'a mut W {
637 self.variant(REPDELAY_A::_128CYCLES)
638 }
639 #[doc = "256 conversion clock cycles"]
640 #[inline(always)]
641 pub fn _256cycles(self) -> &'a mut W {
642 self.variant(REPDELAY_A::_256CYCLES)
643 }
644 #[doc = r"Writes raw bits to the field"]
645 #[inline(always)]
646 pub fn bits(self, value: u8) -> &'a mut W {
647 self.w.bits = (self.w.bits & !(0x07 << 29)) | (((value as u32) & 0x07) << 29);
648 self.w
649 }
650}
651impl R {
652 #[doc = "Bits 0:2 - Single Channel Reference Selection"]
653 #[inline(always)]
654 pub fn vrefsel(&self) -> VREFSEL_R {
655 VREFSEL_R::new((self.bits & 0x07) as u8)
656 }
657 #[doc = "Bit 3 - Enable Fixed Scaling on VREF"]
658 #[inline(always)]
659 pub fn vrefattfix(&self) -> VREFATTFIX_R {
660 VREFATTFIX_R::new(((self.bits >> 3) & 0x01) != 0)
661 }
662 #[doc = "Bits 4:7 - Code for VREF Attenuation Factor When VREFSEL is 1, 2 or 5"]
663 #[inline(always)]
664 pub fn vrefatt(&self) -> VREFATT_R {
665 VREFATT_R::new(((self.bits >> 4) & 0x0f) as u8)
666 }
667 #[doc = "Bits 8:11 - Code for VIN Attenuation Factor"]
668 #[inline(always)]
669 pub fn vinatt(&self) -> VINATT_R {
670 VINATT_R::new(((self.bits >> 8) & 0x0f) as u8)
671 }
672 #[doc = "Bits 12:13 - Single Channel DV Level Select"]
673 #[inline(always)]
674 pub fn dvl(&self) -> DVL_R {
675 DVL_R::new(((self.bits >> 12) & 0x03) as u8)
676 }
677 #[doc = "Bit 14 - Single Channel FIFO Overflow Action"]
678 #[inline(always)]
679 pub fn fifoofact(&self) -> FIFOOFACT_R {
680 FIFOOFACT_R::new(((self.bits >> 14) & 0x01) != 0)
681 }
682 #[doc = "Bit 16 - Single Channel PRS Trigger Mode"]
683 #[inline(always)]
684 pub fn prsmode(&self) -> PRSMODE_R {
685 PRSMODE_R::new(((self.bits >> 16) & 0x01) != 0)
686 }
687 #[doc = "Bits 17:20 - Single Channel PRS Trigger Select"]
688 #[inline(always)]
689 pub fn prssel(&self) -> PRSSEL_R {
690 PRSSEL_R::new(((self.bits >> 17) & 0x0f) as u8)
691 }
692 #[doc = "Bits 22:26 - Delay Value for Next Conversion Start If CONVSTARTDELAYEN is Set"]
693 #[inline(always)]
694 pub fn convstartdelay(&self) -> CONVSTARTDELAY_R {
695 CONVSTARTDELAY_R::new(((self.bits >> 22) & 0x1f) as u8)
696 }
697 #[doc = "Bit 27 - Enable Delaying Next Conversion Start"]
698 #[inline(always)]
699 pub fn convstartdelayen(&self) -> CONVSTARTDELAYEN_R {
700 CONVSTARTDELAYEN_R::new(((self.bits >> 27) & 0x01) != 0)
701 }
702 #[doc = "Bits 29:31 - REPDELAY Select for SINGLE REP Mode"]
703 #[inline(always)]
704 pub fn repdelay(&self) -> REPDELAY_R {
705 REPDELAY_R::new(((self.bits >> 29) & 0x07) as u8)
706 }
707}
708impl W {
709 #[doc = "Bits 0:2 - Single Channel Reference Selection"]
710 #[inline(always)]
711 pub fn vrefsel(&mut self) -> VREFSEL_W {
712 VREFSEL_W { w: self }
713 }
714 #[doc = "Bit 3 - Enable Fixed Scaling on VREF"]
715 #[inline(always)]
716 pub fn vrefattfix(&mut self) -> VREFATTFIX_W {
717 VREFATTFIX_W { w: self }
718 }
719 #[doc = "Bits 4:7 - Code for VREF Attenuation Factor When VREFSEL is 1, 2 or 5"]
720 #[inline(always)]
721 pub fn vrefatt(&mut self) -> VREFATT_W {
722 VREFATT_W { w: self }
723 }
724 #[doc = "Bits 8:11 - Code for VIN Attenuation Factor"]
725 #[inline(always)]
726 pub fn vinatt(&mut self) -> VINATT_W {
727 VINATT_W { w: self }
728 }
729 #[doc = "Bits 12:13 - Single Channel DV Level Select"]
730 #[inline(always)]
731 pub fn dvl(&mut self) -> DVL_W {
732 DVL_W { w: self }
733 }
734 #[doc = "Bit 14 - Single Channel FIFO Overflow Action"]
735 #[inline(always)]
736 pub fn fifoofact(&mut self) -> FIFOOFACT_W {
737 FIFOOFACT_W { w: self }
738 }
739 #[doc = "Bit 16 - Single Channel PRS Trigger Mode"]
740 #[inline(always)]
741 pub fn prsmode(&mut self) -> PRSMODE_W {
742 PRSMODE_W { w: self }
743 }
744 #[doc = "Bits 17:20 - Single Channel PRS Trigger Select"]
745 #[inline(always)]
746 pub fn prssel(&mut self) -> PRSSEL_W {
747 PRSSEL_W { w: self }
748 }
749 #[doc = "Bits 22:26 - Delay Value for Next Conversion Start If CONVSTARTDELAYEN is Set"]
750 #[inline(always)]
751 pub fn convstartdelay(&mut self) -> CONVSTARTDELAY_W {
752 CONVSTARTDELAY_W { w: self }
753 }
754 #[doc = "Bit 27 - Enable Delaying Next Conversion Start"]
755 #[inline(always)]
756 pub fn convstartdelayen(&mut self) -> CONVSTARTDELAYEN_W {
757 CONVSTARTDELAYEN_W { w: self }
758 }
759 #[doc = "Bits 29:31 - REPDELAY Select for SINGLE REP Mode"]
760 #[inline(always)]
761 pub fn repdelay(&mut self) -> REPDELAY_W {
762 REPDELAY_W { w: self }
763 }
764}