1#[doc = "Reader of register SCANCTRL"]
2pub type R = crate::R<u32, super::SCANCTRL>;
3#[doc = "Writer for register SCANCTRL"]
4pub type W = crate::W<u32, super::SCANCTRL>;
5#[doc = "Register SCANCTRL `reset()`'s with value 0"]
6impl crate::ResetValue for super::SCANCTRL {
7 type Type = u32;
8 #[inline(always)]
9 fn reset_value() -> Self::Type {
10 0
11 }
12}
13#[doc = "Reader of field `REP`"]
14pub type REP_R = crate::R<bool, bool>;
15#[doc = "Write proxy for field `REP`"]
16pub struct REP_W<'a> {
17 w: &'a mut W,
18}
19impl<'a> REP_W<'a> {
20 #[doc = r"Sets the field bit"]
21 #[inline(always)]
22 pub fn set_bit(self) -> &'a mut W {
23 self.bit(true)
24 }
25 #[doc = r"Clears the field bit"]
26 #[inline(always)]
27 pub fn clear_bit(self) -> &'a mut W {
28 self.bit(false)
29 }
30 #[doc = r"Writes raw bits to the field"]
31 #[inline(always)]
32 pub fn bit(self, value: bool) -> &'a mut W {
33 self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
34 self.w
35 }
36}
37#[doc = "Reader of field `DIFF`"]
38pub type DIFF_R = crate::R<bool, bool>;
39#[doc = "Write proxy for field `DIFF`"]
40pub struct DIFF_W<'a> {
41 w: &'a mut W,
42}
43impl<'a> DIFF_W<'a> {
44 #[doc = r"Sets the field bit"]
45 #[inline(always)]
46 pub fn set_bit(self) -> &'a mut W {
47 self.bit(true)
48 }
49 #[doc = r"Clears the field bit"]
50 #[inline(always)]
51 pub fn clear_bit(self) -> &'a mut W {
52 self.bit(false)
53 }
54 #[doc = r"Writes raw bits to the field"]
55 #[inline(always)]
56 pub fn bit(self, value: bool) -> &'a mut W {
57 self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
58 self.w
59 }
60}
61#[doc = "Reader of field `ADJ`"]
62pub type ADJ_R = crate::R<bool, bool>;
63#[doc = "Write proxy for field `ADJ`"]
64pub struct ADJ_W<'a> {
65 w: &'a mut W,
66}
67impl<'a> ADJ_W<'a> {
68 #[doc = r"Sets the field bit"]
69 #[inline(always)]
70 pub fn set_bit(self) -> &'a mut W {
71 self.bit(true)
72 }
73 #[doc = r"Clears the field bit"]
74 #[inline(always)]
75 pub fn clear_bit(self) -> &'a mut W {
76 self.bit(false)
77 }
78 #[doc = r"Writes raw bits to the field"]
79 #[inline(always)]
80 pub fn bit(self, value: bool) -> &'a mut W {
81 self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
82 self.w
83 }
84}
85#[doc = "Scan Sequence Resolution Select\n\nValue on reset: 0"]
86#[derive(Clone, Copy, Debug, PartialEq)]
87#[repr(u8)]
88pub enum RES_A {
89 #[doc = "0: 12-bit resolution"]
90 _12BIT = 0,
91 #[doc = "1: 8-bit resolution"]
92 _8BIT = 1,
93 #[doc = "2: 6-bit resolution"]
94 _6BIT = 2,
95 #[doc = "3: Oversampling enabled. Oversampling rate is set in OVSRSEL"]
96 OVS = 3,
97}
98impl From<RES_A> for u8 {
99 #[inline(always)]
100 fn from(variant: RES_A) -> Self {
101 variant as _
102 }
103}
104#[doc = "Reader of field `RES`"]
105pub type RES_R = crate::R<u8, RES_A>;
106impl RES_R {
107 #[doc = r"Get enumerated values variant"]
108 #[inline(always)]
109 pub fn variant(&self) -> RES_A {
110 match self.bits {
111 0 => RES_A::_12BIT,
112 1 => RES_A::_8BIT,
113 2 => RES_A::_6BIT,
114 3 => RES_A::OVS,
115 _ => unreachable!(),
116 }
117 }
118 #[doc = "Checks if the value of the field is `_12BIT`"]
119 #[inline(always)]
120 pub fn is_12bit(&self) -> bool {
121 *self == RES_A::_12BIT
122 }
123 #[doc = "Checks if the value of the field is `_8BIT`"]
124 #[inline(always)]
125 pub fn is_8bit(&self) -> bool {
126 *self == RES_A::_8BIT
127 }
128 #[doc = "Checks if the value of the field is `_6BIT`"]
129 #[inline(always)]
130 pub fn is_6bit(&self) -> bool {
131 *self == RES_A::_6BIT
132 }
133 #[doc = "Checks if the value of the field is `OVS`"]
134 #[inline(always)]
135 pub fn is_ovs(&self) -> bool {
136 *self == RES_A::OVS
137 }
138}
139#[doc = "Write proxy for field `RES`"]
140pub struct RES_W<'a> {
141 w: &'a mut W,
142}
143impl<'a> RES_W<'a> {
144 #[doc = r"Writes `variant` to the field"]
145 #[inline(always)]
146 pub fn variant(self, variant: RES_A) -> &'a mut W {
147 {
148 self.bits(variant.into())
149 }
150 }
151 #[doc = "12-bit resolution"]
152 #[inline(always)]
153 pub fn _12bit(self) -> &'a mut W {
154 self.variant(RES_A::_12BIT)
155 }
156 #[doc = "8-bit resolution"]
157 #[inline(always)]
158 pub fn _8bit(self) -> &'a mut W {
159 self.variant(RES_A::_8BIT)
160 }
161 #[doc = "6-bit resolution"]
162 #[inline(always)]
163 pub fn _6bit(self) -> &'a mut W {
164 self.variant(RES_A::_6BIT)
165 }
166 #[doc = "Oversampling enabled. Oversampling rate is set in OVSRSEL"]
167 #[inline(always)]
168 pub fn ovs(self) -> &'a mut W {
169 self.variant(RES_A::OVS)
170 }
171 #[doc = r"Writes raw bits to the field"]
172 #[inline(always)]
173 pub fn bits(self, value: u8) -> &'a mut W {
174 self.w.bits = (self.w.bits & !(0x03 << 3)) | (((value as u32) & 0x03) << 3);
175 self.w
176 }
177}
178#[doc = "Scan Sequence Reference Selection\n\nValue on reset: 0"]
179#[derive(Clone, Copy, Debug, PartialEq)]
180#[repr(u8)]
181pub enum REF_A {
182 #[doc = "0: VFS = 1.25V with internal VBGR reference"]
183 _1V25 = 0,
184 #[doc = "1: VFS = 2.5V with internal VBGR reference"]
185 _2V5 = 1,
186 #[doc = "2: VFS = AVDD with AVDD as reference source"]
187 VDD = 2,
188 #[doc = "3: VFS = 5V with internal VBGR reference"]
189 _5V = 3,
190 #[doc = "4: Single ended external reference"]
191 EXTSINGLE = 4,
192 #[doc = "5: Differential external reference, 2x"]
193 _2XEXTDIFF = 5,
194 #[doc = "6: VFS=2xAVDD with AVDD as the reference source"]
195 _2XVDD = 6,
196 #[doc = "7: Use SCANCTRLX to configure reference"]
197 CONF = 7,
198}
199impl From<REF_A> for u8 {
200 #[inline(always)]
201 fn from(variant: REF_A) -> Self {
202 variant as _
203 }
204}
205#[doc = "Reader of field `REF`"]
206pub type REF_R = crate::R<u8, REF_A>;
207impl REF_R {
208 #[doc = r"Get enumerated values variant"]
209 #[inline(always)]
210 pub fn variant(&self) -> REF_A {
211 match self.bits {
212 0 => REF_A::_1V25,
213 1 => REF_A::_2V5,
214 2 => REF_A::VDD,
215 3 => REF_A::_5V,
216 4 => REF_A::EXTSINGLE,
217 5 => REF_A::_2XEXTDIFF,
218 6 => REF_A::_2XVDD,
219 7 => REF_A::CONF,
220 _ => unreachable!(),
221 }
222 }
223 #[doc = "Checks if the value of the field is `_1V25`"]
224 #[inline(always)]
225 pub fn is_1v25(&self) -> bool {
226 *self == REF_A::_1V25
227 }
228 #[doc = "Checks if the value of the field is `_2V5`"]
229 #[inline(always)]
230 pub fn is_2v5(&self) -> bool {
231 *self == REF_A::_2V5
232 }
233 #[doc = "Checks if the value of the field is `VDD`"]
234 #[inline(always)]
235 pub fn is_vdd(&self) -> bool {
236 *self == REF_A::VDD
237 }
238 #[doc = "Checks if the value of the field is `_5V`"]
239 #[inline(always)]
240 pub fn is_5v(&self) -> bool {
241 *self == REF_A::_5V
242 }
243 #[doc = "Checks if the value of the field is `EXTSINGLE`"]
244 #[inline(always)]
245 pub fn is_extsingle(&self) -> bool {
246 *self == REF_A::EXTSINGLE
247 }
248 #[doc = "Checks if the value of the field is `_2XEXTDIFF`"]
249 #[inline(always)]
250 pub fn is_2xextdiff(&self) -> bool {
251 *self == REF_A::_2XEXTDIFF
252 }
253 #[doc = "Checks if the value of the field is `_2XVDD`"]
254 #[inline(always)]
255 pub fn is_2xvdd(&self) -> bool {
256 *self == REF_A::_2XVDD
257 }
258 #[doc = "Checks if the value of the field is `CONF`"]
259 #[inline(always)]
260 pub fn is_conf(&self) -> bool {
261 *self == REF_A::CONF
262 }
263}
264#[doc = "Write proxy for field `REF`"]
265pub struct REF_W<'a> {
266 w: &'a mut W,
267}
268impl<'a> REF_W<'a> {
269 #[doc = r"Writes `variant` to the field"]
270 #[inline(always)]
271 pub fn variant(self, variant: REF_A) -> &'a mut W {
272 {
273 self.bits(variant.into())
274 }
275 }
276 #[doc = "VFS = 1.25V with internal VBGR reference"]
277 #[inline(always)]
278 pub fn _1v25(self) -> &'a mut W {
279 self.variant(REF_A::_1V25)
280 }
281 #[doc = "VFS = 2.5V with internal VBGR reference"]
282 #[inline(always)]
283 pub fn _2v5(self) -> &'a mut W {
284 self.variant(REF_A::_2V5)
285 }
286 #[doc = "VFS = AVDD with AVDD as reference source"]
287 #[inline(always)]
288 pub fn vdd(self) -> &'a mut W {
289 self.variant(REF_A::VDD)
290 }
291 #[doc = "VFS = 5V with internal VBGR reference"]
292 #[inline(always)]
293 pub fn _5v(self) -> &'a mut W {
294 self.variant(REF_A::_5V)
295 }
296 #[doc = "Single ended external reference"]
297 #[inline(always)]
298 pub fn extsingle(self) -> &'a mut W {
299 self.variant(REF_A::EXTSINGLE)
300 }
301 #[doc = "Differential external reference, 2x"]
302 #[inline(always)]
303 pub fn _2xextdiff(self) -> &'a mut W {
304 self.variant(REF_A::_2XEXTDIFF)
305 }
306 #[doc = "VFS=2xAVDD with AVDD as the reference source"]
307 #[inline(always)]
308 pub fn _2xvdd(self) -> &'a mut W {
309 self.variant(REF_A::_2XVDD)
310 }
311 #[doc = "Use SCANCTRLX to configure reference"]
312 #[inline(always)]
313 pub fn conf(self) -> &'a mut W {
314 self.variant(REF_A::CONF)
315 }
316 #[doc = r"Writes raw bits to the field"]
317 #[inline(always)]
318 pub fn bits(self, value: u8) -> &'a mut W {
319 self.w.bits = (self.w.bits & !(0x07 << 5)) | (((value as u32) & 0x07) << 5);
320 self.w
321 }
322}
323#[doc = "Scan Acquisition Time\n\nValue on reset: 0"]
324#[derive(Clone, Copy, Debug, PartialEq)]
325#[repr(u8)]
326pub enum AT_A {
327 #[doc = "0: 1 conversion clock cycle acquisition time for scan"]
328 _1CYCLE = 0,
329 #[doc = "1: 2 conversion clock cycles acquisition time for scan"]
330 _2CYCLES = 1,
331 #[doc = "2: 3 conversion clock cycles acquisition time for scan"]
332 _3CYCLES = 2,
333 #[doc = "3: 4 conversion clock cycles acquisition time for scan"]
334 _4CYCLES = 3,
335 #[doc = "4: 8 conversion clock cycles acquisition time for scan"]
336 _8CYCLES = 4,
337 #[doc = "5: 16 conversion clock cycles acquisition time for scan"]
338 _16CYCLES = 5,
339 #[doc = "6: 32 conversion clock cycles acquisition time for scan"]
340 _32CYCLES = 6,
341 #[doc = "7: 64 conversion clock cycles acquisition time for scan"]
342 _64CYCLES = 7,
343 #[doc = "8: 128 conversion clock cycles acquisition time for scan"]
344 _128CYCLES = 8,
345 #[doc = "9: 256 conversion clock cycles acquisition time for scan"]
346 _256CYCLES = 9,
347}
348impl From<AT_A> for u8 {
349 #[inline(always)]
350 fn from(variant: AT_A) -> Self {
351 variant as _
352 }
353}
354#[doc = "Reader of field `AT`"]
355pub type AT_R = crate::R<u8, AT_A>;
356impl AT_R {
357 #[doc = r"Get enumerated values variant"]
358 #[inline(always)]
359 pub fn variant(&self) -> crate::Variant<u8, AT_A> {
360 use crate::Variant::*;
361 match self.bits {
362 0 => Val(AT_A::_1CYCLE),
363 1 => Val(AT_A::_2CYCLES),
364 2 => Val(AT_A::_3CYCLES),
365 3 => Val(AT_A::_4CYCLES),
366 4 => Val(AT_A::_8CYCLES),
367 5 => Val(AT_A::_16CYCLES),
368 6 => Val(AT_A::_32CYCLES),
369 7 => Val(AT_A::_64CYCLES),
370 8 => Val(AT_A::_128CYCLES),
371 9 => Val(AT_A::_256CYCLES),
372 i => Res(i),
373 }
374 }
375 #[doc = "Checks if the value of the field is `_1CYCLE`"]
376 #[inline(always)]
377 pub fn is_1cycle(&self) -> bool {
378 *self == AT_A::_1CYCLE
379 }
380 #[doc = "Checks if the value of the field is `_2CYCLES`"]
381 #[inline(always)]
382 pub fn is_2cycles(&self) -> bool {
383 *self == AT_A::_2CYCLES
384 }
385 #[doc = "Checks if the value of the field is `_3CYCLES`"]
386 #[inline(always)]
387 pub fn is_3cycles(&self) -> bool {
388 *self == AT_A::_3CYCLES
389 }
390 #[doc = "Checks if the value of the field is `_4CYCLES`"]
391 #[inline(always)]
392 pub fn is_4cycles(&self) -> bool {
393 *self == AT_A::_4CYCLES
394 }
395 #[doc = "Checks if the value of the field is `_8CYCLES`"]
396 #[inline(always)]
397 pub fn is_8cycles(&self) -> bool {
398 *self == AT_A::_8CYCLES
399 }
400 #[doc = "Checks if the value of the field is `_16CYCLES`"]
401 #[inline(always)]
402 pub fn is_16cycles(&self) -> bool {
403 *self == AT_A::_16CYCLES
404 }
405 #[doc = "Checks if the value of the field is `_32CYCLES`"]
406 #[inline(always)]
407 pub fn is_32cycles(&self) -> bool {
408 *self == AT_A::_32CYCLES
409 }
410 #[doc = "Checks if the value of the field is `_64CYCLES`"]
411 #[inline(always)]
412 pub fn is_64cycles(&self) -> bool {
413 *self == AT_A::_64CYCLES
414 }
415 #[doc = "Checks if the value of the field is `_128CYCLES`"]
416 #[inline(always)]
417 pub fn is_128cycles(&self) -> bool {
418 *self == AT_A::_128CYCLES
419 }
420 #[doc = "Checks if the value of the field is `_256CYCLES`"]
421 #[inline(always)]
422 pub fn is_256cycles(&self) -> bool {
423 *self == AT_A::_256CYCLES
424 }
425}
426#[doc = "Write proxy for field `AT`"]
427pub struct AT_W<'a> {
428 w: &'a mut W,
429}
430impl<'a> AT_W<'a> {
431 #[doc = r"Writes `variant` to the field"]
432 #[inline(always)]
433 pub fn variant(self, variant: AT_A) -> &'a mut W {
434 unsafe { self.bits(variant.into()) }
435 }
436 #[doc = "1 conversion clock cycle acquisition time for scan"]
437 #[inline(always)]
438 pub fn _1cycle(self) -> &'a mut W {
439 self.variant(AT_A::_1CYCLE)
440 }
441 #[doc = "2 conversion clock cycles acquisition time for scan"]
442 #[inline(always)]
443 pub fn _2cycles(self) -> &'a mut W {
444 self.variant(AT_A::_2CYCLES)
445 }
446 #[doc = "3 conversion clock cycles acquisition time for scan"]
447 #[inline(always)]
448 pub fn _3cycles(self) -> &'a mut W {
449 self.variant(AT_A::_3CYCLES)
450 }
451 #[doc = "4 conversion clock cycles acquisition time for scan"]
452 #[inline(always)]
453 pub fn _4cycles(self) -> &'a mut W {
454 self.variant(AT_A::_4CYCLES)
455 }
456 #[doc = "8 conversion clock cycles acquisition time for scan"]
457 #[inline(always)]
458 pub fn _8cycles(self) -> &'a mut W {
459 self.variant(AT_A::_8CYCLES)
460 }
461 #[doc = "16 conversion clock cycles acquisition time for scan"]
462 #[inline(always)]
463 pub fn _16cycles(self) -> &'a mut W {
464 self.variant(AT_A::_16CYCLES)
465 }
466 #[doc = "32 conversion clock cycles acquisition time for scan"]
467 #[inline(always)]
468 pub fn _32cycles(self) -> &'a mut W {
469 self.variant(AT_A::_32CYCLES)
470 }
471 #[doc = "64 conversion clock cycles acquisition time for scan"]
472 #[inline(always)]
473 pub fn _64cycles(self) -> &'a mut W {
474 self.variant(AT_A::_64CYCLES)
475 }
476 #[doc = "128 conversion clock cycles acquisition time for scan"]
477 #[inline(always)]
478 pub fn _128cycles(self) -> &'a mut W {
479 self.variant(AT_A::_128CYCLES)
480 }
481 #[doc = "256 conversion clock cycles acquisition time for scan"]
482 #[inline(always)]
483 pub fn _256cycles(self) -> &'a mut W {
484 self.variant(AT_A::_256CYCLES)
485 }
486 #[doc = r"Writes raw bits to the field"]
487 #[inline(always)]
488 pub unsafe fn bits(self, value: u8) -> &'a mut W {
489 self.w.bits = (self.w.bits & !(0x0f << 24)) | (((value as u32) & 0x0f) << 24);
490 self.w
491 }
492}
493#[doc = "Reader of field `PRSEN`"]
494pub type PRSEN_R = crate::R<bool, bool>;
495#[doc = "Write proxy for field `PRSEN`"]
496pub struct PRSEN_W<'a> {
497 w: &'a mut W,
498}
499impl<'a> PRSEN_W<'a> {
500 #[doc = r"Sets the field bit"]
501 #[inline(always)]
502 pub fn set_bit(self) -> &'a mut W {
503 self.bit(true)
504 }
505 #[doc = r"Clears the field bit"]
506 #[inline(always)]
507 pub fn clear_bit(self) -> &'a mut W {
508 self.bit(false)
509 }
510 #[doc = r"Writes raw bits to the field"]
511 #[inline(always)]
512 pub fn bit(self, value: bool) -> &'a mut W {
513 self.w.bits = (self.w.bits & !(0x01 << 29)) | (((value as u32) & 0x01) << 29);
514 self.w
515 }
516}
517#[doc = "Reader of field `CMPEN`"]
518pub type CMPEN_R = crate::R<bool, bool>;
519#[doc = "Write proxy for field `CMPEN`"]
520pub struct CMPEN_W<'a> {
521 w: &'a mut W,
522}
523impl<'a> CMPEN_W<'a> {
524 #[doc = r"Sets the field bit"]
525 #[inline(always)]
526 pub fn set_bit(self) -> &'a mut W {
527 self.bit(true)
528 }
529 #[doc = r"Clears the field bit"]
530 #[inline(always)]
531 pub fn clear_bit(self) -> &'a mut W {
532 self.bit(false)
533 }
534 #[doc = r"Writes raw bits to the field"]
535 #[inline(always)]
536 pub fn bit(self, value: bool) -> &'a mut W {
537 self.w.bits = (self.w.bits & !(0x01 << 31)) | (((value as u32) & 0x01) << 31);
538 self.w
539 }
540}
541impl R {
542 #[doc = "Bit 0 - Scan Sequence Repetitive Mode"]
543 #[inline(always)]
544 pub fn rep(&self) -> REP_R {
545 REP_R::new((self.bits & 0x01) != 0)
546 }
547 #[doc = "Bit 1 - Scan Sequence Differential Mode"]
548 #[inline(always)]
549 pub fn diff(&self) -> DIFF_R {
550 DIFF_R::new(((self.bits >> 1) & 0x01) != 0)
551 }
552 #[doc = "Bit 2 - Scan Sequence Result Adjustment"]
553 #[inline(always)]
554 pub fn adj(&self) -> ADJ_R {
555 ADJ_R::new(((self.bits >> 2) & 0x01) != 0)
556 }
557 #[doc = "Bits 3:4 - Scan Sequence Resolution Select"]
558 #[inline(always)]
559 pub fn res(&self) -> RES_R {
560 RES_R::new(((self.bits >> 3) & 0x03) as u8)
561 }
562 #[doc = "Bits 5:7 - Scan Sequence Reference Selection"]
563 #[inline(always)]
564 pub fn ref_(&self) -> REF_R {
565 REF_R::new(((self.bits >> 5) & 0x07) as u8)
566 }
567 #[doc = "Bits 24:27 - Scan Acquisition Time"]
568 #[inline(always)]
569 pub fn at(&self) -> AT_R {
570 AT_R::new(((self.bits >> 24) & 0x0f) as u8)
571 }
572 #[doc = "Bit 29 - Scan Sequence PRS Trigger Enable"]
573 #[inline(always)]
574 pub fn prsen(&self) -> PRSEN_R {
575 PRSEN_R::new(((self.bits >> 29) & 0x01) != 0)
576 }
577 #[doc = "Bit 31 - Compare Logic Enable for Scan"]
578 #[inline(always)]
579 pub fn cmpen(&self) -> CMPEN_R {
580 CMPEN_R::new(((self.bits >> 31) & 0x01) != 0)
581 }
582}
583impl W {
584 #[doc = "Bit 0 - Scan Sequence Repetitive Mode"]
585 #[inline(always)]
586 pub fn rep(&mut self) -> REP_W {
587 REP_W { w: self }
588 }
589 #[doc = "Bit 1 - Scan Sequence Differential Mode"]
590 #[inline(always)]
591 pub fn diff(&mut self) -> DIFF_W {
592 DIFF_W { w: self }
593 }
594 #[doc = "Bit 2 - Scan Sequence Result Adjustment"]
595 #[inline(always)]
596 pub fn adj(&mut self) -> ADJ_W {
597 ADJ_W { w: self }
598 }
599 #[doc = "Bits 3:4 - Scan Sequence Resolution Select"]
600 #[inline(always)]
601 pub fn res(&mut self) -> RES_W {
602 RES_W { w: self }
603 }
604 #[doc = "Bits 5:7 - Scan Sequence Reference Selection"]
605 #[inline(always)]
606 pub fn ref_(&mut self) -> REF_W {
607 REF_W { w: self }
608 }
609 #[doc = "Bits 24:27 - Scan Acquisition Time"]
610 #[inline(always)]
611 pub fn at(&mut self) -> AT_W {
612 AT_W { w: self }
613 }
614 #[doc = "Bit 29 - Scan Sequence PRS Trigger Enable"]
615 #[inline(always)]
616 pub fn prsen(&mut self) -> PRSEN_W {
617 PRSEN_W { w: self }
618 }
619 #[doc = "Bit 31 - Compare Logic Enable for Scan"]
620 #[inline(always)]
621 pub fn cmpen(&mut self) -> CMPEN_W {
622 CMPEN_W { w: self }
623 }
624}