efm32pg12_pac/lesense/
ch6_interact.rs

1#[doc = "Reader of register CH6_INTERACT"]
2pub type R = crate::R<u32, super::CH6_INTERACT>;
3#[doc = "Writer for register CH6_INTERACT"]
4pub type W = crate::W<u32, super::CH6_INTERACT>;
5#[doc = "Register CH6_INTERACT `reset()`'s with value 0"]
6impl crate::ResetValue for super::CH6_INTERACT {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "Reader of field `THRES`"]
14pub type THRES_R = crate::R<u16, u16>;
15#[doc = "Write proxy for field `THRES`"]
16pub struct THRES_W<'a> {
17    w: &'a mut W,
18}
19impl<'a> THRES_W<'a> {
20    #[doc = r"Writes raw bits to the field"]
21    #[inline(always)]
22    pub unsafe fn bits(self, value: u16) -> &'a mut W {
23        self.w.bits = (self.w.bits & !0x0fff) | ((value as u32) & 0x0fff);
24        self.w
25    }
26}
27#[doc = "Select Sample Mode\n\nValue on reset: 0"]
28#[derive(Clone, Copy, Debug, PartialEq)]
29#[repr(u8)]
30pub enum SAMPLE_A {
31    #[doc = "0: Counter output will be used in evaluation"]
32    ACMPCOUNT = 0,
33    #[doc = "1: ACMP output will be used in evaluation"]
34    ACMP = 1,
35    #[doc = "2: ADC output will be used in evaluation"]
36    ADC = 2,
37    #[doc = "3: Differential ADC output will be used in evaluation"]
38    ADCDIFF = 3,
39}
40impl From<SAMPLE_A> for u8 {
41    #[inline(always)]
42    fn from(variant: SAMPLE_A) -> Self {
43        variant as _
44    }
45}
46#[doc = "Reader of field `SAMPLE`"]
47pub type SAMPLE_R = crate::R<u8, SAMPLE_A>;
48impl SAMPLE_R {
49    #[doc = r"Get enumerated values variant"]
50    #[inline(always)]
51    pub fn variant(&self) -> SAMPLE_A {
52        match self.bits {
53            0 => SAMPLE_A::ACMPCOUNT,
54            1 => SAMPLE_A::ACMP,
55            2 => SAMPLE_A::ADC,
56            3 => SAMPLE_A::ADCDIFF,
57            _ => unreachable!(),
58        }
59    }
60    #[doc = "Checks if the value of the field is `ACMPCOUNT`"]
61    #[inline(always)]
62    pub fn is_acmpcount(&self) -> bool {
63        *self == SAMPLE_A::ACMPCOUNT
64    }
65    #[doc = "Checks if the value of the field is `ACMP`"]
66    #[inline(always)]
67    pub fn is_acmp(&self) -> bool {
68        *self == SAMPLE_A::ACMP
69    }
70    #[doc = "Checks if the value of the field is `ADC`"]
71    #[inline(always)]
72    pub fn is_adc(&self) -> bool {
73        *self == SAMPLE_A::ADC
74    }
75    #[doc = "Checks if the value of the field is `ADCDIFF`"]
76    #[inline(always)]
77    pub fn is_adcdiff(&self) -> bool {
78        *self == SAMPLE_A::ADCDIFF
79    }
80}
81#[doc = "Write proxy for field `SAMPLE`"]
82pub struct SAMPLE_W<'a> {
83    w: &'a mut W,
84}
85impl<'a> SAMPLE_W<'a> {
86    #[doc = r"Writes `variant` to the field"]
87    #[inline(always)]
88    pub fn variant(self, variant: SAMPLE_A) -> &'a mut W {
89        {
90            self.bits(variant.into())
91        }
92    }
93    #[doc = "Counter output will be used in evaluation"]
94    #[inline(always)]
95    pub fn acmpcount(self) -> &'a mut W {
96        self.variant(SAMPLE_A::ACMPCOUNT)
97    }
98    #[doc = "ACMP output will be used in evaluation"]
99    #[inline(always)]
100    pub fn acmp(self) -> &'a mut W {
101        self.variant(SAMPLE_A::ACMP)
102    }
103    #[doc = "ADC output will be used in evaluation"]
104    #[inline(always)]
105    pub fn adc(self) -> &'a mut W {
106        self.variant(SAMPLE_A::ADC)
107    }
108    #[doc = "Differential ADC output will be used in evaluation"]
109    #[inline(always)]
110    pub fn adcdiff(self) -> &'a mut W {
111        self.variant(SAMPLE_A::ADCDIFF)
112    }
113    #[doc = r"Writes raw bits to the field"]
114    #[inline(always)]
115    pub fn bits(self, value: u8) -> &'a mut W {
116        self.w.bits = (self.w.bits & !(0x03 << 12)) | (((value as u32) & 0x03) << 12);
117        self.w
118    }
119}
120#[doc = "Enable Interrupt Generation\n\nValue on reset: 0"]
121#[derive(Clone, Copy, Debug, PartialEq)]
122#[repr(u8)]
123pub enum SETIF_A {
124    #[doc = "0: No interrupt is generated"]
125    NONE = 0,
126    #[doc = "1: Set interrupt flag if the sensor triggers."]
127    LEVEL = 1,
128    #[doc = "2: Set interrupt flag on positive edge of the sensor state"]
129    POSEDGE = 2,
130    #[doc = "3: Set interrupt flag on negative edge of the sensor state"]
131    NEGEDGE = 3,
132    #[doc = "4: Set interrupt flag on both edges of the sensor state"]
133    BOTHEDGES = 4,
134}
135impl From<SETIF_A> for u8 {
136    #[inline(always)]
137    fn from(variant: SETIF_A) -> Self {
138        variant as _
139    }
140}
141#[doc = "Reader of field `SETIF`"]
142pub type SETIF_R = crate::R<u8, SETIF_A>;
143impl SETIF_R {
144    #[doc = r"Get enumerated values variant"]
145    #[inline(always)]
146    pub fn variant(&self) -> crate::Variant<u8, SETIF_A> {
147        use crate::Variant::*;
148        match self.bits {
149            0 => Val(SETIF_A::NONE),
150            1 => Val(SETIF_A::LEVEL),
151            2 => Val(SETIF_A::POSEDGE),
152            3 => Val(SETIF_A::NEGEDGE),
153            4 => Val(SETIF_A::BOTHEDGES),
154            i => Res(i),
155        }
156    }
157    #[doc = "Checks if the value of the field is `NONE`"]
158    #[inline(always)]
159    pub fn is_none(&self) -> bool {
160        *self == SETIF_A::NONE
161    }
162    #[doc = "Checks if the value of the field is `LEVEL`"]
163    #[inline(always)]
164    pub fn is_level(&self) -> bool {
165        *self == SETIF_A::LEVEL
166    }
167    #[doc = "Checks if the value of the field is `POSEDGE`"]
168    #[inline(always)]
169    pub fn is_posedge(&self) -> bool {
170        *self == SETIF_A::POSEDGE
171    }
172    #[doc = "Checks if the value of the field is `NEGEDGE`"]
173    #[inline(always)]
174    pub fn is_negedge(&self) -> bool {
175        *self == SETIF_A::NEGEDGE
176    }
177    #[doc = "Checks if the value of the field is `BOTHEDGES`"]
178    #[inline(always)]
179    pub fn is_bothedges(&self) -> bool {
180        *self == SETIF_A::BOTHEDGES
181    }
182}
183#[doc = "Write proxy for field `SETIF`"]
184pub struct SETIF_W<'a> {
185    w: &'a mut W,
186}
187impl<'a> SETIF_W<'a> {
188    #[doc = r"Writes `variant` to the field"]
189    #[inline(always)]
190    pub fn variant(self, variant: SETIF_A) -> &'a mut W {
191        unsafe { self.bits(variant.into()) }
192    }
193    #[doc = "No interrupt is generated"]
194    #[inline(always)]
195    pub fn none(self) -> &'a mut W {
196        self.variant(SETIF_A::NONE)
197    }
198    #[doc = "Set interrupt flag if the sensor triggers."]
199    #[inline(always)]
200    pub fn level(self) -> &'a mut W {
201        self.variant(SETIF_A::LEVEL)
202    }
203    #[doc = "Set interrupt flag on positive edge of the sensor state"]
204    #[inline(always)]
205    pub fn posedge(self) -> &'a mut W {
206        self.variant(SETIF_A::POSEDGE)
207    }
208    #[doc = "Set interrupt flag on negative edge of the sensor state"]
209    #[inline(always)]
210    pub fn negedge(self) -> &'a mut W {
211        self.variant(SETIF_A::NEGEDGE)
212    }
213    #[doc = "Set interrupt flag on both edges of the sensor state"]
214    #[inline(always)]
215    pub fn bothedges(self) -> &'a mut W {
216        self.variant(SETIF_A::BOTHEDGES)
217    }
218    #[doc = r"Writes raw bits to the field"]
219    #[inline(always)]
220    pub unsafe fn bits(self, value: u8) -> &'a mut W {
221        self.w.bits = (self.w.bits & !(0x07 << 14)) | (((value as u32) & 0x07) << 14);
222        self.w
223    }
224}
225#[doc = "Set GPIO Mode\n\nValue on reset: 0"]
226#[derive(Clone, Copy, Debug, PartialEq)]
227#[repr(u8)]
228pub enum EXMODE_A {
229    #[doc = "0: Disabled"]
230    DISABLE = 0,
231    #[doc = "1: Push Pull, GPIO is driven high"]
232    HIGH = 1,
233    #[doc = "2: Push Pull, GPIO is driven low"]
234    LOW = 2,
235    #[doc = "3: VDAC output"]
236    DACOUT = 3,
237}
238impl From<EXMODE_A> for u8 {
239    #[inline(always)]
240    fn from(variant: EXMODE_A) -> Self {
241        variant as _
242    }
243}
244#[doc = "Reader of field `EXMODE`"]
245pub type EXMODE_R = crate::R<u8, EXMODE_A>;
246impl EXMODE_R {
247    #[doc = r"Get enumerated values variant"]
248    #[inline(always)]
249    pub fn variant(&self) -> EXMODE_A {
250        match self.bits {
251            0 => EXMODE_A::DISABLE,
252            1 => EXMODE_A::HIGH,
253            2 => EXMODE_A::LOW,
254            3 => EXMODE_A::DACOUT,
255            _ => unreachable!(),
256        }
257    }
258    #[doc = "Checks if the value of the field is `DISABLE`"]
259    #[inline(always)]
260    pub fn is_disable(&self) -> bool {
261        *self == EXMODE_A::DISABLE
262    }
263    #[doc = "Checks if the value of the field is `HIGH`"]
264    #[inline(always)]
265    pub fn is_high(&self) -> bool {
266        *self == EXMODE_A::HIGH
267    }
268    #[doc = "Checks if the value of the field is `LOW`"]
269    #[inline(always)]
270    pub fn is_low(&self) -> bool {
271        *self == EXMODE_A::LOW
272    }
273    #[doc = "Checks if the value of the field is `DACOUT`"]
274    #[inline(always)]
275    pub fn is_dacout(&self) -> bool {
276        *self == EXMODE_A::DACOUT
277    }
278}
279#[doc = "Write proxy for field `EXMODE`"]
280pub struct EXMODE_W<'a> {
281    w: &'a mut W,
282}
283impl<'a> EXMODE_W<'a> {
284    #[doc = r"Writes `variant` to the field"]
285    #[inline(always)]
286    pub fn variant(self, variant: EXMODE_A) -> &'a mut W {
287        {
288            self.bits(variant.into())
289        }
290    }
291    #[doc = "Disabled"]
292    #[inline(always)]
293    pub fn disable(self) -> &'a mut W {
294        self.variant(EXMODE_A::DISABLE)
295    }
296    #[doc = "Push Pull, GPIO is driven high"]
297    #[inline(always)]
298    pub fn high(self) -> &'a mut W {
299        self.variant(EXMODE_A::HIGH)
300    }
301    #[doc = "Push Pull, GPIO is driven low"]
302    #[inline(always)]
303    pub fn low(self) -> &'a mut W {
304        self.variant(EXMODE_A::LOW)
305    }
306    #[doc = "VDAC output"]
307    #[inline(always)]
308    pub fn dacout(self) -> &'a mut W {
309        self.variant(EXMODE_A::DACOUT)
310    }
311    #[doc = r"Writes raw bits to the field"]
312    #[inline(always)]
313    pub fn bits(self, value: u8) -> &'a mut W {
314        self.w.bits = (self.w.bits & !(0x03 << 17)) | (((value as u32) & 0x03) << 17);
315        self.w
316    }
317}
318#[doc = "Reader of field `EXCLK`"]
319pub type EXCLK_R = crate::R<bool, bool>;
320#[doc = "Write proxy for field `EXCLK`"]
321pub struct EXCLK_W<'a> {
322    w: &'a mut W,
323}
324impl<'a> EXCLK_W<'a> {
325    #[doc = r"Sets the field bit"]
326    #[inline(always)]
327    pub fn set_bit(self) -> &'a mut W {
328        self.bit(true)
329    }
330    #[doc = r"Clears the field bit"]
331    #[inline(always)]
332    pub fn clear_bit(self) -> &'a mut W {
333        self.bit(false)
334    }
335    #[doc = r"Writes raw bits to the field"]
336    #[inline(always)]
337    pub fn bit(self, value: bool) -> &'a mut W {
338        self.w.bits = (self.w.bits & !(0x01 << 19)) | (((value as u32) & 0x01) << 19);
339        self.w
340    }
341}
342#[doc = "Reader of field `SAMPLECLK`"]
343pub type SAMPLECLK_R = crate::R<bool, bool>;
344#[doc = "Write proxy for field `SAMPLECLK`"]
345pub struct SAMPLECLK_W<'a> {
346    w: &'a mut W,
347}
348impl<'a> SAMPLECLK_W<'a> {
349    #[doc = r"Sets the field bit"]
350    #[inline(always)]
351    pub fn set_bit(self) -> &'a mut W {
352        self.bit(true)
353    }
354    #[doc = r"Clears the field bit"]
355    #[inline(always)]
356    pub fn clear_bit(self) -> &'a mut W {
357        self.bit(false)
358    }
359    #[doc = r"Writes raw bits to the field"]
360    #[inline(always)]
361    pub fn bit(self, value: bool) -> &'a mut W {
362        self.w.bits = (self.w.bits & !(0x01 << 20)) | (((value as u32) & 0x01) << 20);
363        self.w
364    }
365}
366#[doc = "Reader of field `ALTEX`"]
367pub type ALTEX_R = crate::R<bool, bool>;
368#[doc = "Write proxy for field `ALTEX`"]
369pub struct ALTEX_W<'a> {
370    w: &'a mut W,
371}
372impl<'a> ALTEX_W<'a> {
373    #[doc = r"Sets the field bit"]
374    #[inline(always)]
375    pub fn set_bit(self) -> &'a mut W {
376        self.bit(true)
377    }
378    #[doc = r"Clears the field bit"]
379    #[inline(always)]
380    pub fn clear_bit(self) -> &'a mut W {
381        self.bit(false)
382    }
383    #[doc = r"Writes raw bits to the field"]
384    #[inline(always)]
385    pub fn bit(self, value: bool) -> &'a mut W {
386        self.w.bits = (self.w.bits & !(0x01 << 21)) | (((value as u32) & 0x01) << 21);
387        self.w
388    }
389}
390impl R {
391    #[doc = "Bits 0:11 - ACMP Threshold or VDAC Data"]
392    #[inline(always)]
393    pub fn thres(&self) -> THRES_R {
394        THRES_R::new((self.bits & 0x0fff) as u16)
395    }
396    #[doc = "Bits 12:13 - Select Sample Mode"]
397    #[inline(always)]
398    pub fn sample(&self) -> SAMPLE_R {
399        SAMPLE_R::new(((self.bits >> 12) & 0x03) as u8)
400    }
401    #[doc = "Bits 14:16 - Enable Interrupt Generation"]
402    #[inline(always)]
403    pub fn setif(&self) -> SETIF_R {
404        SETIF_R::new(((self.bits >> 14) & 0x07) as u8)
405    }
406    #[doc = "Bits 17:18 - Set GPIO Mode"]
407    #[inline(always)]
408    pub fn exmode(&self) -> EXMODE_R {
409        EXMODE_R::new(((self.bits >> 17) & 0x03) as u8)
410    }
411    #[doc = "Bit 19 - Select Clock Used for Excitation Timing"]
412    #[inline(always)]
413    pub fn exclk(&self) -> EXCLK_R {
414        EXCLK_R::new(((self.bits >> 19) & 0x01) != 0)
415    }
416    #[doc = "Bit 20 - Select Clock Used for Timing of Sample Delay"]
417    #[inline(always)]
418    pub fn sampleclk(&self) -> SAMPLECLK_R {
419        SAMPLECLK_R::new(((self.bits >> 20) & 0x01) != 0)
420    }
421    #[doc = "Bit 21 - Use Alternative Excite Pin"]
422    #[inline(always)]
423    pub fn altex(&self) -> ALTEX_R {
424        ALTEX_R::new(((self.bits >> 21) & 0x01) != 0)
425    }
426}
427impl W {
428    #[doc = "Bits 0:11 - ACMP Threshold or VDAC Data"]
429    #[inline(always)]
430    pub fn thres(&mut self) -> THRES_W {
431        THRES_W { w: self }
432    }
433    #[doc = "Bits 12:13 - Select Sample Mode"]
434    #[inline(always)]
435    pub fn sample(&mut self) -> SAMPLE_W {
436        SAMPLE_W { w: self }
437    }
438    #[doc = "Bits 14:16 - Enable Interrupt Generation"]
439    #[inline(always)]
440    pub fn setif(&mut self) -> SETIF_W {
441        SETIF_W { w: self }
442    }
443    #[doc = "Bits 17:18 - Set GPIO Mode"]
444    #[inline(always)]
445    pub fn exmode(&mut self) -> EXMODE_W {
446        EXMODE_W { w: self }
447    }
448    #[doc = "Bit 19 - Select Clock Used for Excitation Timing"]
449    #[inline(always)]
450    pub fn exclk(&mut self) -> EXCLK_W {
451        EXCLK_W { w: self }
452    }
453    #[doc = "Bit 20 - Select Clock Used for Timing of Sample Delay"]
454    #[inline(always)]
455    pub fn sampleclk(&mut self) -> SAMPLECLK_W {
456        SAMPLECLK_W { w: self }
457    }
458    #[doc = "Bit 21 - Use Alternative Excite Pin"]
459    #[inline(always)]
460    pub fn altex(&mut self) -> ALTEX_W {
461        ALTEX_W { w: self }
462    }
463}
efm32pg12_pac/lesense/ch6_interact.rs

efm32pg12_pac/lesense/
ch6_interact.rs
