[−][src]Struct efm32pg12_pac::emu::RegisterBlock

#[repr(C)]
pub struct RegisterBlock {
    pub ctrl: CTRL,
    pub status: STATUS,
    pub lock: LOCK,
    pub ram0ctrl: RAM0CTRL,
    pub cmd: CMD,
    pub em4ctrl: EM4CTRL,
    pub templimits: TEMPLIMITS,
    pub temp: TEMP,
    pub if_: IF,
    pub ifs: IFS,
    pub ifc: IFC,
    pub ien: IEN,
    pub pwrlock: PWRLOCK,
    pub pwrcfg: PWRCFG,
    pub pwrctrl: PWRCTRL,
    pub dcdcctrl: DCDCCTRL,
    pub dcdcmiscctrl: DCDCMISCCTRL,
    pub dcdczdetctrl: DCDCZDETCTRL,
    pub dcdcclimctrl: DCDCCLIMCTRL,
    pub dcdclncompctrl: DCDCLNCOMPCTRL,
    pub dcdclnvctrl: DCDCLNVCTRL,
    pub dcdclpvctrl: DCDCLPVCTRL,
    pub dcdclpctrl: DCDCLPCTRL,
    pub dcdclnfreqctrl: DCDCLNFREQCTRL,
    pub dcdcsync: DCDCSYNC,
    pub vmonavddctrl: VMONAVDDCTRL,
    pub vmonaltavddctrl: VMONALTAVDDCTRL,
    pub vmondvddctrl: VMONDVDDCTRL,
    pub vmonio0ctrl: VMONIO0CTRL,
    pub ram1ctrl: RAM1CTRL,
    pub ram2ctrl: RAM2CTRL,
    pub dcdclpem01cfg: DCDCLPEM01CFG,
    pub em23pernoretaincmd: EM23PERNORETAINCMD,
    pub em23pernoretainstatus: EM23PERNORETAINSTATUS,
    pub em23pernoretainctrl: EM23PERNORETAINCTRL,
    // some fields omitted
}

Register block

Fields

ctrl: CTRL

0x00 - Control Register

status: STATUS

0x04 - Status Register

lock: LOCK

0x08 - Configuration Lock Register

ram0ctrl: RAM0CTRL

0x0c - Memory Control Register

cmd: CMD

0x10 - Command Register

em4ctrl: EM4CTRL

0x18 - EM4 Control Register

templimits: TEMPLIMITS

0x1c - Temperature Limits for Interrupt Generation

temp: TEMP

0x20 - Value of Last Temperature Measurement

if_: IF

0x24 - Interrupt Flag Register

ifs: IFS

0x28 - Interrupt Flag Set Register

ifc: IFC

0x2c - Interrupt Flag Clear Register

ien: IEN

0x30 - Interrupt Enable Register

pwrlock: PWRLOCK

0x34 - Regulator and Supply Lock Register

pwrcfg: PWRCFG

0x38 - Power Configuration Register

pwrctrl: PWRCTRL

0x3c - Power Control Register

dcdcctrl: DCDCCTRL

0x40 - DCDC Control

dcdcmiscctrl: DCDCMISCCTRL

0x4c - DCDC Miscellaneous Control Register

dcdczdetctrl: DCDCZDETCTRL

0x50 - DCDC Power Train NFET Zero Current Detector Control Register

dcdcclimctrl: DCDCCLIMCTRL

0x54 - DCDC Power Train PFET Current Limiter Control Register

dcdclncompctrl: DCDCLNCOMPCTRL

0x58 - DCDC Low Noise Compensator Control Register

dcdclnvctrl: DCDCLNVCTRL

0x5c - DCDC Low Noise Voltage Register

dcdclpvctrl: DCDCLPVCTRL

0x64 - DCDC Low Power Voltage Register

dcdclpctrl: DCDCLPCTRL

0x6c - DCDC Low Power Control Register

dcdclnfreqctrl: DCDCLNFREQCTRL

0x70 - DCDC Low Noise Controller Frequency Control

dcdcsync: DCDCSYNC

0x78 - DCDC Read Status Register

vmonavddctrl: VMONAVDDCTRL

0x90 - VMON AVDD Channel Control

vmonaltavddctrl: VMONALTAVDDCTRL

0x94 - Alternate VMON AVDD Channel Control

vmondvddctrl: VMONDVDDCTRL

0x98 - VMON DVDD Channel Control

vmonio0ctrl: VMONIO0CTRL

0x9c - VMON IOVDD0 Channel Control

ram1ctrl: RAM1CTRL

0xb4 - Memory Control Register

ram2ctrl: RAM2CTRL

0xb8 - Memory Control Register

dcdclpem01cfg: DCDCLPEM01CFG

0xec - Configuration Bits for Low Power Mode to Be Applied During EM01, This Field is Only Relevant If LP Mode is Used in EM01

em23pernoretaincmd: EM23PERNORETAINCMD

0x100 - Clears Corresponding Bits in EM23PERNORETAINSTATUS Unlocking Access to Peripheral

em23pernoretainstatus: EM23PERNORETAINSTATUS

0x104 - Status Indicating If Peripherals Were Powered Down in EM23, Subsequently Locking Access to It

em23pernoretainctrl: EM23PERNORETAINCTRL

0x108 - When Set Corresponding Peripherals May Get Powered Down in EM23

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