efm32lg990_pac/lcd/
syncbusy.rs1#[doc = "Register `SYNCBUSY` reader"]
2pub struct R(crate::R<SYNCBUSY_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<SYNCBUSY_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<SYNCBUSY_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<SYNCBUSY_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Field `CTRL` reader - CTRL Register Busy"]
17pub type CTRL_R = crate::BitReader<bool>;
18#[doc = "Field `BACTRL` reader - BACTRL Register Busy"]
19pub type BACTRL_R = crate::BitReader<bool>;
20#[doc = "Field `AREGA` reader - AREGA Register Busy"]
21pub type AREGA_R = crate::BitReader<bool>;
22#[doc = "Field `AREGB` reader - AREGB Register Busy"]
23pub type AREGB_R = crate::BitReader<bool>;
24#[doc = "Field `SEGD0L` reader - SEGD0L Register Busy"]
25pub type SEGD0L_R = crate::BitReader<bool>;
26#[doc = "Field `SEGD1L` reader - SEGD1L Register Busy"]
27pub type SEGD1L_R = crate::BitReader<bool>;
28#[doc = "Field `SEGD2L` reader - SEGD2L Register Busy"]
29pub type SEGD2L_R = crate::BitReader<bool>;
30#[doc = "Field `SEGD3L` reader - SEGD3L Register Busy"]
31pub type SEGD3L_R = crate::BitReader<bool>;
32#[doc = "Field `SEGD0H` reader - SEGD0H Register Busy"]
33pub type SEGD0H_R = crate::BitReader<bool>;
34#[doc = "Field `SEGD1H` reader - SEGD1H Register Busy"]
35pub type SEGD1H_R = crate::BitReader<bool>;
36#[doc = "Field `SEGD2H` reader - SEGD2H Register Busy"]
37pub type SEGD2H_R = crate::BitReader<bool>;
38#[doc = "Field `SEGD3H` reader - SEGD3H Register Busy"]
39pub type SEGD3H_R = crate::BitReader<bool>;
40#[doc = "Field `SEGD4H` reader - SEGD4H Register Busy"]
41pub type SEGD4H_R = crate::BitReader<bool>;
42#[doc = "Field `SEGD5H` reader - SEGD5H Register Busy"]
43pub type SEGD5H_R = crate::BitReader<bool>;
44#[doc = "Field `SEGD6H` reader - SEGD6H Register Busy"]
45pub type SEGD6H_R = crate::BitReader<bool>;
46#[doc = "Field `SEGD7H` reader - SEGD7H Register Busy"]
47pub type SEGD7H_R = crate::BitReader<bool>;
48#[doc = "Field `SEGD4L` reader - SEGD4L Register Busy"]
49pub type SEGD4L_R = crate::BitReader<bool>;
50#[doc = "Field `SEGD5L` reader - SEGD5L Register Busy"]
51pub type SEGD5L_R = crate::BitReader<bool>;
52#[doc = "Field `SEGD6L` reader - SEGD6L Register Busy"]
53pub type SEGD6L_R = crate::BitReader<bool>;
54#[doc = "Field `SEGD7L` reader - SEGD7L Register Busy"]
55pub type SEGD7L_R = crate::BitReader<bool>;
56impl R {
57 #[doc = "Bit 0 - CTRL Register Busy"]
58 #[inline(always)]
59 pub fn ctrl(&self) -> CTRL_R {
60 CTRL_R::new((self.bits & 1) != 0)
61 }
62 #[doc = "Bit 1 - BACTRL Register Busy"]
63 #[inline(always)]
64 pub fn bactrl(&self) -> BACTRL_R {
65 BACTRL_R::new(((self.bits >> 1) & 1) != 0)
66 }
67 #[doc = "Bit 2 - AREGA Register Busy"]
68 #[inline(always)]
69 pub fn arega(&self) -> AREGA_R {
70 AREGA_R::new(((self.bits >> 2) & 1) != 0)
71 }
72 #[doc = "Bit 3 - AREGB Register Busy"]
73 #[inline(always)]
74 pub fn aregb(&self) -> AREGB_R {
75 AREGB_R::new(((self.bits >> 3) & 1) != 0)
76 }
77 #[doc = "Bit 4 - SEGD0L Register Busy"]
78 #[inline(always)]
79 pub fn segd0l(&self) -> SEGD0L_R {
80 SEGD0L_R::new(((self.bits >> 4) & 1) != 0)
81 }
82 #[doc = "Bit 5 - SEGD1L Register Busy"]
83 #[inline(always)]
84 pub fn segd1l(&self) -> SEGD1L_R {
85 SEGD1L_R::new(((self.bits >> 5) & 1) != 0)
86 }
87 #[doc = "Bit 6 - SEGD2L Register Busy"]
88 #[inline(always)]
89 pub fn segd2l(&self) -> SEGD2L_R {
90 SEGD2L_R::new(((self.bits >> 6) & 1) != 0)
91 }
92 #[doc = "Bit 7 - SEGD3L Register Busy"]
93 #[inline(always)]
94 pub fn segd3l(&self) -> SEGD3L_R {
95 SEGD3L_R::new(((self.bits >> 7) & 1) != 0)
96 }
97 #[doc = "Bit 8 - SEGD0H Register Busy"]
98 #[inline(always)]
99 pub fn segd0h(&self) -> SEGD0H_R {
100 SEGD0H_R::new(((self.bits >> 8) & 1) != 0)
101 }
102 #[doc = "Bit 9 - SEGD1H Register Busy"]
103 #[inline(always)]
104 pub fn segd1h(&self) -> SEGD1H_R {
105 SEGD1H_R::new(((self.bits >> 9) & 1) != 0)
106 }
107 #[doc = "Bit 10 - SEGD2H Register Busy"]
108 #[inline(always)]
109 pub fn segd2h(&self) -> SEGD2H_R {
110 SEGD2H_R::new(((self.bits >> 10) & 1) != 0)
111 }
112 #[doc = "Bit 11 - SEGD3H Register Busy"]
113 #[inline(always)]
114 pub fn segd3h(&self) -> SEGD3H_R {
115 SEGD3H_R::new(((self.bits >> 11) & 1) != 0)
116 }
117 #[doc = "Bit 12 - SEGD4H Register Busy"]
118 #[inline(always)]
119 pub fn segd4h(&self) -> SEGD4H_R {
120 SEGD4H_R::new(((self.bits >> 12) & 1) != 0)
121 }
122 #[doc = "Bit 13 - SEGD5H Register Busy"]
123 #[inline(always)]
124 pub fn segd5h(&self) -> SEGD5H_R {
125 SEGD5H_R::new(((self.bits >> 13) & 1) != 0)
126 }
127 #[doc = "Bit 14 - SEGD6H Register Busy"]
128 #[inline(always)]
129 pub fn segd6h(&self) -> SEGD6H_R {
130 SEGD6H_R::new(((self.bits >> 14) & 1) != 0)
131 }
132 #[doc = "Bit 15 - SEGD7H Register Busy"]
133 #[inline(always)]
134 pub fn segd7h(&self) -> SEGD7H_R {
135 SEGD7H_R::new(((self.bits >> 15) & 1) != 0)
136 }
137 #[doc = "Bit 16 - SEGD4L Register Busy"]
138 #[inline(always)]
139 pub fn segd4l(&self) -> SEGD4L_R {
140 SEGD4L_R::new(((self.bits >> 16) & 1) != 0)
141 }
142 #[doc = "Bit 17 - SEGD5L Register Busy"]
143 #[inline(always)]
144 pub fn segd5l(&self) -> SEGD5L_R {
145 SEGD5L_R::new(((self.bits >> 17) & 1) != 0)
146 }
147 #[doc = "Bit 18 - SEGD6L Register Busy"]
148 #[inline(always)]
149 pub fn segd6l(&self) -> SEGD6L_R {
150 SEGD6L_R::new(((self.bits >> 18) & 1) != 0)
151 }
152 #[doc = "Bit 19 - SEGD7L Register Busy"]
153 #[inline(always)]
154 pub fn segd7l(&self) -> SEGD7L_R {
155 SEGD7L_R::new(((self.bits >> 19) & 1) != 0)
156 }
157}
158#[doc = "Synchronization Busy Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syncbusy](index.html) module"]
159pub struct SYNCBUSY_SPEC;
160impl crate::RegisterSpec for SYNCBUSY_SPEC {
161 type Ux = u32;
162}
163#[doc = "`read()` method returns [syncbusy::R](R) reader structure"]
164impl crate::Readable for SYNCBUSY_SPEC {
165 type Reader = R;
166}
167#[doc = "`reset()` method sets SYNCBUSY to value 0"]
168impl crate::Resettable for SYNCBUSY_SPEC {
169 #[inline(always)]
170 fn reset_value() -> Self::Ux {
171 0
172 }
173}