efm32lg395_pac/cmu/
ifs.rs

1#[doc = "Register `IFS` writer"]
2pub struct W(crate::W<IFS_SPEC>);
3impl core::ops::Deref for W {
4    type Target = crate::W<IFS_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl core::ops::DerefMut for W {
11    #[inline(always)]
12    fn deref_mut(&mut self) -> &mut Self::Target {
13        &mut self.0
14    }
15}
16impl From<crate::W<IFS_SPEC>> for W {
17    #[inline(always)]
18    fn from(writer: crate::W<IFS_SPEC>) -> Self {
19        W(writer)
20    }
21}
22#[doc = "Field `HFRCORDY` writer - HFRCO Ready Interrupt Flag Set"]
23pub type HFRCORDY_W<'a> = crate::BitWriter<'a, u32, IFS_SPEC, bool, 0>;
24#[doc = "Field `HFXORDY` writer - HFXO Ready Interrupt Flag Set"]
25pub type HFXORDY_W<'a> = crate::BitWriter<'a, u32, IFS_SPEC, bool, 1>;
26#[doc = "Field `LFRCORDY` writer - LFRCO Ready Interrupt Flag Set"]
27pub type LFRCORDY_W<'a> = crate::BitWriter<'a, u32, IFS_SPEC, bool, 2>;
28#[doc = "Field `LFXORDY` writer - LFXO Ready Interrupt Flag Set"]
29pub type LFXORDY_W<'a> = crate::BitWriter<'a, u32, IFS_SPEC, bool, 3>;
30#[doc = "Field `AUXHFRCORDY` writer - AUXHFRCO Ready Interrupt Flag Set"]
31pub type AUXHFRCORDY_W<'a> = crate::BitWriter<'a, u32, IFS_SPEC, bool, 4>;
32#[doc = "Field `CALRDY` writer - Calibration Ready Interrupt Flag Set"]
33pub type CALRDY_W<'a> = crate::BitWriter<'a, u32, IFS_SPEC, bool, 5>;
34#[doc = "Field `CALOF` writer - Calibration Overflow Interrupt Flag Set"]
35pub type CALOF_W<'a> = crate::BitWriter<'a, u32, IFS_SPEC, bool, 6>;
36#[doc = "Field `USBCHFCLKSEL` writer - USBC HFCLK Selected Interrupt Flag Set"]
37pub type USBCHFCLKSEL_W<'a> = crate::BitWriter<'a, u32, IFS_SPEC, bool, 7>;
38impl W {
39    #[doc = "Bit 0 - HFRCO Ready Interrupt Flag Set"]
40    #[inline(always)]
41    pub fn hfrcordy(&mut self) -> HFRCORDY_W {
42        HFRCORDY_W::new(self)
43    }
44    #[doc = "Bit 1 - HFXO Ready Interrupt Flag Set"]
45    #[inline(always)]
46    pub fn hfxordy(&mut self) -> HFXORDY_W {
47        HFXORDY_W::new(self)
48    }
49    #[doc = "Bit 2 - LFRCO Ready Interrupt Flag Set"]
50    #[inline(always)]
51    pub fn lfrcordy(&mut self) -> LFRCORDY_W {
52        LFRCORDY_W::new(self)
53    }
54    #[doc = "Bit 3 - LFXO Ready Interrupt Flag Set"]
55    #[inline(always)]
56    pub fn lfxordy(&mut self) -> LFXORDY_W {
57        LFXORDY_W::new(self)
58    }
59    #[doc = "Bit 4 - AUXHFRCO Ready Interrupt Flag Set"]
60    #[inline(always)]
61    pub fn auxhfrcordy(&mut self) -> AUXHFRCORDY_W {
62        AUXHFRCORDY_W::new(self)
63    }
64    #[doc = "Bit 5 - Calibration Ready Interrupt Flag Set"]
65    #[inline(always)]
66    pub fn calrdy(&mut self) -> CALRDY_W {
67        CALRDY_W::new(self)
68    }
69    #[doc = "Bit 6 - Calibration Overflow Interrupt Flag Set"]
70    #[inline(always)]
71    pub fn calof(&mut self) -> CALOF_W {
72        CALOF_W::new(self)
73    }
74    #[doc = "Bit 7 - USBC HFCLK Selected Interrupt Flag Set"]
75    #[inline(always)]
76    pub fn usbchfclksel(&mut self) -> USBCHFCLKSEL_W {
77        USBCHFCLKSEL_W::new(self)
78    }
79    #[doc = "Writes raw bits to the register."]
80    #[inline(always)]
81    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
82        self.0.bits(bits);
83        self
84    }
85}
86#[doc = "Interrupt Flag Set Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ifs](index.html) module"]
87pub struct IFS_SPEC;
88impl crate::RegisterSpec for IFS_SPEC {
89    type Ux = u32;
90}
91#[doc = "`write(|w| ..)` method takes [ifs::W](W) writer structure"]
92impl crate::Writable for IFS_SPEC {
93    type Writer = W;
94}
95#[doc = "`reset()` method sets IFS to value 0"]
96impl crate::Resettable for IFS_SPEC {
97    #[inline(always)]
98    fn reset_value() -> Self::Ux {
99        0
100    }
101}
efm32lg395_pac/cmu/ifs.rs

efm32lg395_pac/cmu/
ifs.rs
