Module efm32lg390_pac::dac0::ch0ctrl

source · [−]
Expand description

Channel 0 Control Register

Structs

CH0CTRL_SPEC

Channel 0 Control Register

R

Register CH0CTRL reader

W

Register CH0CTRL writer

Enums

PRSSEL_A

Channel 0 PRS Trigger Select

Type Definitions

EN_R

Field EN reader - Channel 0 Enable

EN_W

Field EN writer - Channel 0 Enable

PRSEN_R

Field PRSEN reader - Channel 0 PRS Trigger Enable

PRSEN_W

Field PRSEN writer - Channel 0 PRS Trigger Enable

PRSSEL_R

Field PRSSEL reader - Channel 0 PRS Trigger Select

PRSSEL_W

Field PRSSEL writer - Channel 0 PRS Trigger Select

REFREN_R

Field REFREN reader - Channel 0 Automatic Refresh Enable

REFREN_W

Field REFREN writer - Channel 0 Automatic Refresh Enable