efm32lg230_pac/etm/
etmcr.rs1#[doc = "Register `ETMCR` reader"]
2pub struct R(crate::R<ETMCR_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<ETMCR_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<ETMCR_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<ETMCR_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `ETMCR` writer"]
17pub struct W(crate::W<ETMCR_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<ETMCR_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<ETMCR_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<ETMCR_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `POWERDWN` reader - ETM Control in low power mode"]
38pub type POWERDWN_R = crate::BitReader<bool>;
39#[doc = "Field `POWERDWN` writer - ETM Control in low power mode"]
40pub type POWERDWN_W<'a> = crate::BitWriter<'a, u32, ETMCR_SPEC, bool, 0>;
41#[doc = "Field `PORTSIZE` reader - ETM Port Size"]
42pub type PORTSIZE_R = crate::FieldReader<u8, u8>;
43#[doc = "Field `PORTSIZE` writer - ETM Port Size"]
44pub type PORTSIZE_W<'a> = crate::FieldWriter<'a, u32, ETMCR_SPEC, u8, u8, 3, 4>;
45#[doc = "Field `STALL` reader - Stall Processor"]
46pub type STALL_R = crate::BitReader<bool>;
47#[doc = "Field `STALL` writer - Stall Processor"]
48pub type STALL_W<'a> = crate::BitWriter<'a, u32, ETMCR_SPEC, bool, 7>;
49#[doc = "Field `BRANCHOUTPUT` reader - Branch Output"]
50pub type BRANCHOUTPUT_R = crate::BitReader<bool>;
51#[doc = "Field `BRANCHOUTPUT` writer - Branch Output"]
52pub type BRANCHOUTPUT_W<'a> = crate::BitWriter<'a, u32, ETMCR_SPEC, bool, 8>;
53#[doc = "Field `DBGREQCTRL` reader - Debug Request Control"]
54pub type DBGREQCTRL_R = crate::BitReader<bool>;
55#[doc = "Field `DBGREQCTRL` writer - Debug Request Control"]
56pub type DBGREQCTRL_W<'a> = crate::BitWriter<'a, u32, ETMCR_SPEC, bool, 9>;
57#[doc = "Field `ETMPROG` reader - ETM Programming"]
58pub type ETMPROG_R = crate::BitReader<bool>;
59#[doc = "Field `ETMPROG` writer - ETM Programming"]
60pub type ETMPROG_W<'a> = crate::BitWriter<'a, u32, ETMCR_SPEC, bool, 10>;
61#[doc = "Field `ETMPORTSEL` reader - ETM Port Selection"]
62pub type ETMPORTSEL_R = crate::BitReader<bool>;
63#[doc = "Field `ETMPORTSEL` writer - ETM Port Selection"]
64pub type ETMPORTSEL_W<'a> = crate::BitWriter<'a, u32, ETMCR_SPEC, bool, 11>;
65#[doc = "Field `PORTMODE2` reader - Port Mode\\[2\\]"]
66pub type PORTMODE2_R = crate::BitReader<bool>;
67#[doc = "Field `PORTMODE2` writer - Port Mode\\[2\\]"]
68pub type PORTMODE2_W<'a> = crate::BitWriter<'a, u32, ETMCR_SPEC, bool, 13>;
69#[doc = "Field `PORTMODE` reader - Port Mode Control"]
70pub type PORTMODE_R = crate::FieldReader<u8, u8>;
71#[doc = "Field `PORTMODE` writer - Port Mode Control"]
72pub type PORTMODE_W<'a> = crate::FieldWriter<'a, u32, ETMCR_SPEC, u8, u8, 2, 16>;
73#[doc = "Field `EPORTSIZE` reader - Port Size\\[3\\]"]
74pub type EPORTSIZE_R = crate::FieldReader<u8, u8>;
75#[doc = "Field `EPORTSIZE` writer - Port Size\\[3\\]"]
76pub type EPORTSIZE_W<'a> = crate::FieldWriter<'a, u32, ETMCR_SPEC, u8, u8, 2, 21>;
77#[doc = "Field `TSTAMPEN` reader - Time Stamp Enable"]
78pub type TSTAMPEN_R = crate::BitReader<bool>;
79#[doc = "Field `TSTAMPEN` writer - Time Stamp Enable"]
80pub type TSTAMPEN_W<'a> = crate::BitWriter<'a, u32, ETMCR_SPEC, bool, 28>;
81impl R {
82 #[doc = "Bit 0 - ETM Control in low power mode"]
83 #[inline(always)]
84 pub fn powerdwn(&self) -> POWERDWN_R {
85 POWERDWN_R::new((self.bits & 1) != 0)
86 }
87 #[doc = "Bits 4:6 - ETM Port Size"]
88 #[inline(always)]
89 pub fn portsize(&self) -> PORTSIZE_R {
90 PORTSIZE_R::new(((self.bits >> 4) & 7) as u8)
91 }
92 #[doc = "Bit 7 - Stall Processor"]
93 #[inline(always)]
94 pub fn stall(&self) -> STALL_R {
95 STALL_R::new(((self.bits >> 7) & 1) != 0)
96 }
97 #[doc = "Bit 8 - Branch Output"]
98 #[inline(always)]
99 pub fn branchoutput(&self) -> BRANCHOUTPUT_R {
100 BRANCHOUTPUT_R::new(((self.bits >> 8) & 1) != 0)
101 }
102 #[doc = "Bit 9 - Debug Request Control"]
103 #[inline(always)]
104 pub fn dbgreqctrl(&self) -> DBGREQCTRL_R {
105 DBGREQCTRL_R::new(((self.bits >> 9) & 1) != 0)
106 }
107 #[doc = "Bit 10 - ETM Programming"]
108 #[inline(always)]
109 pub fn etmprog(&self) -> ETMPROG_R {
110 ETMPROG_R::new(((self.bits >> 10) & 1) != 0)
111 }
112 #[doc = "Bit 11 - ETM Port Selection"]
113 #[inline(always)]
114 pub fn etmportsel(&self) -> ETMPORTSEL_R {
115 ETMPORTSEL_R::new(((self.bits >> 11) & 1) != 0)
116 }
117 #[doc = "Bit 13 - Port Mode\\[2\\]"]
118 #[inline(always)]
119 pub fn portmode2(&self) -> PORTMODE2_R {
120 PORTMODE2_R::new(((self.bits >> 13) & 1) != 0)
121 }
122 #[doc = "Bits 16:17 - Port Mode Control"]
123 #[inline(always)]
124 pub fn portmode(&self) -> PORTMODE_R {
125 PORTMODE_R::new(((self.bits >> 16) & 3) as u8)
126 }
127 #[doc = "Bits 21:22 - Port Size\\[3\\]"]
128 #[inline(always)]
129 pub fn eportsize(&self) -> EPORTSIZE_R {
130 EPORTSIZE_R::new(((self.bits >> 21) & 3) as u8)
131 }
132 #[doc = "Bit 28 - Time Stamp Enable"]
133 #[inline(always)]
134 pub fn tstampen(&self) -> TSTAMPEN_R {
135 TSTAMPEN_R::new(((self.bits >> 28) & 1) != 0)
136 }
137}
138impl W {
139 #[doc = "Bit 0 - ETM Control in low power mode"]
140 #[inline(always)]
141 pub fn powerdwn(&mut self) -> POWERDWN_W {
142 POWERDWN_W::new(self)
143 }
144 #[doc = "Bits 4:6 - ETM Port Size"]
145 #[inline(always)]
146 pub fn portsize(&mut self) -> PORTSIZE_W {
147 PORTSIZE_W::new(self)
148 }
149 #[doc = "Bit 7 - Stall Processor"]
150 #[inline(always)]
151 pub fn stall(&mut self) -> STALL_W {
152 STALL_W::new(self)
153 }
154 #[doc = "Bit 8 - Branch Output"]
155 #[inline(always)]
156 pub fn branchoutput(&mut self) -> BRANCHOUTPUT_W {
157 BRANCHOUTPUT_W::new(self)
158 }
159 #[doc = "Bit 9 - Debug Request Control"]
160 #[inline(always)]
161 pub fn dbgreqctrl(&mut self) -> DBGREQCTRL_W {
162 DBGREQCTRL_W::new(self)
163 }
164 #[doc = "Bit 10 - ETM Programming"]
165 #[inline(always)]
166 pub fn etmprog(&mut self) -> ETMPROG_W {
167 ETMPROG_W::new(self)
168 }
169 #[doc = "Bit 11 - ETM Port Selection"]
170 #[inline(always)]
171 pub fn etmportsel(&mut self) -> ETMPORTSEL_W {
172 ETMPORTSEL_W::new(self)
173 }
174 #[doc = "Bit 13 - Port Mode\\[2\\]"]
175 #[inline(always)]
176 pub fn portmode2(&mut self) -> PORTMODE2_W {
177 PORTMODE2_W::new(self)
178 }
179 #[doc = "Bits 16:17 - Port Mode Control"]
180 #[inline(always)]
181 pub fn portmode(&mut self) -> PORTMODE_W {
182 PORTMODE_W::new(self)
183 }
184 #[doc = "Bits 21:22 - Port Size\\[3\\]"]
185 #[inline(always)]
186 pub fn eportsize(&mut self) -> EPORTSIZE_W {
187 EPORTSIZE_W::new(self)
188 }
189 #[doc = "Bit 28 - Time Stamp Enable"]
190 #[inline(always)]
191 pub fn tstampen(&mut self) -> TSTAMPEN_W {
192 TSTAMPEN_W::new(self)
193 }
194 #[doc = "Writes raw bits to the register."]
195 #[inline(always)]
196 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
197 self.0.bits(bits);
198 self
199 }
200}
201#[doc = "Main Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [etmcr](index.html) module"]
202pub struct ETMCR_SPEC;
203impl crate::RegisterSpec for ETMCR_SPEC {
204 type Ux = u32;
205}
206#[doc = "`read()` method returns [etmcr::R](R) reader structure"]
207impl crate::Readable for ETMCR_SPEC {
208 type Reader = R;
209}
210#[doc = "`write(|w| ..)` method takes [etmcr::W](W) writer structure"]
211impl crate::Writable for ETMCR_SPEC {
212 type Writer = W;
213}
214#[doc = "`reset()` method sets ETMCR to value 0x0411"]
215impl crate::Resettable for ETMCR_SPEC {
216 #[inline(always)]
217 fn reset_value() -> Self::Ux {
218 0x0411
219 }
220}