efm32lg_pac/efm32lg230/usart2/
cmd.rs

1#[doc = "Register `CMD` writer"]
2pub struct W(crate::W<CMD_SPEC>);
3impl core::ops::Deref for W {
4    type Target = crate::W<CMD_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl core::ops::DerefMut for W {
11    #[inline(always)]
12    fn deref_mut(&mut self) -> &mut Self::Target {
13        &mut self.0
14    }
15}
16impl From<crate::W<CMD_SPEC>> for W {
17    #[inline(always)]
18    fn from(writer: crate::W<CMD_SPEC>) -> Self {
19        W(writer)
20    }
21}
22#[doc = "Field `RXEN` writer - Receiver Enable"]
23pub type RXEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>;
24#[doc = "Field `RXDIS` writer - Receiver Disable"]
25pub type RXDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>;
26#[doc = "Field `TXEN` writer - Transmitter Enable"]
27pub type TXEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>;
28#[doc = "Field `TXDIS` writer - Transmitter Disable"]
29pub type TXDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>;
30#[doc = "Field `MASTEREN` writer - Master Enable"]
31pub type MASTEREN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>;
32#[doc = "Field `MASTERDIS` writer - Master Disable"]
33pub type MASTERDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>;
34#[doc = "Field `RXBLOCKEN` writer - Receiver Block Enable"]
35pub type RXBLOCKEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>;
36#[doc = "Field `RXBLOCKDIS` writer - Receiver Block Disable"]
37pub type RXBLOCKDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>;
38#[doc = "Field `TXTRIEN` writer - Transmitter Tristate Enable"]
39pub type TXTRIEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>;
40#[doc = "Field `TXTRIDIS` writer - Transmitter Tristate Disable"]
41pub type TXTRIDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>;
42#[doc = "Field `CLEARTX` writer - Clear TX"]
43pub type CLEARTX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>;
44#[doc = "Field `CLEARRX` writer - Clear RX"]
45pub type CLEARRX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>;
46impl W {
47    #[doc = "Bit 0 - Receiver Enable"]
48    #[inline(always)]
49    #[must_use]
50    pub fn rxen(&mut self) -> RXEN_W<0> {
51        RXEN_W::new(self)
52    }
53    #[doc = "Bit 1 - Receiver Disable"]
54    #[inline(always)]
55    #[must_use]
56    pub fn rxdis(&mut self) -> RXDIS_W<1> {
57        RXDIS_W::new(self)
58    }
59    #[doc = "Bit 2 - Transmitter Enable"]
60    #[inline(always)]
61    #[must_use]
62    pub fn txen(&mut self) -> TXEN_W<2> {
63        TXEN_W::new(self)
64    }
65    #[doc = "Bit 3 - Transmitter Disable"]
66    #[inline(always)]
67    #[must_use]
68    pub fn txdis(&mut self) -> TXDIS_W<3> {
69        TXDIS_W::new(self)
70    }
71    #[doc = "Bit 4 - Master Enable"]
72    #[inline(always)]
73    #[must_use]
74    pub fn masteren(&mut self) -> MASTEREN_W<4> {
75        MASTEREN_W::new(self)
76    }
77    #[doc = "Bit 5 - Master Disable"]
78    #[inline(always)]
79    #[must_use]
80    pub fn masterdis(&mut self) -> MASTERDIS_W<5> {
81        MASTERDIS_W::new(self)
82    }
83    #[doc = "Bit 6 - Receiver Block Enable"]
84    #[inline(always)]
85    #[must_use]
86    pub fn rxblocken(&mut self) -> RXBLOCKEN_W<6> {
87        RXBLOCKEN_W::new(self)
88    }
89    #[doc = "Bit 7 - Receiver Block Disable"]
90    #[inline(always)]
91    #[must_use]
92    pub fn rxblockdis(&mut self) -> RXBLOCKDIS_W<7> {
93        RXBLOCKDIS_W::new(self)
94    }
95    #[doc = "Bit 8 - Transmitter Tristate Enable"]
96    #[inline(always)]
97    #[must_use]
98    pub fn txtrien(&mut self) -> TXTRIEN_W<8> {
99        TXTRIEN_W::new(self)
100    }
101    #[doc = "Bit 9 - Transmitter Tristate Disable"]
102    #[inline(always)]
103    #[must_use]
104    pub fn txtridis(&mut self) -> TXTRIDIS_W<9> {
105        TXTRIDIS_W::new(self)
106    }
107    #[doc = "Bit 10 - Clear TX"]
108    #[inline(always)]
109    #[must_use]
110    pub fn cleartx(&mut self) -> CLEARTX_W<10> {
111        CLEARTX_W::new(self)
112    }
113    #[doc = "Bit 11 - Clear RX"]
114    #[inline(always)]
115    #[must_use]
116    pub fn clearrx(&mut self) -> CLEARRX_W<11> {
117        CLEARRX_W::new(self)
118    }
119    #[doc = "Writes raw bits to the register."]
120    #[inline(always)]
121    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
122        self.0.bits(bits);
123        self
124    }
125}
126#[doc = "Command Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"]
127pub struct CMD_SPEC;
128impl crate::RegisterSpec for CMD_SPEC {
129    type Ux = u32;
130}
131#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"]
132impl crate::Writable for CMD_SPEC {
133    type Writer = W;
134    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
135    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
136}
137#[doc = "`reset()` method sets CMD to value 0"]
138impl crate::Resettable for CMD_SPEC {
139    const RESET_VALUE: Self::Ux = 0;
140}
efm32lg_pac/efm32lg230/usart2/cmd.rs

efm32lg_pac/efm32lg230/usart2/
cmd.rs
