efm32jg1b_pac/efm32jg1b200/msc/
cachecmd.rs

1#[doc = "Register `CACHECMD` writer"]
2pub struct W(crate::W<CACHECMD_SPEC>);
3impl core::ops::Deref for W {
4    type Target = crate::W<CACHECMD_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl core::ops::DerefMut for W {
11    #[inline(always)]
12    fn deref_mut(&mut self) -> &mut Self::Target {
13        &mut self.0
14    }
15}
16impl From<crate::W<CACHECMD_SPEC>> for W {
17    #[inline(always)]
18    fn from(writer: crate::W<CACHECMD_SPEC>) -> Self {
19        W(writer)
20    }
21}
22#[doc = "Field `INVCACHE` writer - Invalidate Instruction Cache"]
23pub type INVCACHE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CACHECMD_SPEC, bool, O>;
24#[doc = "Field `STARTPC` writer - Start Performance Counters"]
25pub type STARTPC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CACHECMD_SPEC, bool, O>;
26#[doc = "Field `STOPPC` writer - Stop Performance Counters"]
27pub type STOPPC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CACHECMD_SPEC, bool, O>;
28impl W {
29    #[doc = "Bit 0 - Invalidate Instruction Cache"]
30    #[inline(always)]
31    #[must_use]
32    pub fn invcache(&mut self) -> INVCACHE_W<0> {
33        INVCACHE_W::new(self)
34    }
35    #[doc = "Bit 1 - Start Performance Counters"]
36    #[inline(always)]
37    #[must_use]
38    pub fn startpc(&mut self) -> STARTPC_W<1> {
39        STARTPC_W::new(self)
40    }
41    #[doc = "Bit 2 - Stop Performance Counters"]
42    #[inline(always)]
43    #[must_use]
44    pub fn stoppc(&mut self) -> STOPPC_W<2> {
45        STOPPC_W::new(self)
46    }
47    #[doc = "Writes raw bits to the register."]
48    #[inline(always)]
49    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
50        self.0.bits(bits);
51        self
52    }
53}
54#[doc = "Flash Cache Command Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cachecmd](index.html) module"]
55pub struct CACHECMD_SPEC;
56impl crate::RegisterSpec for CACHECMD_SPEC {
57    type Ux = u32;
58}
59#[doc = "`write(|w| ..)` method takes [cachecmd::W](W) writer structure"]
60impl crate::Writable for CACHECMD_SPEC {
61    type Writer = W;
62    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
63    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
64}
65#[doc = "`reset()` method sets CACHECMD to value 0"]
66impl crate::Resettable for CACHECMD_SPEC {
67    const RESET_VALUE: Self::Ux = 0;
68}
efm32jg1b_pac/efm32jg1b200/msc/cachecmd.rs

efm32jg1b_pac/efm32jg1b200/msc/
cachecmd.rs
