efm32jg12b_pac/efm32jg12b500/gpio/
ph_ctrl.rs1#[doc = "Register `PH_CTRL` reader"]
2pub struct R(crate::R<PH_CTRL_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<PH_CTRL_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<PH_CTRL_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<PH_CTRL_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `PH_CTRL` writer"]
17pub struct W(crate::W<PH_CTRL_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<PH_CTRL_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<PH_CTRL_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<PH_CTRL_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `DRIVESTRENGTH` reader - Drive Strength for Port"]
38pub type DRIVESTRENGTH_R = crate::BitReader<bool>;
39#[doc = "Field `DRIVESTRENGTH` writer - Drive Strength for Port"]
40pub type DRIVESTRENGTH_W<'a, const O: u8> = crate::BitWriter<'a, u32, PH_CTRL_SPEC, bool, O>;
41#[doc = "Field `SLEWRATE` reader - Slewrate Limit for Port"]
42pub type SLEWRATE_R = crate::FieldReader<u8, u8>;
43#[doc = "Field `SLEWRATE` writer - Slewrate Limit for Port"]
44pub type SLEWRATE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PH_CTRL_SPEC, u8, u8, 3, O>;
45#[doc = "Field `DINDIS` reader - Data in Disable"]
46pub type DINDIS_R = crate::BitReader<bool>;
47#[doc = "Field `DINDIS` writer - Data in Disable"]
48pub type DINDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, PH_CTRL_SPEC, bool, O>;
49#[doc = "Field `DRIVESTRENGTHALT` reader - Alternate Drive Strength for Port"]
50pub type DRIVESTRENGTHALT_R = crate::BitReader<bool>;
51#[doc = "Field `DRIVESTRENGTHALT` writer - Alternate Drive Strength for Port"]
52pub type DRIVESTRENGTHALT_W<'a, const O: u8> = crate::BitWriter<'a, u32, PH_CTRL_SPEC, bool, O>;
53#[doc = "Field `SLEWRATEALT` reader - Alternate Slewrate Limit for Port"]
54pub type SLEWRATEALT_R = crate::FieldReader<u8, u8>;
55#[doc = "Field `SLEWRATEALT` writer - Alternate Slewrate Limit for Port"]
56pub type SLEWRATEALT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PH_CTRL_SPEC, u8, u8, 3, O>;
57#[doc = "Field `DINDISALT` reader - Alternate Data in Disable"]
58pub type DINDISALT_R = crate::BitReader<bool>;
59#[doc = "Field `DINDISALT` writer - Alternate Data in Disable"]
60pub type DINDISALT_W<'a, const O: u8> = crate::BitWriter<'a, u32, PH_CTRL_SPEC, bool, O>;
61impl R {
62 #[doc = "Bit 0 - Drive Strength for Port"]
63 #[inline(always)]
64 pub fn drivestrength(&self) -> DRIVESTRENGTH_R {
65 DRIVESTRENGTH_R::new((self.bits & 1) != 0)
66 }
67 #[doc = "Bits 4:6 - Slewrate Limit for Port"]
68 #[inline(always)]
69 pub fn slewrate(&self) -> SLEWRATE_R {
70 SLEWRATE_R::new(((self.bits >> 4) & 7) as u8)
71 }
72 #[doc = "Bit 12 - Data in Disable"]
73 #[inline(always)]
74 pub fn dindis(&self) -> DINDIS_R {
75 DINDIS_R::new(((self.bits >> 12) & 1) != 0)
76 }
77 #[doc = "Bit 16 - Alternate Drive Strength for Port"]
78 #[inline(always)]
79 pub fn drivestrengthalt(&self) -> DRIVESTRENGTHALT_R {
80 DRIVESTRENGTHALT_R::new(((self.bits >> 16) & 1) != 0)
81 }
82 #[doc = "Bits 20:22 - Alternate Slewrate Limit for Port"]
83 #[inline(always)]
84 pub fn slewratealt(&self) -> SLEWRATEALT_R {
85 SLEWRATEALT_R::new(((self.bits >> 20) & 7) as u8)
86 }
87 #[doc = "Bit 28 - Alternate Data in Disable"]
88 #[inline(always)]
89 pub fn dindisalt(&self) -> DINDISALT_R {
90 DINDISALT_R::new(((self.bits >> 28) & 1) != 0)
91 }
92}
93impl W {
94 #[doc = "Bit 0 - Drive Strength for Port"]
95 #[inline(always)]
96 #[must_use]
97 pub fn drivestrength(&mut self) -> DRIVESTRENGTH_W<0> {
98 DRIVESTRENGTH_W::new(self)
99 }
100 #[doc = "Bits 4:6 - Slewrate Limit for Port"]
101 #[inline(always)]
102 #[must_use]
103 pub fn slewrate(&mut self) -> SLEWRATE_W<4> {
104 SLEWRATE_W::new(self)
105 }
106 #[doc = "Bit 12 - Data in Disable"]
107 #[inline(always)]
108 #[must_use]
109 pub fn dindis(&mut self) -> DINDIS_W<12> {
110 DINDIS_W::new(self)
111 }
112 #[doc = "Bit 16 - Alternate Drive Strength for Port"]
113 #[inline(always)]
114 #[must_use]
115 pub fn drivestrengthalt(&mut self) -> DRIVESTRENGTHALT_W<16> {
116 DRIVESTRENGTHALT_W::new(self)
117 }
118 #[doc = "Bits 20:22 - Alternate Slewrate Limit for Port"]
119 #[inline(always)]
120 #[must_use]
121 pub fn slewratealt(&mut self) -> SLEWRATEALT_W<20> {
122 SLEWRATEALT_W::new(self)
123 }
124 #[doc = "Bit 28 - Alternate Data in Disable"]
125 #[inline(always)]
126 #[must_use]
127 pub fn dindisalt(&mut self) -> DINDISALT_W<28> {
128 DINDISALT_W::new(self)
129 }
130 #[doc = "Writes raw bits to the register."]
131 #[inline(always)]
132 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
133 self.0.bits(bits);
134 self
135 }
136}
137#[doc = "Port Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ph_ctrl](index.html) module"]
138pub struct PH_CTRL_SPEC;
139impl crate::RegisterSpec for PH_CTRL_SPEC {
140 type Ux = u32;
141}
142#[doc = "`read()` method returns [ph_ctrl::R](R) reader structure"]
143impl crate::Readable for PH_CTRL_SPEC {
144 type Reader = R;
145}
146#[doc = "`write(|w| ..)` method takes [ph_ctrl::W](W) writer structure"]
147impl crate::Writable for PH_CTRL_SPEC {
148 type Writer = W;
149 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
150 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
151}
152#[doc = "`reset()` method sets PH_CTRL to value 0x0050_0050"]
153impl crate::Resettable for PH_CTRL_SPEC {
154 const RESET_VALUE: Self::Ux = 0x0050_0050;
155}