efm32jg12b_pac/efm32jg12b500/emu/
dcdcctrl.rs

1#[doc = "Register `DCDCCTRL` reader"]
2pub struct R(crate::R<DCDCCTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<DCDCCTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<DCDCCTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<DCDCCTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `DCDCCTRL` writer"]
17pub struct W(crate::W<DCDCCTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<DCDCCTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<DCDCCTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<DCDCCTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `DCDCMODE` reader - Regulator Mode"]
38pub type DCDCMODE_R = crate::FieldReader<u8, DCDCMODE_A>;
39#[doc = "Regulator Mode\n\nValue on reset: 3"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41#[repr(u8)]
42pub enum DCDCMODE_A {
43    #[doc = "0: DCDC regulator is operating in bypass mode. Prior to configuring DCDCMODE=BYPASS, software must set EMU_DCDCCLIMCTRL.BYPLIMEN=1 to prevent excessive current between VREGVDD and DVDD supplies."]
44    BYPASS = 0,
45    #[doc = "1: DCDC regulator is operating in low noise mode."]
46    LOWNOISE = 1,
47    #[doc = "2: DCDC regulator is operating in low power mode."]
48    LOWPOWER = 2,
49    #[doc = "3: DCDC regulator is off and the bypass switch is off. Note: DVDD must be supplied externally"]
50    OFF = 3,
51}
52impl From<DCDCMODE_A> for u8 {
53    #[inline(always)]
54    fn from(variant: DCDCMODE_A) -> Self {
55        variant as _
56    }
57}
58impl DCDCMODE_R {
59    #[doc = "Get enumerated values variant"]
60    #[inline(always)]
61    pub fn variant(&self) -> DCDCMODE_A {
62        match self.bits {
63            0 => DCDCMODE_A::BYPASS,
64            1 => DCDCMODE_A::LOWNOISE,
65            2 => DCDCMODE_A::LOWPOWER,
66            3 => DCDCMODE_A::OFF,
67            _ => unreachable!(),
68        }
69    }
70    #[doc = "Checks if the value of the field is `BYPASS`"]
71    #[inline(always)]
72    pub fn is_bypass(&self) -> bool {
73        *self == DCDCMODE_A::BYPASS
74    }
75    #[doc = "Checks if the value of the field is `LOWNOISE`"]
76    #[inline(always)]
77    pub fn is_lownoise(&self) -> bool {
78        *self == DCDCMODE_A::LOWNOISE
79    }
80    #[doc = "Checks if the value of the field is `LOWPOWER`"]
81    #[inline(always)]
82    pub fn is_lowpower(&self) -> bool {
83        *self == DCDCMODE_A::LOWPOWER
84    }
85    #[doc = "Checks if the value of the field is `OFF`"]
86    #[inline(always)]
87    pub fn is_off(&self) -> bool {
88        *self == DCDCMODE_A::OFF
89    }
90}
91#[doc = "Field `DCDCMODE` writer - Regulator Mode"]
92pub type DCDCMODE_W<'a, const O: u8> =
93    crate::FieldWriterSafe<'a, u32, DCDCCTRL_SPEC, u8, DCDCMODE_A, 2, O>;
94impl<'a, const O: u8> DCDCMODE_W<'a, O> {
95    #[doc = "DCDC regulator is operating in bypass mode. Prior to configuring DCDCMODE=BYPASS, software must set EMU_DCDCCLIMCTRL.BYPLIMEN=1 to prevent excessive current between VREGVDD and DVDD supplies."]
96    #[inline(always)]
97    pub fn bypass(self) -> &'a mut W {
98        self.variant(DCDCMODE_A::BYPASS)
99    }
100    #[doc = "DCDC regulator is operating in low noise mode."]
101    #[inline(always)]
102    pub fn lownoise(self) -> &'a mut W {
103        self.variant(DCDCMODE_A::LOWNOISE)
104    }
105    #[doc = "DCDC regulator is operating in low power mode."]
106    #[inline(always)]
107    pub fn lowpower(self) -> &'a mut W {
108        self.variant(DCDCMODE_A::LOWPOWER)
109    }
110    #[doc = "DCDC regulator is off and the bypass switch is off. Note: DVDD must be supplied externally"]
111    #[inline(always)]
112    pub fn off(self) -> &'a mut W {
113        self.variant(DCDCMODE_A::OFF)
114    }
115}
116#[doc = "Field `DCDCMODEEM23` reader - DCDC Mode EM23"]
117pub type DCDCMODEEM23_R = crate::BitReader<bool>;
118#[doc = "Field `DCDCMODEEM23` writer - DCDC Mode EM23"]
119pub type DCDCMODEEM23_W<'a, const O: u8> = crate::BitWriter<'a, u32, DCDCCTRL_SPEC, bool, O>;
120#[doc = "Field `DCDCMODEEM4` reader - DCDC Mode EM4H"]
121pub type DCDCMODEEM4_R = crate::BitReader<bool>;
122#[doc = "Field `DCDCMODEEM4` writer - DCDC Mode EM4H"]
123pub type DCDCMODEEM4_W<'a, const O: u8> = crate::BitWriter<'a, u32, DCDCCTRL_SPEC, bool, O>;
124impl R {
125    #[doc = "Bits 0:1 - Regulator Mode"]
126    #[inline(always)]
127    pub fn dcdcmode(&self) -> DCDCMODE_R {
128        DCDCMODE_R::new((self.bits & 3) as u8)
129    }
130    #[doc = "Bit 4 - DCDC Mode EM23"]
131    #[inline(always)]
132    pub fn dcdcmodeem23(&self) -> DCDCMODEEM23_R {
133        DCDCMODEEM23_R::new(((self.bits >> 4) & 1) != 0)
134    }
135    #[doc = "Bit 5 - DCDC Mode EM4H"]
136    #[inline(always)]
137    pub fn dcdcmodeem4(&self) -> DCDCMODEEM4_R {
138        DCDCMODEEM4_R::new(((self.bits >> 5) & 1) != 0)
139    }
140}
141impl W {
142    #[doc = "Bits 0:1 - Regulator Mode"]
143    #[inline(always)]
144    #[must_use]
145    pub fn dcdcmode(&mut self) -> DCDCMODE_W<0> {
146        DCDCMODE_W::new(self)
147    }
148    #[doc = "Bit 4 - DCDC Mode EM23"]
149    #[inline(always)]
150    #[must_use]
151    pub fn dcdcmodeem23(&mut self) -> DCDCMODEEM23_W<4> {
152        DCDCMODEEM23_W::new(self)
153    }
154    #[doc = "Bit 5 - DCDC Mode EM4H"]
155    #[inline(always)]
156    #[must_use]
157    pub fn dcdcmodeem4(&mut self) -> DCDCMODEEM4_W<5> {
158        DCDCMODEEM4_W::new(self)
159    }
160    #[doc = "Writes raw bits to the register."]
161    #[inline(always)]
162    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
163        self.0.bits(bits);
164        self
165    }
166}
167#[doc = "DCDC Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dcdcctrl](index.html) module"]
168pub struct DCDCCTRL_SPEC;
169impl crate::RegisterSpec for DCDCCTRL_SPEC {
170    type Ux = u32;
171}
172#[doc = "`read()` method returns [dcdcctrl::R](R) reader structure"]
173impl crate::Readable for DCDCCTRL_SPEC {
174    type Reader = R;
175}
176#[doc = "`write(|w| ..)` method takes [dcdcctrl::W](W) writer structure"]
177impl crate::Writable for DCDCCTRL_SPEC {
178    type Writer = W;
179    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
180    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
181}
182#[doc = "`reset()` method sets DCDCCTRL to value 0x33"]
183impl crate::Resettable for DCDCCTRL_SPEC {
184    const RESET_VALUE: Self::Ux = 0x33;
185}
efm32jg12b_pac/efm32jg12b500/emu/dcdcctrl.rs

efm32jg12b_pac/efm32jg12b500/emu/
dcdcctrl.rs
