efm32jg12b_pac/efm32jg12b500/acmp0/
ctrl.rs

1#[doc = "Register `CTRL` reader"]
2pub struct R(crate::R<CTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CTRL` writer"]
17pub struct W(crate::W<CTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `EN` reader - Analog Comparator Enable"]
38pub type EN_R = crate::BitReader<bool>;
39#[doc = "Field `EN` writer - Analog Comparator Enable"]
40pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
41#[doc = "Field `INACTVAL` reader - Inactive Value"]
42pub type INACTVAL_R = crate::BitReader<bool>;
43#[doc = "Field `INACTVAL` writer - Inactive Value"]
44pub type INACTVAL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
45#[doc = "Field `GPIOINV` reader - Comparator GPIO Output Invert"]
46pub type GPIOINV_R = crate::BitReader<bool>;
47#[doc = "Field `GPIOINV` writer - Comparator GPIO Output Invert"]
48pub type GPIOINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
49#[doc = "Field `APORTXMASTERDIS` reader - APORT Bus X Master Disable"]
50pub type APORTXMASTERDIS_R = crate::BitReader<bool>;
51#[doc = "Field `APORTXMASTERDIS` writer - APORT Bus X Master Disable"]
52pub type APORTXMASTERDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
53#[doc = "Field `APORTYMASTERDIS` reader - APORT Bus Y Master Disable"]
54pub type APORTYMASTERDIS_R = crate::BitReader<bool>;
55#[doc = "Field `APORTYMASTERDIS` writer - APORT Bus Y Master Disable"]
56pub type APORTYMASTERDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
57#[doc = "Field `APORTVMASTERDIS` reader - APORT Bus Master Disable for Bus Selected By VASEL"]
58pub type APORTVMASTERDIS_R = crate::BitReader<bool>;
59#[doc = "Field `APORTVMASTERDIS` writer - APORT Bus Master Disable for Bus Selected By VASEL"]
60pub type APORTVMASTERDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
61#[doc = "Field `PWRSEL` reader - Power Select"]
62pub type PWRSEL_R = crate::FieldReader<u8, PWRSEL_A>;
63#[doc = "Power Select\n\nValue on reset: 0"]
64#[derive(Clone, Copy, Debug, PartialEq, Eq)]
65#[repr(u8)]
66pub enum PWRSEL_A {
67    #[doc = "0: AVDD supply"]
68    AVDD = 0,
69    #[doc = "1: DVDD supply"]
70    DVDD = 1,
71    #[doc = "2: IOVDD/IOVDD0 supply"]
72    IOVDD0 = 2,
73    #[doc = "4: IOVDD1 supply (if part has two I/O voltages)"]
74    IOVDD1 = 4,
75}
76impl From<PWRSEL_A> for u8 {
77    #[inline(always)]
78    fn from(variant: PWRSEL_A) -> Self {
79        variant as _
80    }
81}
82impl PWRSEL_R {
83    #[doc = "Get enumerated values variant"]
84    #[inline(always)]
85    pub fn variant(&self) -> Option<PWRSEL_A> {
86        match self.bits {
87            0 => Some(PWRSEL_A::AVDD),
88            1 => Some(PWRSEL_A::DVDD),
89            2 => Some(PWRSEL_A::IOVDD0),
90            4 => Some(PWRSEL_A::IOVDD1),
91            _ => None,
92        }
93    }
94    #[doc = "Checks if the value of the field is `AVDD`"]
95    #[inline(always)]
96    pub fn is_avdd(&self) -> bool {
97        *self == PWRSEL_A::AVDD
98    }
99    #[doc = "Checks if the value of the field is `DVDD`"]
100    #[inline(always)]
101    pub fn is_dvdd(&self) -> bool {
102        *self == PWRSEL_A::DVDD
103    }
104    #[doc = "Checks if the value of the field is `IOVDD0`"]
105    #[inline(always)]
106    pub fn is_iovdd0(&self) -> bool {
107        *self == PWRSEL_A::IOVDD0
108    }
109    #[doc = "Checks if the value of the field is `IOVDD1`"]
110    #[inline(always)]
111    pub fn is_iovdd1(&self) -> bool {
112        *self == PWRSEL_A::IOVDD1
113    }
114}
115#[doc = "Field `PWRSEL` writer - Power Select"]
116pub type PWRSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, PWRSEL_A, 3, O>;
117impl<'a, const O: u8> PWRSEL_W<'a, O> {
118    #[doc = "AVDD supply"]
119    #[inline(always)]
120    pub fn avdd(self) -> &'a mut W {
121        self.variant(PWRSEL_A::AVDD)
122    }
123    #[doc = "DVDD supply"]
124    #[inline(always)]
125    pub fn dvdd(self) -> &'a mut W {
126        self.variant(PWRSEL_A::DVDD)
127    }
128    #[doc = "IOVDD/IOVDD0 supply"]
129    #[inline(always)]
130    pub fn iovdd0(self) -> &'a mut W {
131        self.variant(PWRSEL_A::IOVDD0)
132    }
133    #[doc = "IOVDD1 supply (if part has two I/O voltages)"]
134    #[inline(always)]
135    pub fn iovdd1(self) -> &'a mut W {
136        self.variant(PWRSEL_A::IOVDD1)
137    }
138}
139#[doc = "Field `ACCURACY` reader - ACMP Accuracy Mode"]
140pub type ACCURACY_R = crate::BitReader<bool>;
141#[doc = "Field `ACCURACY` writer - ACMP Accuracy Mode"]
142pub type ACCURACY_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
143#[doc = "Field `INPUTRANGE` reader - Input Range"]
144pub type INPUTRANGE_R = crate::FieldReader<u8, INPUTRANGE_A>;
145#[doc = "Input Range\n\nValue on reset: 0"]
146#[derive(Clone, Copy, Debug, PartialEq, Eq)]
147#[repr(u8)]
148pub enum INPUTRANGE_A {
149    #[doc = "0: Setting when the input can be from 0 to ACMPVDD."]
150    FULL = 0,
151    #[doc = "1: Setting when the input will always be greater than ACMPVDD/2."]
152    GTVDDDIV2 = 1,
153    #[doc = "2: Setting when the input will always be less than ACMPVDD/2."]
154    LTVDDDIV2 = 2,
155}
156impl From<INPUTRANGE_A> for u8 {
157    #[inline(always)]
158    fn from(variant: INPUTRANGE_A) -> Self {
159        variant as _
160    }
161}
162impl INPUTRANGE_R {
163    #[doc = "Get enumerated values variant"]
164    #[inline(always)]
165    pub fn variant(&self) -> Option<INPUTRANGE_A> {
166        match self.bits {
167            0 => Some(INPUTRANGE_A::FULL),
168            1 => Some(INPUTRANGE_A::GTVDDDIV2),
169            2 => Some(INPUTRANGE_A::LTVDDDIV2),
170            _ => None,
171        }
172    }
173    #[doc = "Checks if the value of the field is `FULL`"]
174    #[inline(always)]
175    pub fn is_full(&self) -> bool {
176        *self == INPUTRANGE_A::FULL
177    }
178    #[doc = "Checks if the value of the field is `GTVDDDIV2`"]
179    #[inline(always)]
180    pub fn is_gtvdddiv2(&self) -> bool {
181        *self == INPUTRANGE_A::GTVDDDIV2
182    }
183    #[doc = "Checks if the value of the field is `LTVDDDIV2`"]
184    #[inline(always)]
185    pub fn is_ltvdddiv2(&self) -> bool {
186        *self == INPUTRANGE_A::LTVDDDIV2
187    }
188}
189#[doc = "Field `INPUTRANGE` writer - Input Range"]
190pub type INPUTRANGE_W<'a, const O: u8> =
191    crate::FieldWriter<'a, u32, CTRL_SPEC, u8, INPUTRANGE_A, 2, O>;
192impl<'a, const O: u8> INPUTRANGE_W<'a, O> {
193    #[doc = "Setting when the input can be from 0 to ACMPVDD."]
194    #[inline(always)]
195    pub fn full(self) -> &'a mut W {
196        self.variant(INPUTRANGE_A::FULL)
197    }
198    #[doc = "Setting when the input will always be greater than ACMPVDD/2."]
199    #[inline(always)]
200    pub fn gtvdddiv2(self) -> &'a mut W {
201        self.variant(INPUTRANGE_A::GTVDDDIV2)
202    }
203    #[doc = "Setting when the input will always be less than ACMPVDD/2."]
204    #[inline(always)]
205    pub fn ltvdddiv2(self) -> &'a mut W {
206        self.variant(INPUTRANGE_A::LTVDDDIV2)
207    }
208}
209#[doc = "Field `IRISE` reader - Rising Edge Interrupt Sense"]
210pub type IRISE_R = crate::BitReader<bool>;
211#[doc = "Field `IRISE` writer - Rising Edge Interrupt Sense"]
212pub type IRISE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
213#[doc = "Field `IFALL` reader - Falling Edge Interrupt Sense"]
214pub type IFALL_R = crate::BitReader<bool>;
215#[doc = "Field `IFALL` writer - Falling Edge Interrupt Sense"]
216pub type IFALL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
217#[doc = "Field `BIASPROG` reader - Bias Configuration"]
218pub type BIASPROG_R = crate::FieldReader<u8, u8>;
219#[doc = "Field `BIASPROG` writer - Bias Configuration"]
220pub type BIASPROG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, u8, 6, O>;
221#[doc = "Field `FULLBIAS` reader - Full Bias Current"]
222pub type FULLBIAS_R = crate::BitReader<bool>;
223#[doc = "Field `FULLBIAS` writer - Full Bias Current"]
224pub type FULLBIAS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
225impl R {
226    #[doc = "Bit 0 - Analog Comparator Enable"]
227    #[inline(always)]
228    pub fn en(&self) -> EN_R {
229        EN_R::new((self.bits & 1) != 0)
230    }
231    #[doc = "Bit 2 - Inactive Value"]
232    #[inline(always)]
233    pub fn inactval(&self) -> INACTVAL_R {
234        INACTVAL_R::new(((self.bits >> 2) & 1) != 0)
235    }
236    #[doc = "Bit 3 - Comparator GPIO Output Invert"]
237    #[inline(always)]
238    pub fn gpioinv(&self) -> GPIOINV_R {
239        GPIOINV_R::new(((self.bits >> 3) & 1) != 0)
240    }
241    #[doc = "Bit 8 - APORT Bus X Master Disable"]
242    #[inline(always)]
243    pub fn aportxmasterdis(&self) -> APORTXMASTERDIS_R {
244        APORTXMASTERDIS_R::new(((self.bits >> 8) & 1) != 0)
245    }
246    #[doc = "Bit 9 - APORT Bus Y Master Disable"]
247    #[inline(always)]
248    pub fn aportymasterdis(&self) -> APORTYMASTERDIS_R {
249        APORTYMASTERDIS_R::new(((self.bits >> 9) & 1) != 0)
250    }
251    #[doc = "Bit 10 - APORT Bus Master Disable for Bus Selected By VASEL"]
252    #[inline(always)]
253    pub fn aportvmasterdis(&self) -> APORTVMASTERDIS_R {
254        APORTVMASTERDIS_R::new(((self.bits >> 10) & 1) != 0)
255    }
256    #[doc = "Bits 12:14 - Power Select"]
257    #[inline(always)]
258    pub fn pwrsel(&self) -> PWRSEL_R {
259        PWRSEL_R::new(((self.bits >> 12) & 7) as u8)
260    }
261    #[doc = "Bit 15 - ACMP Accuracy Mode"]
262    #[inline(always)]
263    pub fn accuracy(&self) -> ACCURACY_R {
264        ACCURACY_R::new(((self.bits >> 15) & 1) != 0)
265    }
266    #[doc = "Bits 18:19 - Input Range"]
267    #[inline(always)]
268    pub fn inputrange(&self) -> INPUTRANGE_R {
269        INPUTRANGE_R::new(((self.bits >> 18) & 3) as u8)
270    }
271    #[doc = "Bit 20 - Rising Edge Interrupt Sense"]
272    #[inline(always)]
273    pub fn irise(&self) -> IRISE_R {
274        IRISE_R::new(((self.bits >> 20) & 1) != 0)
275    }
276    #[doc = "Bit 21 - Falling Edge Interrupt Sense"]
277    #[inline(always)]
278    pub fn ifall(&self) -> IFALL_R {
279        IFALL_R::new(((self.bits >> 21) & 1) != 0)
280    }
281    #[doc = "Bits 24:29 - Bias Configuration"]
282    #[inline(always)]
283    pub fn biasprog(&self) -> BIASPROG_R {
284        BIASPROG_R::new(((self.bits >> 24) & 0x3f) as u8)
285    }
286    #[doc = "Bit 31 - Full Bias Current"]
287    #[inline(always)]
288    pub fn fullbias(&self) -> FULLBIAS_R {
289        FULLBIAS_R::new(((self.bits >> 31) & 1) != 0)
290    }
291}
292impl W {
293    #[doc = "Bit 0 - Analog Comparator Enable"]
294    #[inline(always)]
295    #[must_use]
296    pub fn en(&mut self) -> EN_W<0> {
297        EN_W::new(self)
298    }
299    #[doc = "Bit 2 - Inactive Value"]
300    #[inline(always)]
301    #[must_use]
302    pub fn inactval(&mut self) -> INACTVAL_W<2> {
303        INACTVAL_W::new(self)
304    }
305    #[doc = "Bit 3 - Comparator GPIO Output Invert"]
306    #[inline(always)]
307    #[must_use]
308    pub fn gpioinv(&mut self) -> GPIOINV_W<3> {
309        GPIOINV_W::new(self)
310    }
311    #[doc = "Bit 8 - APORT Bus X Master Disable"]
312    #[inline(always)]
313    #[must_use]
314    pub fn aportxmasterdis(&mut self) -> APORTXMASTERDIS_W<8> {
315        APORTXMASTERDIS_W::new(self)
316    }
317    #[doc = "Bit 9 - APORT Bus Y Master Disable"]
318    #[inline(always)]
319    #[must_use]
320    pub fn aportymasterdis(&mut self) -> APORTYMASTERDIS_W<9> {
321        APORTYMASTERDIS_W::new(self)
322    }
323    #[doc = "Bit 10 - APORT Bus Master Disable for Bus Selected By VASEL"]
324    #[inline(always)]
325    #[must_use]
326    pub fn aportvmasterdis(&mut self) -> APORTVMASTERDIS_W<10> {
327        APORTVMASTERDIS_W::new(self)
328    }
329    #[doc = "Bits 12:14 - Power Select"]
330    #[inline(always)]
331    #[must_use]
332    pub fn pwrsel(&mut self) -> PWRSEL_W<12> {
333        PWRSEL_W::new(self)
334    }
335    #[doc = "Bit 15 - ACMP Accuracy Mode"]
336    #[inline(always)]
337    #[must_use]
338    pub fn accuracy(&mut self) -> ACCURACY_W<15> {
339        ACCURACY_W::new(self)
340    }
341    #[doc = "Bits 18:19 - Input Range"]
342    #[inline(always)]
343    #[must_use]
344    pub fn inputrange(&mut self) -> INPUTRANGE_W<18> {
345        INPUTRANGE_W::new(self)
346    }
347    #[doc = "Bit 20 - Rising Edge Interrupt Sense"]
348    #[inline(always)]
349    #[must_use]
350    pub fn irise(&mut self) -> IRISE_W<20> {
351        IRISE_W::new(self)
352    }
353    #[doc = "Bit 21 - Falling Edge Interrupt Sense"]
354    #[inline(always)]
355    #[must_use]
356    pub fn ifall(&mut self) -> IFALL_W<21> {
357        IFALL_W::new(self)
358    }
359    #[doc = "Bits 24:29 - Bias Configuration"]
360    #[inline(always)]
361    #[must_use]
362    pub fn biasprog(&mut self) -> BIASPROG_W<24> {
363        BIASPROG_W::new(self)
364    }
365    #[doc = "Bit 31 - Full Bias Current"]
366    #[inline(always)]
367    #[must_use]
368    pub fn fullbias(&mut self) -> FULLBIAS_W<31> {
369        FULLBIAS_W::new(self)
370    }
371    #[doc = "Writes raw bits to the register."]
372    #[inline(always)]
373    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
374        self.0.bits(bits);
375        self
376    }
377}
378#[doc = "Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"]
379pub struct CTRL_SPEC;
380impl crate::RegisterSpec for CTRL_SPEC {
381    type Ux = u32;
382}
383#[doc = "`read()` method returns [ctrl::R](R) reader structure"]
384impl crate::Readable for CTRL_SPEC {
385    type Reader = R;
386}
387#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"]
388impl crate::Writable for CTRL_SPEC {
389    type Writer = W;
390    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
391    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
392}
393#[doc = "`reset()` method sets CTRL to value 0x0700_0000"]
394impl crate::Resettable for CTRL_SPEC {
395    const RESET_VALUE: Self::Ux = 0x0700_0000;
396}
efm32jg12b_pac/efm32jg12b500/acmp0/ctrl.rs

efm32jg12b_pac/efm32jg12b500/acmp0/
ctrl.rs
