efm32jg12b_pac/efm32jg12b500/vdac0/
ch0ctrl.rs

1#[doc = "Register `CH0CTRL` reader"]
2pub struct R(crate::R<CH0CTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CH0CTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CH0CTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CH0CTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CH0CTRL` writer"]
17pub struct W(crate::W<CH0CTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CH0CTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CH0CTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CH0CTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `CONVMODE` reader - Conversion Mode"]
38pub type CONVMODE_R = crate::BitReader<bool>;
39#[doc = "Field `CONVMODE` writer - Conversion Mode"]
40pub type CONVMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH0CTRL_SPEC, bool, O>;
41#[doc = "Field `TRIGMODE` reader - Channel 0 Trigger Mode"]
42pub type TRIGMODE_R = crate::FieldReader<u8, TRIGMODE_A>;
43#[doc = "Channel 0 Trigger Mode\n\nValue on reset: 0"]
44#[derive(Clone, Copy, Debug, PartialEq, Eq)]
45#[repr(u8)]
46pub enum TRIGMODE_A {
47    #[doc = "0: Channel 0 is triggered by CH0DATA or COMBDATA write"]
48    SW = 0,
49    #[doc = "1: Channel 0 is triggered by PRS input"]
50    PRS = 1,
51    #[doc = "2: Channel 0 is triggered by Refresh timer"]
52    REFRESH = 2,
53    #[doc = "3: Channel 0 is triggered by CH0DATA/COMBDATA write or PRS input"]
54    SWPRS = 3,
55    #[doc = "4: Channel 0 is triggered by CH0DATA/COMBDATA write or Refresh timer"]
56    SWREFRESH = 4,
57    #[doc = "5: Channel 0 is triggered by LESENSE"]
58    LESENSE = 5,
59}
60impl From<TRIGMODE_A> for u8 {
61    #[inline(always)]
62    fn from(variant: TRIGMODE_A) -> Self {
63        variant as _
64    }
65}
66impl TRIGMODE_R {
67    #[doc = "Get enumerated values variant"]
68    #[inline(always)]
69    pub fn variant(&self) -> Option<TRIGMODE_A> {
70        match self.bits {
71            0 => Some(TRIGMODE_A::SW),
72            1 => Some(TRIGMODE_A::PRS),
73            2 => Some(TRIGMODE_A::REFRESH),
74            3 => Some(TRIGMODE_A::SWPRS),
75            4 => Some(TRIGMODE_A::SWREFRESH),
76            5 => Some(TRIGMODE_A::LESENSE),
77            _ => None,
78        }
79    }
80    #[doc = "Checks if the value of the field is `SW`"]
81    #[inline(always)]
82    pub fn is_sw(&self) -> bool {
83        *self == TRIGMODE_A::SW
84    }
85    #[doc = "Checks if the value of the field is `PRS`"]
86    #[inline(always)]
87    pub fn is_prs(&self) -> bool {
88        *self == TRIGMODE_A::PRS
89    }
90    #[doc = "Checks if the value of the field is `REFRESH`"]
91    #[inline(always)]
92    pub fn is_refresh(&self) -> bool {
93        *self == TRIGMODE_A::REFRESH
94    }
95    #[doc = "Checks if the value of the field is `SWPRS`"]
96    #[inline(always)]
97    pub fn is_swprs(&self) -> bool {
98        *self == TRIGMODE_A::SWPRS
99    }
100    #[doc = "Checks if the value of the field is `SWREFRESH`"]
101    #[inline(always)]
102    pub fn is_swrefresh(&self) -> bool {
103        *self == TRIGMODE_A::SWREFRESH
104    }
105    #[doc = "Checks if the value of the field is `LESENSE`"]
106    #[inline(always)]
107    pub fn is_lesense(&self) -> bool {
108        *self == TRIGMODE_A::LESENSE
109    }
110}
111#[doc = "Field `TRIGMODE` writer - Channel 0 Trigger Mode"]
112pub type TRIGMODE_W<'a, const O: u8> =
113    crate::FieldWriter<'a, u32, CH0CTRL_SPEC, u8, TRIGMODE_A, 3, O>;
114impl<'a, const O: u8> TRIGMODE_W<'a, O> {
115    #[doc = "Channel 0 is triggered by CH0DATA or COMBDATA write"]
116    #[inline(always)]
117    pub fn sw(self) -> &'a mut W {
118        self.variant(TRIGMODE_A::SW)
119    }
120    #[doc = "Channel 0 is triggered by PRS input"]
121    #[inline(always)]
122    pub fn prs(self) -> &'a mut W {
123        self.variant(TRIGMODE_A::PRS)
124    }
125    #[doc = "Channel 0 is triggered by Refresh timer"]
126    #[inline(always)]
127    pub fn refresh(self) -> &'a mut W {
128        self.variant(TRIGMODE_A::REFRESH)
129    }
130    #[doc = "Channel 0 is triggered by CH0DATA/COMBDATA write or PRS input"]
131    #[inline(always)]
132    pub fn swprs(self) -> &'a mut W {
133        self.variant(TRIGMODE_A::SWPRS)
134    }
135    #[doc = "Channel 0 is triggered by CH0DATA/COMBDATA write or Refresh timer"]
136    #[inline(always)]
137    pub fn swrefresh(self) -> &'a mut W {
138        self.variant(TRIGMODE_A::SWREFRESH)
139    }
140    #[doc = "Channel 0 is triggered by LESENSE"]
141    #[inline(always)]
142    pub fn lesense(self) -> &'a mut W {
143        self.variant(TRIGMODE_A::LESENSE)
144    }
145}
146#[doc = "Field `PRSASYNC` reader - Channel 0 PRS Asynchronous Enable"]
147pub type PRSASYNC_R = crate::BitReader<bool>;
148#[doc = "Field `PRSASYNC` writer - Channel 0 PRS Asynchronous Enable"]
149pub type PRSASYNC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH0CTRL_SPEC, bool, O>;
150#[doc = "Field `PRSSEL` reader - Channel 0 PRS Trigger Select"]
151pub type PRSSEL_R = crate::FieldReader<u8, PRSSEL_A>;
152#[doc = "Channel 0 PRS Trigger Select\n\nValue on reset: 0"]
153#[derive(Clone, Copy, Debug, PartialEq, Eq)]
154#[repr(u8)]
155pub enum PRSSEL_A {
156    #[doc = "0: PRS ch 0 triggers a conversion."]
157    PRSCH0 = 0,
158    #[doc = "1: PRS ch 1 triggers a conversion."]
159    PRSCH1 = 1,
160    #[doc = "2: PRS ch 2 triggers a conversion."]
161    PRSCH2 = 2,
162    #[doc = "3: PRS ch 3 triggers a conversion."]
163    PRSCH3 = 3,
164    #[doc = "4: PRS ch 4 triggers a conversion."]
165    PRSCH4 = 4,
166    #[doc = "5: PRS ch 5 triggers a conversion."]
167    PRSCH5 = 5,
168    #[doc = "6: PRS ch 6 triggers a conversion."]
169    PRSCH6 = 6,
170    #[doc = "7: PRS ch 7 triggers a conversion."]
171    PRSCH7 = 7,
172    #[doc = "8: PRS ch 8 triggers a conversion."]
173    PRSCH8 = 8,
174    #[doc = "9: PRS ch 9 triggers a conversion."]
175    PRSCH9 = 9,
176    #[doc = "10: PRS ch 10 triggers a conversion."]
177    PRSCH10 = 10,
178    #[doc = "11: PRS ch 11 triggers a conversion."]
179    PRSCH11 = 11,
180}
181impl From<PRSSEL_A> for u8 {
182    #[inline(always)]
183    fn from(variant: PRSSEL_A) -> Self {
184        variant as _
185    }
186}
187impl PRSSEL_R {
188    #[doc = "Get enumerated values variant"]
189    #[inline(always)]
190    pub fn variant(&self) -> Option<PRSSEL_A> {
191        match self.bits {
192            0 => Some(PRSSEL_A::PRSCH0),
193            1 => Some(PRSSEL_A::PRSCH1),
194            2 => Some(PRSSEL_A::PRSCH2),
195            3 => Some(PRSSEL_A::PRSCH3),
196            4 => Some(PRSSEL_A::PRSCH4),
197            5 => Some(PRSSEL_A::PRSCH5),
198            6 => Some(PRSSEL_A::PRSCH6),
199            7 => Some(PRSSEL_A::PRSCH7),
200            8 => Some(PRSSEL_A::PRSCH8),
201            9 => Some(PRSSEL_A::PRSCH9),
202            10 => Some(PRSSEL_A::PRSCH10),
203            11 => Some(PRSSEL_A::PRSCH11),
204            _ => None,
205        }
206    }
207    #[doc = "Checks if the value of the field is `PRSCH0`"]
208    #[inline(always)]
209    pub fn is_prsch0(&self) -> bool {
210        *self == PRSSEL_A::PRSCH0
211    }
212    #[doc = "Checks if the value of the field is `PRSCH1`"]
213    #[inline(always)]
214    pub fn is_prsch1(&self) -> bool {
215        *self == PRSSEL_A::PRSCH1
216    }
217    #[doc = "Checks if the value of the field is `PRSCH2`"]
218    #[inline(always)]
219    pub fn is_prsch2(&self) -> bool {
220        *self == PRSSEL_A::PRSCH2
221    }
222    #[doc = "Checks if the value of the field is `PRSCH3`"]
223    #[inline(always)]
224    pub fn is_prsch3(&self) -> bool {
225        *self == PRSSEL_A::PRSCH3
226    }
227    #[doc = "Checks if the value of the field is `PRSCH4`"]
228    #[inline(always)]
229    pub fn is_prsch4(&self) -> bool {
230        *self == PRSSEL_A::PRSCH4
231    }
232    #[doc = "Checks if the value of the field is `PRSCH5`"]
233    #[inline(always)]
234    pub fn is_prsch5(&self) -> bool {
235        *self == PRSSEL_A::PRSCH5
236    }
237    #[doc = "Checks if the value of the field is `PRSCH6`"]
238    #[inline(always)]
239    pub fn is_prsch6(&self) -> bool {
240        *self == PRSSEL_A::PRSCH6
241    }
242    #[doc = "Checks if the value of the field is `PRSCH7`"]
243    #[inline(always)]
244    pub fn is_prsch7(&self) -> bool {
245        *self == PRSSEL_A::PRSCH7
246    }
247    #[doc = "Checks if the value of the field is `PRSCH8`"]
248    #[inline(always)]
249    pub fn is_prsch8(&self) -> bool {
250        *self == PRSSEL_A::PRSCH8
251    }
252    #[doc = "Checks if the value of the field is `PRSCH9`"]
253    #[inline(always)]
254    pub fn is_prsch9(&self) -> bool {
255        *self == PRSSEL_A::PRSCH9
256    }
257    #[doc = "Checks if the value of the field is `PRSCH10`"]
258    #[inline(always)]
259    pub fn is_prsch10(&self) -> bool {
260        *self == PRSSEL_A::PRSCH10
261    }
262    #[doc = "Checks if the value of the field is `PRSCH11`"]
263    #[inline(always)]
264    pub fn is_prsch11(&self) -> bool {
265        *self == PRSSEL_A::PRSCH11
266    }
267}
268#[doc = "Field `PRSSEL` writer - Channel 0 PRS Trigger Select"]
269pub type PRSSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH0CTRL_SPEC, u8, PRSSEL_A, 4, O>;
270impl<'a, const O: u8> PRSSEL_W<'a, O> {
271    #[doc = "PRS ch 0 triggers a conversion."]
272    #[inline(always)]
273    pub fn prsch0(self) -> &'a mut W {
274        self.variant(PRSSEL_A::PRSCH0)
275    }
276    #[doc = "PRS ch 1 triggers a conversion."]
277    #[inline(always)]
278    pub fn prsch1(self) -> &'a mut W {
279        self.variant(PRSSEL_A::PRSCH1)
280    }
281    #[doc = "PRS ch 2 triggers a conversion."]
282    #[inline(always)]
283    pub fn prsch2(self) -> &'a mut W {
284        self.variant(PRSSEL_A::PRSCH2)
285    }
286    #[doc = "PRS ch 3 triggers a conversion."]
287    #[inline(always)]
288    pub fn prsch3(self) -> &'a mut W {
289        self.variant(PRSSEL_A::PRSCH3)
290    }
291    #[doc = "PRS ch 4 triggers a conversion."]
292    #[inline(always)]
293    pub fn prsch4(self) -> &'a mut W {
294        self.variant(PRSSEL_A::PRSCH4)
295    }
296    #[doc = "PRS ch 5 triggers a conversion."]
297    #[inline(always)]
298    pub fn prsch5(self) -> &'a mut W {
299        self.variant(PRSSEL_A::PRSCH5)
300    }
301    #[doc = "PRS ch 6 triggers a conversion."]
302    #[inline(always)]
303    pub fn prsch6(self) -> &'a mut W {
304        self.variant(PRSSEL_A::PRSCH6)
305    }
306    #[doc = "PRS ch 7 triggers a conversion."]
307    #[inline(always)]
308    pub fn prsch7(self) -> &'a mut W {
309        self.variant(PRSSEL_A::PRSCH7)
310    }
311    #[doc = "PRS ch 8 triggers a conversion."]
312    #[inline(always)]
313    pub fn prsch8(self) -> &'a mut W {
314        self.variant(PRSSEL_A::PRSCH8)
315    }
316    #[doc = "PRS ch 9 triggers a conversion."]
317    #[inline(always)]
318    pub fn prsch9(self) -> &'a mut W {
319        self.variant(PRSSEL_A::PRSCH9)
320    }
321    #[doc = "PRS ch 10 triggers a conversion."]
322    #[inline(always)]
323    pub fn prsch10(self) -> &'a mut W {
324        self.variant(PRSSEL_A::PRSCH10)
325    }
326    #[doc = "PRS ch 11 triggers a conversion."]
327    #[inline(always)]
328    pub fn prsch11(self) -> &'a mut W {
329        self.variant(PRSSEL_A::PRSCH11)
330    }
331}
332impl R {
333    #[doc = "Bit 0 - Conversion Mode"]
334    #[inline(always)]
335    pub fn convmode(&self) -> CONVMODE_R {
336        CONVMODE_R::new((self.bits & 1) != 0)
337    }
338    #[doc = "Bits 4:6 - Channel 0 Trigger Mode"]
339    #[inline(always)]
340    pub fn trigmode(&self) -> TRIGMODE_R {
341        TRIGMODE_R::new(((self.bits >> 4) & 7) as u8)
342    }
343    #[doc = "Bit 8 - Channel 0 PRS Asynchronous Enable"]
344    #[inline(always)]
345    pub fn prsasync(&self) -> PRSASYNC_R {
346        PRSASYNC_R::new(((self.bits >> 8) & 1) != 0)
347    }
348    #[doc = "Bits 12:15 - Channel 0 PRS Trigger Select"]
349    #[inline(always)]
350    pub fn prssel(&self) -> PRSSEL_R {
351        PRSSEL_R::new(((self.bits >> 12) & 0x0f) as u8)
352    }
353}
354impl W {
355    #[doc = "Bit 0 - Conversion Mode"]
356    #[inline(always)]
357    #[must_use]
358    pub fn convmode(&mut self) -> CONVMODE_W<0> {
359        CONVMODE_W::new(self)
360    }
361    #[doc = "Bits 4:6 - Channel 0 Trigger Mode"]
362    #[inline(always)]
363    #[must_use]
364    pub fn trigmode(&mut self) -> TRIGMODE_W<4> {
365        TRIGMODE_W::new(self)
366    }
367    #[doc = "Bit 8 - Channel 0 PRS Asynchronous Enable"]
368    #[inline(always)]
369    #[must_use]
370    pub fn prsasync(&mut self) -> PRSASYNC_W<8> {
371        PRSASYNC_W::new(self)
372    }
373    #[doc = "Bits 12:15 - Channel 0 PRS Trigger Select"]
374    #[inline(always)]
375    #[must_use]
376    pub fn prssel(&mut self) -> PRSSEL_W<12> {
377        PRSSEL_W::new(self)
378    }
379    #[doc = "Writes raw bits to the register."]
380    #[inline(always)]
381    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
382        self.0.bits(bits);
383        self
384    }
385}
386#[doc = "Channel 0 Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch0ctrl](index.html) module"]
387pub struct CH0CTRL_SPEC;
388impl crate::RegisterSpec for CH0CTRL_SPEC {
389    type Ux = u32;
390}
391#[doc = "`read()` method returns [ch0ctrl::R](R) reader structure"]
392impl crate::Readable for CH0CTRL_SPEC {
393    type Reader = R;
394}
395#[doc = "`write(|w| ..)` method takes [ch0ctrl::W](W) writer structure"]
396impl crate::Writable for CH0CTRL_SPEC {
397    type Writer = W;
398    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
399    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
400}
401#[doc = "`reset()` method sets CH0CTRL to value 0"]
402impl crate::Resettable for CH0CTRL_SPEC {
403    const RESET_VALUE: Self::Ux = 0;
404}
efm32jg12b_pac/efm32jg12b500/vdac0/ch0ctrl.rs

efm32jg12b_pac/efm32jg12b500/vdac0/
ch0ctrl.rs
