efm32jg12b_pac/efm32jg12b500/prs/
routepen.rs

1#[doc = "Register `ROUTEPEN` reader"]
2pub struct R(crate::R<ROUTEPEN_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<ROUTEPEN_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<ROUTEPEN_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<ROUTEPEN_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `ROUTEPEN` writer"]
17pub struct W(crate::W<ROUTEPEN_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<ROUTEPEN_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<ROUTEPEN_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<ROUTEPEN_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `CH0PEN` reader - CH0 Pin Enable"]
38pub type CH0PEN_R = crate::BitReader<bool>;
39#[doc = "Field `CH0PEN` writer - CH0 Pin Enable"]
40pub type CH0PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ROUTEPEN_SPEC, bool, O>;
41#[doc = "Field `CH1PEN` reader - CH1 Pin Enable"]
42pub type CH1PEN_R = crate::BitReader<bool>;
43#[doc = "Field `CH1PEN` writer - CH1 Pin Enable"]
44pub type CH1PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ROUTEPEN_SPEC, bool, O>;
45#[doc = "Field `CH2PEN` reader - CH2 Pin Enable"]
46pub type CH2PEN_R = crate::BitReader<bool>;
47#[doc = "Field `CH2PEN` writer - CH2 Pin Enable"]
48pub type CH2PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ROUTEPEN_SPEC, bool, O>;
49#[doc = "Field `CH3PEN` reader - CH3 Pin Enable"]
50pub type CH3PEN_R = crate::BitReader<bool>;
51#[doc = "Field `CH3PEN` writer - CH3 Pin Enable"]
52pub type CH3PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ROUTEPEN_SPEC, bool, O>;
53#[doc = "Field `CH4PEN` reader - CH4 Pin Enable"]
54pub type CH4PEN_R = crate::BitReader<bool>;
55#[doc = "Field `CH4PEN` writer - CH4 Pin Enable"]
56pub type CH4PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ROUTEPEN_SPEC, bool, O>;
57#[doc = "Field `CH5PEN` reader - CH5 Pin Enable"]
58pub type CH5PEN_R = crate::BitReader<bool>;
59#[doc = "Field `CH5PEN` writer - CH5 Pin Enable"]
60pub type CH5PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ROUTEPEN_SPEC, bool, O>;
61#[doc = "Field `CH6PEN` reader - CH6 Pin Enable"]
62pub type CH6PEN_R = crate::BitReader<bool>;
63#[doc = "Field `CH6PEN` writer - CH6 Pin Enable"]
64pub type CH6PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ROUTEPEN_SPEC, bool, O>;
65#[doc = "Field `CH7PEN` reader - CH7 Pin Enable"]
66pub type CH7PEN_R = crate::BitReader<bool>;
67#[doc = "Field `CH7PEN` writer - CH7 Pin Enable"]
68pub type CH7PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ROUTEPEN_SPEC, bool, O>;
69#[doc = "Field `CH8PEN` reader - CH8 Pin Enable"]
70pub type CH8PEN_R = crate::BitReader<bool>;
71#[doc = "Field `CH8PEN` writer - CH8 Pin Enable"]
72pub type CH8PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ROUTEPEN_SPEC, bool, O>;
73#[doc = "Field `CH9PEN` reader - CH9 Pin Enable"]
74pub type CH9PEN_R = crate::BitReader<bool>;
75#[doc = "Field `CH9PEN` writer - CH9 Pin Enable"]
76pub type CH9PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ROUTEPEN_SPEC, bool, O>;
77#[doc = "Field `CH10PEN` reader - CH10 Pin Enable"]
78pub type CH10PEN_R = crate::BitReader<bool>;
79#[doc = "Field `CH10PEN` writer - CH10 Pin Enable"]
80pub type CH10PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ROUTEPEN_SPEC, bool, O>;
81#[doc = "Field `CH11PEN` reader - CH11 Pin Enable"]
82pub type CH11PEN_R = crate::BitReader<bool>;
83#[doc = "Field `CH11PEN` writer - CH11 Pin Enable"]
84pub type CH11PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ROUTEPEN_SPEC, bool, O>;
85impl R {
86    #[doc = "Bit 0 - CH0 Pin Enable"]
87    #[inline(always)]
88    pub fn ch0pen(&self) -> CH0PEN_R {
89        CH0PEN_R::new((self.bits & 1) != 0)
90    }
91    #[doc = "Bit 1 - CH1 Pin Enable"]
92    #[inline(always)]
93    pub fn ch1pen(&self) -> CH1PEN_R {
94        CH1PEN_R::new(((self.bits >> 1) & 1) != 0)
95    }
96    #[doc = "Bit 2 - CH2 Pin Enable"]
97    #[inline(always)]
98    pub fn ch2pen(&self) -> CH2PEN_R {
99        CH2PEN_R::new(((self.bits >> 2) & 1) != 0)
100    }
101    #[doc = "Bit 3 - CH3 Pin Enable"]
102    #[inline(always)]
103    pub fn ch3pen(&self) -> CH3PEN_R {
104        CH3PEN_R::new(((self.bits >> 3) & 1) != 0)
105    }
106    #[doc = "Bit 4 - CH4 Pin Enable"]
107    #[inline(always)]
108    pub fn ch4pen(&self) -> CH4PEN_R {
109        CH4PEN_R::new(((self.bits >> 4) & 1) != 0)
110    }
111    #[doc = "Bit 5 - CH5 Pin Enable"]
112    #[inline(always)]
113    pub fn ch5pen(&self) -> CH5PEN_R {
114        CH5PEN_R::new(((self.bits >> 5) & 1) != 0)
115    }
116    #[doc = "Bit 6 - CH6 Pin Enable"]
117    #[inline(always)]
118    pub fn ch6pen(&self) -> CH6PEN_R {
119        CH6PEN_R::new(((self.bits >> 6) & 1) != 0)
120    }
121    #[doc = "Bit 7 - CH7 Pin Enable"]
122    #[inline(always)]
123    pub fn ch7pen(&self) -> CH7PEN_R {
124        CH7PEN_R::new(((self.bits >> 7) & 1) != 0)
125    }
126    #[doc = "Bit 8 - CH8 Pin Enable"]
127    #[inline(always)]
128    pub fn ch8pen(&self) -> CH8PEN_R {
129        CH8PEN_R::new(((self.bits >> 8) & 1) != 0)
130    }
131    #[doc = "Bit 9 - CH9 Pin Enable"]
132    #[inline(always)]
133    pub fn ch9pen(&self) -> CH9PEN_R {
134        CH9PEN_R::new(((self.bits >> 9) & 1) != 0)
135    }
136    #[doc = "Bit 10 - CH10 Pin Enable"]
137    #[inline(always)]
138    pub fn ch10pen(&self) -> CH10PEN_R {
139        CH10PEN_R::new(((self.bits >> 10) & 1) != 0)
140    }
141    #[doc = "Bit 11 - CH11 Pin Enable"]
142    #[inline(always)]
143    pub fn ch11pen(&self) -> CH11PEN_R {
144        CH11PEN_R::new(((self.bits >> 11) & 1) != 0)
145    }
146}
147impl W {
148    #[doc = "Bit 0 - CH0 Pin Enable"]
149    #[inline(always)]
150    #[must_use]
151    pub fn ch0pen(&mut self) -> CH0PEN_W<0> {
152        CH0PEN_W::new(self)
153    }
154    #[doc = "Bit 1 - CH1 Pin Enable"]
155    #[inline(always)]
156    #[must_use]
157    pub fn ch1pen(&mut self) -> CH1PEN_W<1> {
158        CH1PEN_W::new(self)
159    }
160    #[doc = "Bit 2 - CH2 Pin Enable"]
161    #[inline(always)]
162    #[must_use]
163    pub fn ch2pen(&mut self) -> CH2PEN_W<2> {
164        CH2PEN_W::new(self)
165    }
166    #[doc = "Bit 3 - CH3 Pin Enable"]
167    #[inline(always)]
168    #[must_use]
169    pub fn ch3pen(&mut self) -> CH3PEN_W<3> {
170        CH3PEN_W::new(self)
171    }
172    #[doc = "Bit 4 - CH4 Pin Enable"]
173    #[inline(always)]
174    #[must_use]
175    pub fn ch4pen(&mut self) -> CH4PEN_W<4> {
176        CH4PEN_W::new(self)
177    }
178    #[doc = "Bit 5 - CH5 Pin Enable"]
179    #[inline(always)]
180    #[must_use]
181    pub fn ch5pen(&mut self) -> CH5PEN_W<5> {
182        CH5PEN_W::new(self)
183    }
184    #[doc = "Bit 6 - CH6 Pin Enable"]
185    #[inline(always)]
186    #[must_use]
187    pub fn ch6pen(&mut self) -> CH6PEN_W<6> {
188        CH6PEN_W::new(self)
189    }
190    #[doc = "Bit 7 - CH7 Pin Enable"]
191    #[inline(always)]
192    #[must_use]
193    pub fn ch7pen(&mut self) -> CH7PEN_W<7> {
194        CH7PEN_W::new(self)
195    }
196    #[doc = "Bit 8 - CH8 Pin Enable"]
197    #[inline(always)]
198    #[must_use]
199    pub fn ch8pen(&mut self) -> CH8PEN_W<8> {
200        CH8PEN_W::new(self)
201    }
202    #[doc = "Bit 9 - CH9 Pin Enable"]
203    #[inline(always)]
204    #[must_use]
205    pub fn ch9pen(&mut self) -> CH9PEN_W<9> {
206        CH9PEN_W::new(self)
207    }
208    #[doc = "Bit 10 - CH10 Pin Enable"]
209    #[inline(always)]
210    #[must_use]
211    pub fn ch10pen(&mut self) -> CH10PEN_W<10> {
212        CH10PEN_W::new(self)
213    }
214    #[doc = "Bit 11 - CH11 Pin Enable"]
215    #[inline(always)]
216    #[must_use]
217    pub fn ch11pen(&mut self) -> CH11PEN_W<11> {
218        CH11PEN_W::new(self)
219    }
220    #[doc = "Writes raw bits to the register."]
221    #[inline(always)]
222    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
223        self.0.bits(bits);
224        self
225    }
226}
227#[doc = "I/O Routing Pin Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [routepen](index.html) module"]
228pub struct ROUTEPEN_SPEC;
229impl crate::RegisterSpec for ROUTEPEN_SPEC {
230    type Ux = u32;
231}
232#[doc = "`read()` method returns [routepen::R](R) reader structure"]
233impl crate::Readable for ROUTEPEN_SPEC {
234    type Reader = R;
235}
236#[doc = "`write(|w| ..)` method takes [routepen::W](W) writer structure"]
237impl crate::Writable for ROUTEPEN_SPEC {
238    type Writer = W;
239    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
240    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
241}
242#[doc = "`reset()` method sets ROUTEPEN to value 0"]
243impl crate::Resettable for ROUTEPEN_SPEC {
244    const RESET_VALUE: Self::Ux = 0;
245}
efm32jg12b_pac/efm32jg12b500/prs/routepen.rs

efm32jg12b_pac/efm32jg12b500/prs/
routepen.rs
